release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <ttm/ttm_bo_api.h>
  33 #include <ttm/ttm_bo_driver.h>
  34 #include <ttm/ttm_placement.h>
  35 #include <ttm/ttm_module.h>
  36 #include <ttm/ttm_page_alloc.h>
  37 #include <drm/drmP.h>
  38 #include <drm/radeon_drm.h>
  39 #include <linux/seq_file.h>
  40 #include <linux/slab.h>
  41 #include "radeon_reg.h"
  42 #include "radeon.h"
  43
  44 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
  45
  46 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  47
  48 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  49 {
  50         struct radeon_mman *mman;
  51         struct radeon_device *rdev;
  52
  53         mman = container_of(bdev, struct radeon_mman, bdev);
  54         rdev = container_of(mman, struct radeon_device, mman);
  55         return rdev;
  56 }
  57
  58
  59 /*
  60  * Global memory.
  61  */
  62 static int radeon_ttm_mem_global_init(struct drm_global_reference *ref)
  63 {
  64         return ttm_mem_global_init(ref->object);
  65 }
  66
  67 static void radeon_ttm_mem_global_release(struct drm_global_reference *ref)
  68 {
  69         ttm_mem_global_release(ref->object);
  70 }
  71
  72 static int radeon_ttm_global_init(struct radeon_device *rdev)
  73 {
  74         struct drm_global_reference *global_ref;
  75         int r;
  76
  77         rdev->mman.mem_global_referenced = false;
  78         global_ref = &rdev->mman.mem_global_ref;
  79         global_ref->global_type = DRM_GLOBAL_TTM_MEM;
  80         global_ref->size = sizeof(struct ttm_mem_global);
  81         global_ref->init = &radeon_ttm_mem_global_init;
  82         global_ref->release = &radeon_ttm_mem_global_release;
  83         r = drm_global_item_ref(global_ref);
  84         if (r != 0) {
  85                 DRM_ERROR("Failed setting up TTM memory accounting "
  86                           "subsystem.\n");
  87                 return r;
  88         }
  89
  90         rdev->mman.bo_global_ref.mem_glob =
  91                 rdev->mman.mem_global_ref.object;
  92         global_ref = &rdev->mman.bo_global_ref.ref;
  93         global_ref->global_type = DRM_GLOBAL_TTM_BO;
  94         global_ref->size = sizeof(struct ttm_bo_global);
  95         global_ref->init = &ttm_bo_global_init;
  96         global_ref->release = &ttm_bo_global_release;
  97         r = drm_global_item_ref(global_ref);
  98         if (r != 0) {
  99                 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
 100                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 101                 return r;
 102         }
 103
 104         rdev->mman.mem_global_referenced = true;
 105         return 0;
 106 }
 107
 108 static void radeon_ttm_global_fini(struct radeon_device *rdev)
 109 {
 110         if (rdev->mman.mem_global_referenced) {
 111                 drm_global_item_unref(&rdev->mman.bo_global_ref.ref);
 112                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 113                 rdev->mman.mem_global_referenced = false;
 114         }
 115 }
 116
 117 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev);
 118
 119 static struct ttm_backend*
 120 radeon_create_ttm_backend_entry(struct ttm_bo_device *bdev)
 121 {
 122         struct radeon_device *rdev;
 123
 124         rdev = radeon_get_rdev(bdev);
 125 #if __OS_HAS_AGP
 126         if (rdev->flags & RADEON_IS_AGP) {
 127                 return ttm_agp_backend_init(bdev, rdev->ddev->agp->bridge);
 128         } else
 129 #endif
 130         {
 131                 return radeon_ttm_backend_create(rdev);
 132         }
 133 }
 134
 135 static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
 136 {
 137         return 0;
 138 }
 139
 140 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 141                                 struct ttm_mem_type_manager *man)
 142 {
 143         struct radeon_device *rdev;
 144
 145         rdev = radeon_get_rdev(bdev);
 146
 147         switch (type) {
 148         case TTM_PL_SYSTEM:
 149                 /* System memory */
 150                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 151                 man->available_caching = TTM_PL_MASK_CACHING;
 152                 man->default_caching = TTM_PL_FLAG_CACHED;
 153                 break;
 154         case TTM_PL_TT:
 155                 man->gpu_offset = rdev->mc.gtt_start;
 156                 man->available_caching = TTM_PL_MASK_CACHING;
 157                 man->default_caching = TTM_PL_FLAG_CACHED;
 158                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
 159 #if __OS_HAS_AGP
 160                 if (rdev->flags & RADEON_IS_AGP) {
 161                         if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
 162                                 DRM_ERROR("AGP is not enabled for memory type %u\n",
 163                                           (unsigned)type);
 164                                 return -EINVAL;
 165                         }
 166                         if (!rdev->ddev->agp->cant_use_aperture)
 167                                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 168                         man->available_caching = TTM_PL_FLAG_UNCACHED |
 169                                                  TTM_PL_FLAG_WC;
 170                         man->default_caching = TTM_PL_FLAG_WC;
 171                 }
 172 #endif
 173                 break;
 174         case TTM_PL_VRAM:
 175                 /* "On-card" video ram */
 176                 man->gpu_offset = rdev->mc.vram_start;
 177                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
 178                              TTM_MEMTYPE_FLAG_MAPPABLE;
 179                 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
 180                 man->default_caching = TTM_PL_FLAG_WC;
 181                 break;
 182         default:
 183                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 184                 return -EINVAL;
 185         }
 186         return 0;
 187 }
 188
 189 static void radeon_evict_flags(struct ttm_buffer_object *bo,
 190                                 struct ttm_placement *placement)
 191 {
 192         struct radeon_bo *rbo;
 193         static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
 194
 195         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
 196                 placement->fpfn = 0;
 197                 placement->lpfn = 0;
 198                 placement->placement = &placements;
 199                 placement->busy_placement = &placements;
 200                 placement->num_placement = 1;
 201                 placement->num_busy_placement = 1;
 202                 return;
 203         }
 204         rbo = container_of(bo, struct radeon_bo, tbo);
 205         switch (bo->mem.mem_type) {
 206         case TTM_PL_VRAM:
 207                 if (rbo->rdev->cp.ready == false)
 208                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 209                 else
 210                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 211                 break;
 212         case TTM_PL_TT:
 213         default:
 214                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 215         }
 216         *placement = rbo->placement;
 217 }
 218
 219 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 220 {
 221         return 0;
 222 }
 223
 224 static void radeon_move_null(struct ttm_buffer_object *bo,
 225                              struct ttm_mem_reg *new_mem)
 226 {
 227         struct ttm_mem_reg *old_mem = &bo->mem;
 228
 229         BUG_ON(old_mem->mm_node != NULL);
 230         *old_mem = *new_mem;
 231         new_mem->mm_node = NULL;
 232 }
 233
 234 static int radeon_move_blit(struct ttm_buffer_object *bo,
 235                         bool evict, int no_wait_reserve, bool no_wait_gpu,
 236                         struct ttm_mem_reg *new_mem,
 237                         struct ttm_mem_reg *old_mem)
 238 {
 239         struct radeon_device *rdev;
 240         uint64_t old_start, new_start;
 241         struct radeon_fence *fence;
 242         int r;
 243
 244         rdev = radeon_get_rdev(bo->bdev);
 245         r = radeon_fence_create(rdev, &fence);
 246         if (unlikely(r)) {
 247                 return r;
 248         }
 249         old_start = old_mem->mm_node->start << PAGE_SHIFT;
 250         new_start = new_mem->mm_node->start << PAGE_SHIFT;
 251
 252         switch (old_mem->mem_type) {
 253         case TTM_PL_VRAM:
 254                 old_start += rdev->mc.vram_start;
 255                 break;
 256         case TTM_PL_TT:
 257                 old_start += rdev->mc.gtt_start;
 258                 break;
 259         default:
 260                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 261                 return -EINVAL;
 262         }
 263         switch (new_mem->mem_type) {
 264         case TTM_PL_VRAM:
 265                 new_start += rdev->mc.vram_start;
 266                 break;
 267         case TTM_PL_TT:
 268                 new_start += rdev->mc.gtt_start;
 269                 break;
 270         default:
 271                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 272                 return -EINVAL;
 273         }
 274         if (!rdev->cp.ready) {
 275                 DRM_ERROR("Trying to move memory with CP turned off.\n");
 276                 return -EINVAL;
 277         }
 278         r = radeon_copy(rdev, old_start, new_start, new_mem->num_pages, fence);
 279         r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL,
 280                                       evict, no_wait_reserve, no_wait_gpu, new_mem);
 281         radeon_fence_unref(&fence);
 282         return r;
 283 }
 284
 285 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 286                                 bool evict, bool interruptible,
 287                                 bool no_wait_reserve, bool no_wait_gpu,
 288                                 struct ttm_mem_reg *new_mem)
 289 {
 290         struct radeon_device *rdev;
 291         struct ttm_mem_reg *old_mem = &bo->mem;
 292         struct ttm_mem_reg tmp_mem;
 293         u32 placements;
 294         struct ttm_placement placement;
 295         int r;
 296
 297         rdev = radeon_get_rdev(bo->bdev);
 298         tmp_mem = *new_mem;
 299         tmp_mem.mm_node = NULL;
 300         placement.fpfn = 0;
 301         placement.lpfn = 0;
 302         placement.num_placement = 1;
 303         placement.placement = &placements;
 304         placement.num_busy_placement = 1;
 305         placement.busy_placement = &placements;
 306         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 307         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 308                              interruptible, no_wait_reserve, no_wait_gpu);
 309         if (unlikely(r)) {
 310                 return r;
 311         }
 312
 313         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 314         if (unlikely(r)) {
 315                 goto out_cleanup;
 316         }
 317
 318         r = ttm_tt_bind(bo->ttm, &tmp_mem);
 319         if (unlikely(r)) {
 320                 goto out_cleanup;
 321         }
 322         r = radeon_move_blit(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem, old_mem);
 323         if (unlikely(r)) {
 324                 goto out_cleanup;
 325         }
 326         r = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, new_mem);
 327 out_cleanup:
 328         if (tmp_mem.mm_node) {
 329                 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
 330
 331                 spin_lock(&glob->lru_lock);
 332                 drm_mm_put_block(tmp_mem.mm_node);
 333                 spin_unlock(&glob->lru_lock);
 334                 return r;
 335         }
 336         return r;
 337 }
 338
 339 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 340                                 bool evict, bool interruptible,
 341                                 bool no_wait_reserve, bool no_wait_gpu,
 342                                 struct ttm_mem_reg *new_mem)
 343 {
 344         struct radeon_device *rdev;
 345         struct ttm_mem_reg *old_mem = &bo->mem;
 346         struct ttm_mem_reg tmp_mem;
 347         struct ttm_placement placement;
 348         u32 placements;
 349         int r;
 350
 351         rdev = radeon_get_rdev(bo->bdev);
 352         tmp_mem = *new_mem;
 353         tmp_mem.mm_node = NULL;
 354         placement.fpfn = 0;
 355         placement.lpfn = 0;
 356         placement.num_placement = 1;
 357         placement.placement = &placements;
 358         placement.num_busy_placement = 1;
 359         placement.busy_placement = &placements;
 360         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 361         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait_reserve, no_wait_gpu);
 362         if (unlikely(r)) {
 363                 return r;
 364         }
 365         r = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem);
 366         if (unlikely(r)) {
 367                 goto out_cleanup;
 368         }
 369         r = radeon_move_blit(bo, true, no_wait_reserve, no_wait_gpu, new_mem, old_mem);
 370         if (unlikely(r)) {
 371                 goto out_cleanup;
 372         }
 373 out_cleanup:
 374         if (tmp_mem.mm_node) {
 375                 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
 376
 377                 spin_lock(&glob->lru_lock);
 378                 drm_mm_put_block(tmp_mem.mm_node);
 379                 spin_unlock(&glob->lru_lock);
 380                 return r;
 381         }
 382         return r;
 383 }
 384
 385 static int radeon_bo_move(struct ttm_buffer_object *bo,
 386                         bool evict, bool interruptible,
 387                         bool no_wait_reserve, bool no_wait_gpu,
 388                         struct ttm_mem_reg *new_mem)
 389 {
 390         struct radeon_device *rdev;
 391         struct ttm_mem_reg *old_mem = &bo->mem;
 392         int r;
 393
 394         rdev = radeon_get_rdev(bo->bdev);
 395         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 396                 radeon_move_null(bo, new_mem);
 397                 return 0;
 398         }
 399         if ((old_mem->mem_type == TTM_PL_TT &&
 400              new_mem->mem_type == TTM_PL_SYSTEM) ||
 401             (old_mem->mem_type == TTM_PL_SYSTEM &&
 402              new_mem->mem_type == TTM_PL_TT)) {
 403                 /* bind is enough */
 404                 radeon_move_null(bo, new_mem);
 405                 return 0;
 406         }
 407         if (!rdev->cp.ready || rdev->asic->copy == NULL) {
 408                 /* use memcpy */
 409                 goto memcpy;
 410         }
 411
 412         if (old_mem->mem_type == TTM_PL_VRAM &&
 413             new_mem->mem_type == TTM_PL_SYSTEM) {
 414                 r = radeon_move_vram_ram(bo, evict, interruptible,
 415                                         no_wait_reserve, no_wait_gpu, new_mem);
 416         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 417                    new_mem->mem_type == TTM_PL_VRAM) {
 418                 r = radeon_move_ram_vram(bo, evict, interruptible,
 419                                             no_wait_reserve, no_wait_gpu, new_mem);
 420         } else {
 421                 r = radeon_move_blit(bo, evict, no_wait_reserve, no_wait_gpu, new_mem, old_mem);
 422         }
 423
 424         if (r) {
 425 memcpy:
 426                 r = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
 427         }
 428         return r;
 429 }
 430
 431 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 432 {
 433         struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 434         struct radeon_device *rdev = radeon_get_rdev(bdev);
 435
 436         mem->bus.addr = NULL;
 437         mem->bus.offset = 0;
 438         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 439         mem->bus.base = 0;
 440         mem->bus.is_iomem = false;
 441         if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
 442                 return -EINVAL;
 443         switch (mem->mem_type) {
 444         case TTM_PL_SYSTEM:
 445                 /* system memory */
 446                 return 0;
 447         case TTM_PL_TT:
 448 #if __OS_HAS_AGP
 449                 if (rdev->flags & RADEON_IS_AGP) {
 450                         /* RADEON_IS_AGP is set only if AGP is active */
 451                         mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
 452                         mem->bus.base = rdev->mc.agp_base;
 453                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 454                 }
 455 #endif
 456                 break;
 457         case TTM_PL_VRAM:
 458                 mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
 459                 /* check if it's visible */
 460                 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
 461                         return -EINVAL;
 462                 mem->bus.base = rdev->mc.aper_base;
 463                 mem->bus.is_iomem = true;
 464                 break;
 465         default:
 466                 return -EINVAL;
 467         }
 468         return 0;
 469 }
 470
 471 static void radeon_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 472 {
 473 }
 474
 475 static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg,
 476                                 bool lazy, bool interruptible)
 477 {
 478         return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
 479 }
 480
 481 static int radeon_sync_obj_flush(void *sync_obj, void *sync_arg)
 482 {
 483         return 0;
 484 }
 485
 486 static void radeon_sync_obj_unref(void **sync_obj)
 487 {
 488         radeon_fence_unref((struct radeon_fence **)sync_obj);
 489 }
 490
 491 static void *radeon_sync_obj_ref(void *sync_obj)
 492 {
 493         return radeon_fence_ref((struct radeon_fence *)sync_obj);
 494 }
 495
 496 static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg)
 497 {
 498         return radeon_fence_signaled((struct radeon_fence *)sync_obj);
 499 }
 500
 501 static struct ttm_bo_driver radeon_bo_driver = {
 502         .create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
 503         .invalidate_caches = &radeon_invalidate_caches,
 504         .init_mem_type = &radeon_init_mem_type,
 505         .evict_flags = &radeon_evict_flags,
 506         .move = &radeon_bo_move,
 507         .verify_access = &radeon_verify_access,
 508         .sync_obj_signaled = &radeon_sync_obj_signaled,
 509         .sync_obj_wait = &radeon_sync_obj_wait,
 510         .sync_obj_flush = &radeon_sync_obj_flush,
 511         .sync_obj_unref = &radeon_sync_obj_unref,
 512         .sync_obj_ref = &radeon_sync_obj_ref,
 513         .move_notify = &radeon_bo_move_notify,
 514         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 515         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 516         .io_mem_free = &radeon_ttm_io_mem_free,
 517 };
 518
 519 int radeon_ttm_init(struct radeon_device *rdev)
 520 {
 521         int r;
 522
 523         r = radeon_ttm_global_init(rdev);
 524         if (r) {
 525                 return r;
 526         }
 527         /* No others user of address space so set it to 0 */
 528         r = ttm_bo_device_init(&rdev->mman.bdev,
 529                                rdev->mman.bo_global_ref.ref.object,
 530                                &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
 531                                rdev->need_dma32);
 532         if (r) {
 533                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 534                 return r;
 535         }
 536         rdev->mman.initialized = true;
 537         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
 538                                 rdev->mc.real_vram_size >> PAGE_SHIFT);
 539         if (r) {
 540                 DRM_ERROR("Failed initializing VRAM heap.\n");
 541                 return r;
 542         }
 543         r = radeon_bo_create(rdev, NULL, 256 * 1024, true,
 544                                 RADEON_GEM_DOMAIN_VRAM,
 545                                 &rdev->stollen_vga_memory);
 546         if (r) {
 547                 return r;
 548         }
 549         r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 550         if (r)
 551                 return r;
 552         r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 553         radeon_bo_unreserve(rdev->stollen_vga_memory);
 554         if (r) {
 555                 radeon_bo_unref(&rdev->stollen_vga_memory);
 556                 return r;
 557         }
 558         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 559                  (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
 560         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
 561                                 rdev->mc.gtt_size >> PAGE_SHIFT);
 562         if (r) {
 563                 DRM_ERROR("Failed initializing GTT heap.\n");
 564                 return r;
 565         }
 566         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 567                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 568         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
 569                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
 570         }
 571
 572         r = radeon_ttm_debugfs_init(rdev);
 573         if (r) {
 574                 DRM_ERROR("Failed to init debugfs\n");
 575                 return r;
 576         }
 577         return 0;
 578 }
 579
 580 void radeon_ttm_fini(struct radeon_device *rdev)
 581 {
 582         int r;
 583
 584         if (!rdev->mman.initialized)
 585                 return;
 586         if (rdev->stollen_vga_memory) {
 587                 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 588                 if (r == 0) {
 589                         radeon_bo_unpin(rdev->stollen_vga_memory);
 590                         radeon_bo_unreserve(rdev->stollen_vga_memory);
 591                 }
 592                 radeon_bo_unref(&rdev->stollen_vga_memory);
 593         }
 594         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 595         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
 596         ttm_bo_device_release(&rdev->mman.bdev);
 597         radeon_gart_fini(rdev);
 598         radeon_ttm_global_fini(rdev);
 599         rdev->mman.initialized = false;
 600         DRM_INFO("radeon: ttm finalized\n");
 601 }
 602
 603 static struct vm_operations_struct radeon_ttm_vm_ops;
 604 static const struct vm_operations_struct *ttm_vm_ops = NULL;
 605
 606 static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 607 {
 608         struct ttm_buffer_object *bo;
 609         struct radeon_device *rdev;
 610         int r;
 611
 612         bo = (struct ttm_buffer_object *)vma->vm_private_data;
 613         if (bo == NULL) {
 614                 return VM_FAULT_NOPAGE;
 615         }
 616         rdev = radeon_get_rdev(bo->bdev);
 617         mutex_lock(&rdev->vram_mutex);
 618         r = ttm_vm_ops->fault(vma, vmf);
 619         mutex_unlock(&rdev->vram_mutex);
 620         return r;
 621 }
 622
 623 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 624 {
 625         struct drm_file *file_priv;
 626         struct radeon_device *rdev;
 627         int r;
 628
 629         if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
 630                 return drm_mmap(filp, vma);
 631         }
 632
 633         file_priv = (struct drm_file *)filp->private_data;
 634         rdev = file_priv->minor->dev->dev_private;
 635         if (rdev == NULL) {
 636                 return -EINVAL;
 637         }
 638         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 639         if (unlikely(r != 0)) {
 640                 return r;
 641         }
 642         if (unlikely(ttm_vm_ops == NULL)) {
 643                 ttm_vm_ops = vma->vm_ops;
 644                 radeon_ttm_vm_ops = *ttm_vm_ops;
 645                 radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
 646         }
 647         vma->vm_ops = &radeon_ttm_vm_ops;
 648         return 0;
 649 }
 650
 651
 652 /*
 653  * TTM backend functions.
 654  */
 655 struct radeon_ttm_backend {
 656         struct ttm_backend              backend;
 657         struct radeon_device            *rdev;
 658         unsigned long                   num_pages;
 659         struct page                     **pages;
 660         struct page                     *dummy_read_page;
 661         bool                            populated;
 662         bool                            bound;
 663         unsigned                        offset;
 664 };
 665
 666 static int radeon_ttm_backend_populate(struct ttm_backend *backend,
 667                                        unsigned long num_pages,
 668                                        struct page **pages,
 669                                        struct page *dummy_read_page)
 670 {
 671         struct radeon_ttm_backend *gtt;
 672
 673         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 674         gtt->pages = pages;
 675         gtt->num_pages = num_pages;
 676         gtt->dummy_read_page = dummy_read_page;
 677         gtt->populated = true;
 678         return 0;
 679 }
 680
 681 static void radeon_ttm_backend_clear(struct ttm_backend *backend)
 682 {
 683         struct radeon_ttm_backend *gtt;
 684
 685         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 686         gtt->pages = NULL;
 687         gtt->num_pages = 0;
 688         gtt->dummy_read_page = NULL;
 689         gtt->populated = false;
 690         gtt->bound = false;
 691 }
 692
 693
 694 static int radeon_ttm_backend_bind(struct ttm_backend *backend,
 695                                    struct ttm_mem_reg *bo_mem)
 696 {
 697         struct radeon_ttm_backend *gtt;
 698         int r;
 699
 700         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 701         gtt->offset = bo_mem->mm_node->start << PAGE_SHIFT;
 702         if (!gtt->num_pages) {
 703                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
 704         }
 705         r = radeon_gart_bind(gtt->rdev, gtt->offset,
 706                              gtt->num_pages, gtt->pages);
 707         if (r) {
 708                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 709                           gtt->num_pages, gtt->offset);
 710                 return r;
 711         }
 712         gtt->bound = true;
 713         return 0;
 714 }
 715
 716 static int radeon_ttm_backend_unbind(struct ttm_backend *backend)
 717 {
 718         struct radeon_ttm_backend *gtt;
 719
 720         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 721         radeon_gart_unbind(gtt->rdev, gtt->offset, gtt->num_pages);
 722         gtt->bound = false;
 723         return 0;
 724 }
 725
 726 static void radeon_ttm_backend_destroy(struct ttm_backend *backend)
 727 {
 728         struct radeon_ttm_backend *gtt;
 729
 730         gtt = container_of(backend, struct radeon_ttm_backend, backend);
 731         if (gtt->bound) {
 732                 radeon_ttm_backend_unbind(backend);
 733         }
 734         kfree(gtt);
 735 }
 736
 737 static struct ttm_backend_func radeon_backend_func = {
 738         .populate = &radeon_ttm_backend_populate,
 739         .clear = &radeon_ttm_backend_clear,
 740         .bind = &radeon_ttm_backend_bind,
 741         .unbind = &radeon_ttm_backend_unbind,
 742         .destroy = &radeon_ttm_backend_destroy,
 743 };
 744
 745 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev)
 746 {
 747         struct radeon_ttm_backend *gtt;
 748
 749         gtt = kzalloc(sizeof(struct radeon_ttm_backend), GFP_KERNEL);
 750         if (gtt == NULL) {
 751                 return NULL;
 752         }
 753         gtt->backend.bdev = &rdev->mman.bdev;
 754         gtt->backend.flags = 0;
 755         gtt->backend.func = &radeon_backend_func;
 756         gtt->rdev = rdev;
 757         gtt->pages = NULL;
 758         gtt->num_pages = 0;
 759         gtt->dummy_read_page = NULL;
 760         gtt->populated = false;
 761         gtt->bound = false;
 762         return &gtt->backend;
 763 }
 764
 765 #define RADEON_DEBUGFS_MEM_TYPES 2
 766
 767 #if defined(CONFIG_DEBUG_FS)
 768 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 769 {
 770         struct drm_info_node *node = (struct drm_info_node *)m->private;
 771         struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
 772         struct drm_device *dev = node->minor->dev;
 773         struct radeon_device *rdev = dev->dev_private;
 774         int ret;
 775         struct ttm_bo_global *glob = rdev->mman.bdev.glob;
 776
 777         spin_lock(&glob->lru_lock);
 778         ret = drm_mm_dump_table(m, mm);
 779         spin_unlock(&glob->lru_lock);
 780         return ret;
 781 }
 782 #endif
 783
 784 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
 785 {
 786 #if defined(CONFIG_DEBUG_FS)
 787         static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES+1];
 788         static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES+1][32];
 789         unsigned i;
 790
 791         for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
 792                 if (i == 0)
 793                         sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
 794                 else
 795                         sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
 796                 radeon_mem_types_list[i].name = radeon_mem_types_names[i];
 797                 radeon_mem_types_list[i].show = &radeon_mm_dump_table;
 798                 radeon_mem_types_list[i].driver_features = 0;
 799                 if (i == 0)
 800                         radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].manager;
 801                 else
 802                         radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].manager;
 803
 804         }
 805         /* Add ttm page pool to debugfs */
 806         sprintf(radeon_mem_types_names[i], "ttm_page_pool");
 807         radeon_mem_types_list[i].name = radeon_mem_types_names[i];
 808         radeon_mem_types_list[i].show = &ttm_page_alloc_debugfs;
 809         radeon_mem_types_list[i].driver_features = 0;
 810         radeon_mem_types_list[i].data = NULL;
 811         return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES+1);
 812
 813 #endif
 814         return 0;
 815 }