release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/gpu/drm/radeon/radeon_mode.h

   1 /*
   2  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
   3  *                VA Linux Systems Inc., Fremont, California.
   4  * Copyright 2008 Red Hat Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Original Authors:
  25  *   Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26  *
  27  * Kernel port Author: Dave Airlie
  28  */
  29
  30 #ifndef RADEON_MODE_H
  31 #define RADEON_MODE_H
  32
  33 #include <drm_crtc.h>
  34 #include <drm_mode.h>
  35 #include <drm_edid.h>
  36 #include <drm_dp_helper.h>
  37 #include <drm_fixed.h>
  38 #include <linux/i2c.h>
  39 #include <linux/i2c-id.h>
  40 #include <linux/i2c-algo-bit.h>
  41
  42 struct radeon_bo;
  43 struct radeon_device;
  44
  45 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  46 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  47 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  48 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  49
  50 enum radeon_rmx_type {
  51         RMX_OFF,
  52         RMX_FULL,
  53         RMX_CENTER,
  54         RMX_ASPECT
  55 };
  56
  57 enum radeon_tv_std {
  58         TV_STD_NTSC,
  59         TV_STD_PAL,
  60         TV_STD_PAL_M,
  61         TV_STD_PAL_60,
  62         TV_STD_NTSC_J,
  63         TV_STD_SCART_PAL,
  64         TV_STD_SECAM,
  65         TV_STD_PAL_CN,
  66         TV_STD_PAL_N,
  67 };
  68
  69 enum radeon_underscan_type {
  70         UNDERSCAN_OFF,
  71         UNDERSCAN_ON,
  72         UNDERSCAN_AUTO,
  73 };
  74
  75 enum radeon_hpd_id {
  76         RADEON_HPD_1 = 0,
  77         RADEON_HPD_2,
  78         RADEON_HPD_3,
  79         RADEON_HPD_4,
  80         RADEON_HPD_5,
  81         RADEON_HPD_6,
  82         RADEON_HPD_NONE = 0xff,
  83 };
  84
  85 #define RADEON_MAX_I2C_BUS 16
  86
  87 /* radeon gpio-based i2c
  88  * 1. "mask" reg and bits
  89  *    grabs the gpio pins for software use
  90  *    0=not held  1=held
  91  * 2. "a" reg and bits
  92  *    output pin value
  93  *    0=low 1=high
  94  * 3. "en" reg and bits
  95  *    sets the pin direction
  96  *    0=input 1=output
  97  * 4. "y" reg and bits
  98  *    input pin value
  99  *    0=low 1=high
 100  */
 101 struct radeon_i2c_bus_rec {
 102         bool valid;
 103         /* id used by atom */
 104         uint8_t i2c_id;
 105         /* id used by atom */
 106         enum radeon_hpd_id hpd;
 107         /* can be used with hw i2c engine */
 108         bool hw_capable;
 109         /* uses multi-media i2c engine */
 110         bool mm_i2c;
 111         /* regs and bits */
 112         uint32_t mask_clk_reg;
 113         uint32_t mask_data_reg;
 114         uint32_t a_clk_reg;
 115         uint32_t a_data_reg;
 116         uint32_t en_clk_reg;
 117         uint32_t en_data_reg;
 118         uint32_t y_clk_reg;
 119         uint32_t y_data_reg;
 120         uint32_t mask_clk_mask;
 121         uint32_t mask_data_mask;
 122         uint32_t a_clk_mask;
 123         uint32_t a_data_mask;
 124         uint32_t en_clk_mask;
 125         uint32_t en_data_mask;
 126         uint32_t y_clk_mask;
 127         uint32_t y_data_mask;
 128 };
 129
 130 struct radeon_tmds_pll {
 131     uint32_t freq;
 132     uint32_t value;
 133 };
 134
 135 #define RADEON_MAX_BIOS_CONNECTOR 16
 136
 137 /* pll flags */
 138 #define RADEON_PLL_USE_BIOS_DIVS        (1 << 0)
 139 #define RADEON_PLL_NO_ODD_POST_DIV      (1 << 1)
 140 #define RADEON_PLL_USE_REF_DIV          (1 << 2)
 141 #define RADEON_PLL_LEGACY               (1 << 3)
 142 #define RADEON_PLL_PREFER_LOW_REF_DIV   (1 << 4)
 143 #define RADEON_PLL_PREFER_HIGH_REF_DIV  (1 << 5)
 144 #define RADEON_PLL_PREFER_LOW_FB_DIV    (1 << 6)
 145 #define RADEON_PLL_PREFER_HIGH_FB_DIV   (1 << 7)
 146 #define RADEON_PLL_PREFER_LOW_POST_DIV  (1 << 8)
 147 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
 148 #define RADEON_PLL_USE_FRAC_FB_DIV      (1 << 10)
 149 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
 150 #define RADEON_PLL_USE_POST_DIV         (1 << 12)
 151 #define RADEON_PLL_IS_LCD               (1 << 13)
 152
 153 /* pll algo */
 154 enum radeon_pll_algo {
 155         PLL_ALGO_LEGACY,
 156         PLL_ALGO_NEW
 157 };
 158
 159 struct radeon_pll {
 160         /* reference frequency */
 161         uint32_t reference_freq;
 162
 163         /* fixed dividers */
 164         uint32_t reference_div;
 165         uint32_t post_div;
 166
 167         /* pll in/out limits */
 168         uint32_t pll_in_min;
 169         uint32_t pll_in_max;
 170         uint32_t pll_out_min;
 171         uint32_t pll_out_max;
 172         uint32_t lcd_pll_out_min;
 173         uint32_t lcd_pll_out_max;
 174         uint32_t best_vco;
 175
 176         /* divider limits */
 177         uint32_t min_ref_div;
 178         uint32_t max_ref_div;
 179         uint32_t min_post_div;
 180         uint32_t max_post_div;
 181         uint32_t min_feedback_div;
 182         uint32_t max_feedback_div;
 183         uint32_t min_frac_feedback_div;
 184         uint32_t max_frac_feedback_div;
 185
 186         /* flags for the current clock */
 187         uint32_t flags;
 188
 189         /* pll id */
 190         uint32_t id;
 191         /* pll algo */
 192         enum radeon_pll_algo algo;
 193 };
 194
 195 struct radeon_i2c_chan {
 196         struct i2c_adapter adapter;
 197         struct drm_device *dev;
 198         union {
 199                 struct i2c_algo_bit_data bit;
 200                 struct i2c_algo_dp_aux_data dp;
 201         } algo;
 202         struct radeon_i2c_bus_rec rec;
 203 };
 204
 205 /* mostly for macs, but really any system without connector tables */
 206 enum radeon_connector_table {
 207         CT_NONE = 0,
 208         CT_GENERIC,
 209         CT_IBOOK,
 210         CT_POWERBOOK_EXTERNAL,
 211         CT_POWERBOOK_INTERNAL,
 212         CT_POWERBOOK_VGA,
 213         CT_MINI_EXTERNAL,
 214         CT_MINI_INTERNAL,
 215         CT_IMAC_G5_ISIGHT,
 216         CT_EMAC,
 217         CT_RN50_POWER,
 218         CT_MAC_X800,
 219 };
 220
 221 enum radeon_dvo_chip {
 222         DVO_SIL164,
 223         DVO_SIL1178,
 224 };
 225
 226 struct radeon_fbdev;
 227
 228 struct radeon_mode_info {
 229         struct atom_context *atom_context;
 230         struct card_info *atom_card_info;
 231         enum radeon_connector_table connector_table;
 232         bool mode_config_initialized;
 233         struct radeon_crtc *crtcs[6];
 234         /* DVI-I properties */
 235         struct drm_property *coherent_mode_property;
 236         /* DAC enable load detect */
 237         struct drm_property *load_detect_property;
 238         /* TV standard */
 239         struct drm_property *tv_std_property;
 240         /* legacy TMDS PLL detect */
 241         struct drm_property *tmds_pll_property;
 242         /* underscan */
 243         struct drm_property *underscan_property;
 244         /* hardcoded DFP edid from BIOS */
 245         struct edid *bios_hardcoded_edid;
 246
 247         /* pointer to fbdev info structure */
 248         struct radeon_fbdev *rfbdev;
 249 };
 250
 251 #define MAX_H_CODE_TIMING_LEN 32
 252 #define MAX_V_CODE_TIMING_LEN 32
 253
 254 /* need to store these as reading
 255    back code tables is excessive */
 256 struct radeon_tv_regs {
 257         uint32_t tv_uv_adr;
 258         uint32_t timing_cntl;
 259         uint32_t hrestart;
 260         uint32_t vrestart;
 261         uint32_t frestart;
 262         uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
 263         uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
 264 };
 265
 266 struct radeon_crtc {
 267         struct drm_crtc base;
 268         int crtc_id;
 269         u16 lut_r[256], lut_g[256], lut_b[256];
 270         bool enabled;
 271         bool can_tile;
 272         uint32_t crtc_offset;
 273         struct drm_gem_object *cursor_bo;
 274         uint64_t cursor_addr;
 275         int cursor_width;
 276         int cursor_height;
 277         uint32_t legacy_display_base_addr;
 278         uint32_t legacy_cursor_offset;
 279         enum radeon_rmx_type rmx_type;
 280         u8 h_border;
 281         u8 v_border;
 282         fixed20_12 vsc;
 283         fixed20_12 hsc;
 284         struct drm_display_mode native_mode;
 285         int pll_id;
 286 };
 287
 288 struct radeon_encoder_primary_dac {
 289         /* legacy primary dac */
 290         uint32_t ps2_pdac_adj;
 291 };
 292
 293 struct radeon_encoder_lvds {
 294         /* legacy lvds */
 295         uint16_t panel_vcc_delay;
 296         uint8_t  panel_pwr_delay;
 297         uint8_t  panel_digon_delay;
 298         uint8_t  panel_blon_delay;
 299         uint16_t panel_ref_divider;
 300         uint8_t  panel_post_divider;
 301         uint16_t panel_fb_divider;
 302         bool     use_bios_dividers;
 303         uint32_t lvds_gen_cntl;
 304         /* panel mode */
 305         struct drm_display_mode native_mode;
 306 };
 307
 308 struct radeon_encoder_tv_dac {
 309         /* legacy tv dac */
 310         uint32_t ps2_tvdac_adj;
 311         uint32_t ntsc_tvdac_adj;
 312         uint32_t pal_tvdac_adj;
 313
 314         int               h_pos;
 315         int               v_pos;
 316         int               h_size;
 317         int               supported_tv_stds;
 318         bool              tv_on;
 319         enum radeon_tv_std tv_std;
 320         struct radeon_tv_regs tv;
 321 };
 322
 323 struct radeon_encoder_int_tmds {
 324         /* legacy int tmds */
 325         struct radeon_tmds_pll tmds_pll[4];
 326 };
 327
 328 struct radeon_encoder_ext_tmds {
 329         /* tmds over dvo */
 330         struct radeon_i2c_chan *i2c_bus;
 331         uint8_t slave_addr;
 332         enum radeon_dvo_chip dvo_chip;
 333 };
 334
 335 /* spread spectrum */
 336 struct radeon_atom_ss {
 337         uint16_t percentage;
 338         uint8_t type;
 339         uint8_t step;
 340         uint8_t delay;
 341         uint8_t range;
 342         uint8_t refdiv;
 343 };
 344
 345 struct radeon_encoder_atom_dig {
 346         bool linkb;
 347         /* atom dig */
 348         bool coherent_mode;
 349         int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
 350         /* atom lvds */
 351         uint32_t lvds_misc;
 352         uint16_t panel_pwr_delay;
 353         enum radeon_pll_algo pll_algo;
 354         struct radeon_atom_ss *ss;
 355         /* panel mode */
 356         struct drm_display_mode native_mode;
 357 };
 358
 359 struct radeon_encoder_atom_dac {
 360         enum radeon_tv_std tv_std;
 361 };
 362
 363 struct radeon_encoder {
 364         struct drm_encoder base;
 365         uint32_t encoder_enum;
 366         uint32_t encoder_id;
 367         uint32_t devices;
 368         uint32_t active_device;
 369         uint32_t flags;
 370         uint32_t pixel_clock;
 371         enum radeon_rmx_type rmx_type;
 372         enum radeon_underscan_type underscan_type;
 373         struct drm_display_mode native_mode;
 374         void *enc_priv;
 375         int audio_polling_active;
 376         int hdmi_offset;
 377         int hdmi_config_offset;
 378         int hdmi_audio_workaround;
 379         int hdmi_buffer_status;
 380 };
 381
 382 struct radeon_connector_atom_dig {
 383         uint32_t igp_lane_info;
 384         /* displayport */
 385         struct radeon_i2c_chan *dp_i2c_bus;
 386         u8 dpcd[8];
 387         u8 dp_sink_type;
 388         int dp_clock;
 389         int dp_lane_count;
 390 };
 391
 392 struct radeon_gpio_rec {
 393         bool valid;
 394         u8 id;
 395         u32 reg;
 396         u32 mask;
 397 };
 398
 399 struct radeon_hpd {
 400         enum radeon_hpd_id hpd;
 401         u8 plugged_state;
 402         struct radeon_gpio_rec gpio;
 403 };
 404
 405 struct radeon_router {
 406         bool valid;
 407         u32 router_id;
 408         struct radeon_i2c_bus_rec i2c_info;
 409         u8 i2c_addr;
 410         u8 mux_type;
 411         u8 mux_control_pin;
 412         u8 mux_state;
 413 };
 414
 415 struct radeon_connector {
 416         struct drm_connector base;
 417         uint32_t connector_id;
 418         uint32_t devices;
 419         struct radeon_i2c_chan *ddc_bus;
 420         /* some systems have an hdmi and vga port with a shared ddc line */
 421         bool shared_ddc;
 422         bool use_digital;
 423         /* we need to mind the EDID between detect
 424            and get modes due to analog/digital/tvencoder */
 425         struct edid *edid;
 426         void *con_priv;
 427         bool dac_load_detect;
 428         uint16_t connector_object_id;
 429         struct radeon_hpd hpd;
 430         struct radeon_router router;
 431         struct radeon_i2c_chan *router_bus;
 432 };
 433
 434 struct radeon_framebuffer {
 435         struct drm_framebuffer base;
 436         struct drm_gem_object *obj;
 437 };
 438
 439 extern enum radeon_tv_std
 440 radeon_combios_get_tv_info(struct radeon_device *rdev);
 441 extern enum radeon_tv_std
 442 radeon_atombios_get_tv_info(struct radeon_device *rdev);
 443
 444 extern struct drm_connector *
 445 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
 446
 447 extern void radeon_connector_hotplug(struct drm_connector *connector);
 448 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
 449 extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
 450                                        struct drm_display_mode *mode);
 451 extern void radeon_dp_set_link_config(struct drm_connector *connector,
 452                                       struct drm_display_mode *mode);
 453 extern void dp_link_train(struct drm_encoder *encoder,
 454                           struct drm_connector *connector);
 455 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
 456 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
 457 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action);
 458 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
 459                                            int action, uint8_t lane_num,
 460                                            uint8_t lane_set);
 461 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
 462                                 uint8_t write_byte, uint8_t *read_byte);
 463
 464 extern void radeon_i2c_init(struct radeon_device *rdev);
 465 extern void radeon_i2c_fini(struct radeon_device *rdev);
 466 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
 467 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
 468 extern void radeon_i2c_add(struct radeon_device *rdev,
 469                            struct radeon_i2c_bus_rec *rec,
 470                            const char *name);
 471 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
 472                                                  struct radeon_i2c_bus_rec *i2c_bus);
 473 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
 474                                                     struct radeon_i2c_bus_rec *rec,
 475                                                     const char *name);
 476 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
 477                                                  struct radeon_i2c_bus_rec *rec,
 478                                                  const char *name);
 479 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
 480 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
 481                                 u8 slave_addr,
 482                                 u8 addr,
 483                                 u8 *val);
 484 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
 485                                 u8 slave_addr,
 486                                 u8 addr,
 487                                 u8 val);
 488 extern void radeon_router_select_port(struct radeon_connector *radeon_connector);
 489 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
 490 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
 491
 492 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
 493
 494 extern void radeon_compute_pll(struct radeon_pll *pll,
 495                                uint64_t freq,
 496                                uint32_t *dot_clock_p,
 497                                uint32_t *fb_div_p,
 498                                uint32_t *frac_fb_div_p,
 499                                uint32_t *ref_div_p,
 500                                uint32_t *post_div_p);
 501
 502 extern void radeon_setup_encoder_clones(struct drm_device *dev);
 503
 504 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
 505 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
 506 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
 507 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
 508 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
 509 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
 510 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
 511 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
 512 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
 513
 514 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
 515 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 516                                    struct drm_framebuffer *old_fb);
 517 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
 518                                    struct drm_display_mode *mode,
 519                                    struct drm_display_mode *adjusted_mode,
 520                                    int x, int y,
 521                                    struct drm_framebuffer *old_fb);
 522 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
 523
 524 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 525                                  struct drm_framebuffer *old_fb);
 526
 527 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
 528                                   struct drm_file *file_priv,
 529                                   uint32_t handle,
 530                                   uint32_t width,
 531                                   uint32_t height);
 532 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
 533                                    int x, int y);
 534
 535 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
 536 extern struct edid *
 537 radeon_combios_get_hardcoded_edid(struct radeon_device *rdev);
 538 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
 539 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
 540 extern struct radeon_encoder_atom_dig *
 541 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
 542 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
 543                                           struct radeon_encoder_int_tmds *tmds);
 544 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
 545                                                      struct radeon_encoder_int_tmds *tmds);
 546 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
 547                                                    struct radeon_encoder_int_tmds *tmds);
 548 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
 549                                                          struct radeon_encoder_ext_tmds *tmds);
 550 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
 551                                                        struct radeon_encoder_ext_tmds *tmds);
 552 extern struct radeon_encoder_primary_dac *
 553 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
 554 extern struct radeon_encoder_tv_dac *
 555 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
 556 extern struct radeon_encoder_lvds *
 557 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
 558 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
 559 extern struct radeon_encoder_tv_dac *
 560 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
 561 extern struct radeon_encoder_primary_dac *
 562 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
 563 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
 564 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
 565 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
 566 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
 567 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
 568 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
 569 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
 570 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
 571 extern void
 572 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 573 extern void
 574 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
 575 extern void
 576 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 577 extern void
 578 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
 579 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 580                                      u16 blue, int regno);
 581 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 582                                      u16 *blue, int regno);
 583 void radeon_framebuffer_init(struct drm_device *dev,
 584                              struct radeon_framebuffer *rfb,
 585                              struct drm_mode_fb_cmd *mode_cmd,
 586                              struct drm_gem_object *obj);
 587
 588 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
 589 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
 590 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
 591 void radeon_atombios_init_crtc(struct drm_device *dev,
 592                                struct radeon_crtc *radeon_crtc);
 593 void radeon_legacy_init_crtc(struct drm_device *dev,
 594                              struct radeon_crtc *radeon_crtc);
 595
 596 void radeon_get_clock_info(struct drm_device *dev);
 597
 598 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
 599 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
 600
 601 void radeon_enc_destroy(struct drm_encoder *encoder);
 602 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
 603 void radeon_combios_asic_init(struct drm_device *dev);
 604 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
 605                                         struct drm_display_mode *mode,
 606                                         struct drm_display_mode *adjusted_mode);
 607 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
 608                              struct drm_display_mode *adjusted_mode);
 609 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
 610
 611 /* legacy tv */
 612 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
 613                                       uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
 614                                       uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
 615 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
 616                                   uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
 617                                   uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
 618 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
 619                                   uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
 620                                   uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
 621 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
 622                                struct drm_display_mode *mode,
 623                                struct drm_display_mode *adjusted_mode);
 624
 625 /* fbdev layer */
 626 int radeon_fbdev_init(struct radeon_device *rdev);
 627 void radeon_fbdev_fini(struct radeon_device *rdev);
 628 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
 629 int radeon_fbdev_total_size(struct radeon_device *rdev);
 630 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
 631
 632 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
 633 #endif