release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/gpu/drm/radeon/radeon_gart.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include "drmP.h"
  29 #include "radeon_drm.h"
  30 #include "radeon.h"
  31 #include "radeon_reg.h"
  32
  33 /*
  34  * Common GART table functions.
  35  */
  36 int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
  37 {
  38         void *ptr;
  39
  40         ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size,
  41                                    &rdev->gart.table_addr);
  42         if (ptr == NULL) {
  43                 return -ENOMEM;
  44         }
  45 #ifdef CONFIG_X86
  46         if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
  47             rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
  48                 set_memory_uc((unsigned long)ptr,
  49                               rdev->gart.table_size >> PAGE_SHIFT);
  50         }
  51 #endif
  52         rdev->gart.table.ram.ptr = ptr;
  53         memset((void *)rdev->gart.table.ram.ptr, 0, rdev->gart.table_size);
  54         return 0;
  55 }
  56
  57 void radeon_gart_table_ram_free(struct radeon_device *rdev)
  58 {
  59         if (rdev->gart.table.ram.ptr == NULL) {
  60                 return;
  61         }
  62 #ifdef CONFIG_X86
  63         if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
  64             rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
  65                 set_memory_wb((unsigned long)rdev->gart.table.ram.ptr,
  66                               rdev->gart.table_size >> PAGE_SHIFT);
  67         }
  68 #endif
  69         pci_free_consistent(rdev->pdev, rdev->gart.table_size,
  70                             (void *)rdev->gart.table.ram.ptr,
  71                             rdev->gart.table_addr);
  72         rdev->gart.table.ram.ptr = NULL;
  73         rdev->gart.table_addr = 0;
  74 }
  75
  76 int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
  77 {
  78         int r;
  79
  80         if (rdev->gart.table.vram.robj == NULL) {
  81                 r = radeon_bo_create(rdev, NULL, rdev->gart.table_size,
  82                                         true, RADEON_GEM_DOMAIN_VRAM,
  83                                         &rdev->gart.table.vram.robj);
  84                 if (r) {
  85                         return r;
  86                 }
  87         }
  88         return 0;
  89 }
  90
  91 int radeon_gart_table_vram_pin(struct radeon_device *rdev)
  92 {
  93         uint64_t gpu_addr;
  94         int r;
  95
  96         r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
  97         if (unlikely(r != 0))
  98                 return r;
  99         r = radeon_bo_pin(rdev->gart.table.vram.robj,
 100                                 RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
 101         if (r) {
 102                 radeon_bo_unreserve(rdev->gart.table.vram.robj);
 103                 return r;
 104         }
 105         r = radeon_bo_kmap(rdev->gart.table.vram.robj,
 106                                 (void **)&rdev->gart.table.vram.ptr);
 107         if (r)
 108                 radeon_bo_unpin(rdev->gart.table.vram.robj);
 109         radeon_bo_unreserve(rdev->gart.table.vram.robj);
 110         rdev->gart.table_addr = gpu_addr;
 111         return r;
 112 }
 113
 114 void radeon_gart_table_vram_free(struct radeon_device *rdev)
 115 {
 116         int r;
 117
 118         if (rdev->gart.table.vram.robj == NULL) {
 119                 return;
 120         }
 121         r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
 122         if (likely(r == 0)) {
 123                 radeon_bo_kunmap(rdev->gart.table.vram.robj);
 124                 radeon_bo_unpin(rdev->gart.table.vram.robj);
 125                 radeon_bo_unreserve(rdev->gart.table.vram.robj);
 126         }
 127         radeon_bo_unref(&rdev->gart.table.vram.robj);
 128 }
 129
 130
 131
 132
 133 /*
 134  * Common gart functions.
 135  */
 136 void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
 137                         int pages)
 138 {
 139         unsigned t;
 140         unsigned p;
 141         int i, j;
 142         u64 page_base;
 143
 144         if (!rdev->gart.ready) {
 145                 WARN(1, "trying to unbind memory to unitialized GART !\n");
 146                 return;
 147         }
 148         t = offset / RADEON_GPU_PAGE_SIZE;
 149         p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 150         for (i = 0; i < pages; i++, p++) {
 151                 if (rdev->gart.pages[p]) {
 152                         pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p],
 153                                        PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 154                         rdev->gart.pages[p] = NULL;
 155                         rdev->gart.pages_addr[p] = rdev->dummy_page.addr;
 156                         page_base = rdev->gart.pages_addr[p];
 157                         for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
 158                                 radeon_gart_set_page(rdev, t, page_base);
 159                                 page_base += RADEON_GPU_PAGE_SIZE;
 160                         }
 161                 }
 162         }
 163         mb();
 164         radeon_gart_tlb_flush(rdev);
 165 }
 166
 167 int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
 168                      int pages, struct page **pagelist)
 169 {
 170         unsigned t;
 171         unsigned p;
 172         uint64_t page_base;
 173         int i, j;
 174
 175         if (!rdev->gart.ready) {
 176                 WARN(1, "trying to bind memory to unitialized GART !\n");
 177                 return -EINVAL;
 178         }
 179         t = offset / RADEON_GPU_PAGE_SIZE;
 180         p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 181
 182         for (i = 0; i < pages; i++, p++) {
 183                 /* we need to support large memory configurations */
 184                 /* assume that unbind have already been call on the range */
 185                 rdev->gart.pages_addr[p] = pci_map_page(rdev->pdev, pagelist[i],
 186                                                         0, PAGE_SIZE,
 187                                                         PCI_DMA_BIDIRECTIONAL);
 188                 if (pci_dma_mapping_error(rdev->pdev, rdev->gart.pages_addr[p])) {
 189                         radeon_gart_unbind(rdev, offset, pages);
 190                         return -ENOMEM;
 191                 }
 192                 rdev->gart.pages[p] = pagelist[i];
 193                 page_base = rdev->gart.pages_addr[p];
 194                 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
 195                         radeon_gart_set_page(rdev, t, page_base);
 196                         page_base += RADEON_GPU_PAGE_SIZE;
 197                 }
 198         }
 199         mb();
 200         radeon_gart_tlb_flush(rdev);
 201         return 0;
 202 }
 203
 204 void radeon_gart_restore(struct radeon_device *rdev)
 205 {
 206         int i, j, t;
 207         u64 page_base;
 208
 209         for (i = 0, t = 0; i < rdev->gart.num_cpu_pages; i++) {
 210                 page_base = rdev->gart.pages_addr[i];
 211                 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
 212                         radeon_gart_set_page(rdev, t, page_base);
 213                         page_base += RADEON_GPU_PAGE_SIZE;
 214                 }
 215         }
 216         mb();
 217         radeon_gart_tlb_flush(rdev);
 218 }
 219
 220 int radeon_gart_init(struct radeon_device *rdev)
 221 {
 222         int r, i;
 223
 224         if (rdev->gart.pages) {
 225                 return 0;
 226         }
 227         /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
 228         if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
 229                 DRM_ERROR("Page size is smaller than GPU page size!\n");
 230                 return -EINVAL;
 231         }
 232         r = radeon_dummy_page_init(rdev);
 233         if (r)
 234                 return r;
 235         /* Compute table size */
 236         rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
 237         rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
 238         DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
 239                  rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
 240         /* Allocate pages table */
 241         rdev->gart.pages = kzalloc(sizeof(void *) * rdev->gart.num_cpu_pages,
 242                                    GFP_KERNEL);
 243         if (rdev->gart.pages == NULL) {
 244                 radeon_gart_fini(rdev);
 245                 return -ENOMEM;
 246         }
 247         rdev->gart.pages_addr = kzalloc(sizeof(dma_addr_t) *
 248                                         rdev->gart.num_cpu_pages, GFP_KERNEL);
 249         if (rdev->gart.pages_addr == NULL) {
 250                 radeon_gart_fini(rdev);
 251                 return -ENOMEM;
 252         }
 253         /* set GART entry to point to the dummy page by default */
 254         for (i = 0; i < rdev->gart.num_cpu_pages; i++) {
 255                 rdev->gart.pages_addr[i] = rdev->dummy_page.addr;
 256         }
 257         return 0;
 258 }
 259
 260 void radeon_gart_fini(struct radeon_device *rdev)
 261 {
 262         if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) {
 263                 /* unbind pages */
 264                 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
 265         }
 266         rdev->gart.ready = false;
 267         kfree(rdev->gart.pages);
 268         kfree(rdev->gart.pages_addr);
 269         rdev->gart.pages = NULL;
 270         rdev->gart.pages_addr = NULL;
 271 }