GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / gpu / drm / i915 / intel_dvo.c
blob76cc14766db451177190df535f879bf5e8a32034
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include "drmP.h"
30 #include "drm.h"
31 #include "drm_crtc.h"
32 #include "intel_drv.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
35 #include "dvo.h"
37 #define SIL164_ADDR 0x38
38 #define CH7xxx_ADDR 0x76
39 #define TFP410_ADDR 0x38
41 static const struct intel_dvo_device intel_dvo_devices[] = {
43 .type = INTEL_DVO_CHIP_TMDS,
44 .name = "sil164",
45 .dvo_reg = DVOC,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
50 .type = INTEL_DVO_CHIP_TMDS,
51 .name = "ch7xxx",
52 .dvo_reg = DVOC,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
57 .type = INTEL_DVO_CHIP_LVDS,
58 .name = "ivch",
59 .dvo_reg = DVOA,
60 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
61 .dev_ops = &ivch_ops,
64 .type = INTEL_DVO_CHIP_TMDS,
65 .name = "tfp410",
66 .dvo_reg = DVOC,
67 .slave_addr = TFP410_ADDR,
68 .dev_ops = &tfp410_ops,
71 .type = INTEL_DVO_CHIP_LVDS,
72 .name = "ch7017",
73 .dvo_reg = DVOC,
74 .slave_addr = 0x75,
75 .gpio = GPIOE,
76 .dev_ops = &ch7017_ops,
80 struct intel_dvo {
81 struct intel_encoder base;
83 struct intel_dvo_device dev;
85 struct drm_display_mode *panel_fixed_mode;
86 bool panel_wants_dither;
89 static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
91 return container_of(enc_to_intel_encoder(encoder), struct intel_dvo, base);
94 static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
96 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
97 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
98 u32 dvo_reg = intel_dvo->dev.dvo_reg;
99 u32 temp = I915_READ(dvo_reg);
101 if (mode == DRM_MODE_DPMS_ON) {
102 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
103 I915_READ(dvo_reg);
104 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
105 } else {
106 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
107 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
108 I915_READ(dvo_reg);
112 static int intel_dvo_mode_valid(struct drm_connector *connector,
113 struct drm_display_mode *mode)
115 struct drm_encoder *encoder = intel_attached_encoder(connector);
116 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
118 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
119 return MODE_NO_DBLESCAN;
122 if (intel_dvo->panel_fixed_mode) {
123 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
124 return MODE_PANEL;
125 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
126 return MODE_PANEL;
129 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
132 static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
133 struct drm_display_mode *mode,
134 struct drm_display_mode *adjusted_mode)
136 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
138 /* If we have timings from the BIOS for the panel, put them in
139 * to the adjusted mode. The CRTC will be set up for this mode,
140 * with the panel scaling set up to source from the H/VDisplay
141 * of the original mode.
143 if (intel_dvo->panel_fixed_mode != NULL) {
144 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
145 C(hdisplay);
146 C(hsync_start);
147 C(hsync_end);
148 C(htotal);
149 C(vdisplay);
150 C(vsync_start);
151 C(vsync_end);
152 C(vtotal);
153 C(clock);
154 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
155 #undef C
158 if (intel_dvo->dev.dev_ops->mode_fixup)
159 return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
161 return true;
164 static void intel_dvo_mode_set(struct drm_encoder *encoder,
165 struct drm_display_mode *mode,
166 struct drm_display_mode *adjusted_mode)
168 struct drm_device *dev = encoder->dev;
169 struct drm_i915_private *dev_priv = dev->dev_private;
170 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
171 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
172 int pipe = intel_crtc->pipe;
173 u32 dvo_val;
174 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
175 int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
177 switch (dvo_reg) {
178 case DVOA:
179 default:
180 dvo_srcdim_reg = DVOA_SRCDIM;
181 break;
182 case DVOB:
183 dvo_srcdim_reg = DVOB_SRCDIM;
184 break;
185 case DVOC:
186 dvo_srcdim_reg = DVOC_SRCDIM;
187 break;
190 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
192 /* Save the data order, since I don't know what it should be set to. */
193 dvo_val = I915_READ(dvo_reg) &
194 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
195 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
196 DVO_BLANK_ACTIVE_HIGH;
198 if (pipe == 1)
199 dvo_val |= DVO_PIPE_B_SELECT;
200 dvo_val |= DVO_PIPE_STALL;
201 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
202 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
203 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
204 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
206 I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
208 /*I915_WRITE(DVOB_SRCDIM,
209 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
210 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
211 I915_WRITE(dvo_srcdim_reg,
212 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
213 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
214 /*I915_WRITE(DVOB, dvo_val);*/
215 I915_WRITE(dvo_reg, dvo_val);
219 * Detect the output connection on our DVO device.
221 * Unimplemented.
223 static enum drm_connector_status
224 intel_dvo_detect(struct drm_connector *connector, bool force)
226 struct drm_encoder *encoder = intel_attached_encoder(connector);
227 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
229 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
232 static int intel_dvo_get_modes(struct drm_connector *connector)
234 struct drm_encoder *encoder = intel_attached_encoder(connector);
235 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
237 /* We should probably have an i2c driver get_modes function for those
238 * devices which will have a fixed set of modes determined by the chip
239 * (TV-out, for example), but for now with just TMDS and LVDS,
240 * that's not the case.
242 intel_ddc_get_modes(connector, intel_dvo->base.ddc_bus);
243 if (!list_empty(&connector->probed_modes))
244 return 1;
246 if (intel_dvo->panel_fixed_mode != NULL) {
247 struct drm_display_mode *mode;
248 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
249 if (mode) {
250 drm_mode_probed_add(connector, mode);
251 return 1;
255 return 0;
258 static void intel_dvo_destroy(struct drm_connector *connector)
260 drm_sysfs_connector_remove(connector);
261 drm_connector_cleanup(connector);
262 kfree(connector);
265 static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
266 .dpms = intel_dvo_dpms,
267 .mode_fixup = intel_dvo_mode_fixup,
268 .prepare = intel_encoder_prepare,
269 .mode_set = intel_dvo_mode_set,
270 .commit = intel_encoder_commit,
273 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
274 .dpms = drm_helper_connector_dpms,
275 .detect = intel_dvo_detect,
276 .destroy = intel_dvo_destroy,
277 .fill_modes = drm_helper_probe_single_connector_modes,
280 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
281 .mode_valid = intel_dvo_mode_valid,
282 .get_modes = intel_dvo_get_modes,
283 .best_encoder = intel_attached_encoder,
286 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
288 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
290 if (intel_dvo->dev.dev_ops->destroy)
291 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
293 kfree(intel_dvo->panel_fixed_mode);
295 intel_encoder_destroy(encoder);
298 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
299 .destroy = intel_dvo_enc_destroy,
303 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
305 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
306 * chip being on DVOB/C and having multiple pipes.
308 static struct drm_display_mode *
309 intel_dvo_get_current_mode(struct drm_connector *connector)
311 struct drm_device *dev = connector->dev;
312 struct drm_i915_private *dev_priv = dev->dev_private;
313 struct drm_encoder *encoder = intel_attached_encoder(connector);
314 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
315 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
316 struct drm_display_mode *mode = NULL;
318 /* If the DVO port is active, that'll be the LVDS, so we can pull out
319 * its timings to get how the BIOS set up the panel.
321 if (dvo_val & DVO_ENABLE) {
322 struct drm_crtc *crtc;
323 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
325 crtc = intel_get_crtc_from_pipe(dev, pipe);
326 if (crtc) {
327 mode = intel_crtc_mode_get(dev, crtc);
328 if (mode) {
329 mode->type |= DRM_MODE_TYPE_PREFERRED;
330 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
331 mode->flags |= DRM_MODE_FLAG_PHSYNC;
332 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
333 mode->flags |= DRM_MODE_FLAG_PVSYNC;
338 return mode;
341 void intel_dvo_init(struct drm_device *dev)
343 struct intel_encoder *intel_encoder;
344 struct intel_dvo *intel_dvo;
345 struct intel_connector *intel_connector;
346 struct i2c_adapter *i2cbus = NULL;
347 int ret = 0;
348 int i;
349 int encoder_type = DRM_MODE_ENCODER_NONE;
351 intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
352 if (!intel_dvo)
353 return;
355 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
356 if (!intel_connector) {
357 kfree(intel_dvo);
358 return;
361 intel_encoder = &intel_dvo->base;
363 /* Set up the DDC bus */
364 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D");
365 if (!intel_encoder->ddc_bus)
366 goto free_intel;
368 /* Now, try to find a controller */
369 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
370 struct drm_connector *connector = &intel_connector->base;
371 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
372 int gpio;
374 /* Allow the I2C driver info to specify the GPIO to be used in
375 * special cases, but otherwise default to what's defined
376 * in the spec.
378 if (dvo->gpio != 0)
379 gpio = dvo->gpio;
380 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
381 gpio = GPIOB;
382 else
383 gpio = GPIOE;
385 /* Set up the I2C bus necessary for the chip we're probing.
386 * It appears that everything is on GPIOE except for panels
387 * on i830 laptops, which are on GPIOB (DVOA).
389 if (i2cbus != NULL)
390 intel_i2c_destroy(i2cbus);
391 if (!(i2cbus = intel_i2c_create(dev, gpio,
392 gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
393 continue;
396 intel_dvo->dev = *dvo;
397 ret = dvo->dev_ops->init(&intel_dvo->dev, i2cbus);
398 if (!ret)
399 continue;
401 intel_encoder->type = INTEL_OUTPUT_DVO;
402 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
403 switch (dvo->type) {
404 case INTEL_DVO_CHIP_TMDS:
405 intel_encoder->clone_mask =
406 (1 << INTEL_DVO_TMDS_CLONE_BIT) |
407 (1 << INTEL_ANALOG_CLONE_BIT);
408 drm_connector_init(dev, connector,
409 &intel_dvo_connector_funcs,
410 DRM_MODE_CONNECTOR_DVII);
411 encoder_type = DRM_MODE_ENCODER_TMDS;
412 break;
413 case INTEL_DVO_CHIP_LVDS:
414 intel_encoder->clone_mask =
415 (1 << INTEL_DVO_LVDS_CLONE_BIT);
416 drm_connector_init(dev, connector,
417 &intel_dvo_connector_funcs,
418 DRM_MODE_CONNECTOR_LVDS);
419 encoder_type = DRM_MODE_ENCODER_LVDS;
420 break;
423 drm_connector_helper_add(connector,
424 &intel_dvo_connector_helper_funcs);
425 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
426 connector->interlace_allowed = false;
427 connector->doublescan_allowed = false;
429 drm_encoder_init(dev, &intel_encoder->enc,
430 &intel_dvo_enc_funcs, encoder_type);
431 drm_encoder_helper_add(&intel_encoder->enc,
432 &intel_dvo_helper_funcs);
434 drm_mode_connector_attach_encoder(&intel_connector->base,
435 &intel_encoder->enc);
436 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
437 /* For our LVDS chipsets, we should hopefully be able
438 * to dig the fixed panel mode out of the BIOS data.
439 * However, it's in a different format from the BIOS
440 * data on chipsets with integrated LVDS (stored in AIM
441 * headers, likely), so for now, just get the current
442 * mode being output through DVO.
444 intel_dvo->panel_fixed_mode =
445 intel_dvo_get_current_mode(connector);
446 intel_dvo->panel_wants_dither = true;
449 drm_sysfs_connector_add(connector);
450 return;
453 intel_i2c_destroy(intel_encoder->ddc_bus);
454 /* Didn't find a chip, so tear down. */
455 if (i2cbus != NULL)
456 intel_i2c_destroy(i2cbus);
457 free_intel:
458 kfree(intel_dvo);
459 kfree(intel_connector);