GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / gpu / drm / i915 / intel_crt.c
blobf27843a03b794751e600c9a65652ac4e62eeba3b
1 /*
2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include "drmP.h"
30 #include "drm.h"
31 #include "drm_crtc.h"
32 #include "drm_crtc_helper.h"
33 #include "intel_drv.h"
34 #include "i915_drm.h"
35 #include "i915_drv.h"
37 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
39 struct drm_device *dev = encoder->dev;
40 struct drm_i915_private *dev_priv = dev->dev_private;
41 u32 temp, reg;
43 if (HAS_PCH_SPLIT(dev))
44 reg = PCH_ADPA;
45 else
46 reg = ADPA;
48 temp = I915_READ(reg);
49 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
50 temp &= ~ADPA_DAC_ENABLE;
52 switch(mode) {
53 case DRM_MODE_DPMS_ON:
54 temp |= ADPA_DAC_ENABLE;
55 break;
56 case DRM_MODE_DPMS_STANDBY:
57 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
58 break;
59 case DRM_MODE_DPMS_SUSPEND:
60 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
61 break;
62 case DRM_MODE_DPMS_OFF:
63 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
64 break;
67 I915_WRITE(reg, temp);
70 static int intel_crt_mode_valid(struct drm_connector *connector,
71 struct drm_display_mode *mode)
73 struct drm_device *dev = connector->dev;
75 int max_clock = 0;
76 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
77 return MODE_NO_DBLESCAN;
79 if (mode->clock < 25000)
80 return MODE_CLOCK_LOW;
82 if (!IS_I9XX(dev))
83 max_clock = 350000;
84 else
85 max_clock = 400000;
86 if (mode->clock > max_clock)
87 return MODE_CLOCK_HIGH;
89 return MODE_OK;
92 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
93 struct drm_display_mode *mode,
94 struct drm_display_mode *adjusted_mode)
96 return true;
99 static void intel_crt_mode_set(struct drm_encoder *encoder,
100 struct drm_display_mode *mode,
101 struct drm_display_mode *adjusted_mode)
104 struct drm_device *dev = encoder->dev;
105 struct drm_crtc *crtc = encoder->crtc;
106 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
107 struct drm_i915_private *dev_priv = dev->dev_private;
108 int dpll_md_reg;
109 u32 adpa, dpll_md;
110 u32 adpa_reg;
112 if (intel_crtc->pipe == 0)
113 dpll_md_reg = DPLL_A_MD;
114 else
115 dpll_md_reg = DPLL_B_MD;
117 if (HAS_PCH_SPLIT(dev))
118 adpa_reg = PCH_ADPA;
119 else
120 adpa_reg = ADPA;
122 if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) {
123 dpll_md = I915_READ(dpll_md_reg);
124 I915_WRITE(dpll_md_reg,
125 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
128 adpa = 0;
129 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
130 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
131 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
132 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
134 if (intel_crtc->pipe == 0) {
135 if (HAS_PCH_CPT(dev))
136 adpa |= PORT_TRANS_A_SEL_CPT;
137 else
138 adpa |= ADPA_PIPE_A_SELECT;
139 if (!HAS_PCH_SPLIT(dev))
140 I915_WRITE(BCLRPAT_A, 0);
141 } else {
142 if (HAS_PCH_CPT(dev))
143 adpa |= PORT_TRANS_B_SEL_CPT;
144 else
145 adpa |= ADPA_PIPE_B_SELECT;
146 if (!HAS_PCH_SPLIT(dev))
147 I915_WRITE(BCLRPAT_B, 0);
150 I915_WRITE(adpa_reg, adpa);
153 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
155 struct drm_device *dev = connector->dev;
156 struct drm_i915_private *dev_priv = dev->dev_private;
157 u32 adpa, temp;
158 bool ret;
159 bool turn_off_dac = false;
161 temp = adpa = I915_READ(PCH_ADPA);
163 if (HAS_PCH_SPLIT(dev))
164 turn_off_dac = true;
166 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
167 if (turn_off_dac)
168 adpa &= ~ADPA_DAC_ENABLE;
170 /* disable HPD first */
171 I915_WRITE(PCH_ADPA, adpa);
172 (void)I915_READ(PCH_ADPA);
174 adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
175 ADPA_CRT_HOTPLUG_WARMUP_10MS |
176 ADPA_CRT_HOTPLUG_SAMPLE_4S |
177 ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
178 ADPA_CRT_HOTPLUG_VOLREF_325MV |
179 ADPA_CRT_HOTPLUG_ENABLE |
180 ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
182 DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
183 I915_WRITE(PCH_ADPA, adpa);
185 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
186 1000, 1))
187 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
189 if (turn_off_dac) {
190 /* Make sure hotplug is enabled */
191 I915_WRITE(PCH_ADPA, temp | ADPA_CRT_HOTPLUG_ENABLE);
192 (void)I915_READ(PCH_ADPA);
195 /* Check the status to see if both blue and green are on now */
196 adpa = I915_READ(PCH_ADPA);
197 adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
198 if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
199 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
200 ret = true;
201 else
202 ret = false;
204 return ret;
208 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
210 * Not for i915G/i915GM
212 * \return true if CRT is connected.
213 * \return false if CRT is disconnected.
215 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
217 struct drm_device *dev = connector->dev;
218 struct drm_i915_private *dev_priv = dev->dev_private;
219 u32 hotplug_en, orig, stat;
220 bool ret = false;
221 int i, tries = 0;
223 if (HAS_PCH_SPLIT(dev))
224 return intel_ironlake_crt_detect_hotplug(connector);
227 * On 4 series desktop, CRT detect sequence need to be done twice
228 * to get a reliable result.
231 if (IS_G4X(dev) && !IS_GM45(dev))
232 tries = 2;
233 else
234 tries = 1;
235 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
236 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
238 for (i = 0; i < tries ; i++) {
239 /* turn on the FORCE_DETECT */
240 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
241 /* wait for FORCE_DETECT to go off */
242 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
243 CRT_HOTPLUG_FORCE_DETECT) == 0,
244 1000, 1))
245 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
248 stat = I915_READ(PORT_HOTPLUG_STAT);
249 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
250 ret = true;
252 /* clear the interrupt we just generated, if any */
253 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
255 /* and put the bits back */
256 I915_WRITE(PORT_HOTPLUG_EN, orig);
258 return ret;
261 static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
263 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
265 /* CRT should always be at 0, but check anyway */
266 if (intel_encoder->type != INTEL_OUTPUT_ANALOG)
267 return false;
269 return intel_ddc_probe(intel_encoder);
272 static enum drm_connector_status
273 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder)
275 struct drm_encoder *encoder = &intel_encoder->enc;
276 struct drm_device *dev = encoder->dev;
277 struct drm_i915_private *dev_priv = dev->dev_private;
278 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
279 uint32_t pipe = intel_crtc->pipe;
280 uint32_t save_bclrpat;
281 uint32_t save_vtotal;
282 uint32_t vtotal, vactive;
283 uint32_t vsample;
284 uint32_t vblank, vblank_start, vblank_end;
285 uint32_t dsl;
286 uint32_t bclrpat_reg;
287 uint32_t vtotal_reg;
288 uint32_t vblank_reg;
289 uint32_t vsync_reg;
290 uint32_t pipeconf_reg;
291 uint32_t pipe_dsl_reg;
292 uint8_t st00;
293 enum drm_connector_status status;
295 if (pipe == 0) {
296 bclrpat_reg = BCLRPAT_A;
297 vtotal_reg = VTOTAL_A;
298 vblank_reg = VBLANK_A;
299 vsync_reg = VSYNC_A;
300 pipeconf_reg = PIPEACONF;
301 pipe_dsl_reg = PIPEADSL;
302 } else {
303 bclrpat_reg = BCLRPAT_B;
304 vtotal_reg = VTOTAL_B;
305 vblank_reg = VBLANK_B;
306 vsync_reg = VSYNC_B;
307 pipeconf_reg = PIPEBCONF;
308 pipe_dsl_reg = PIPEBDSL;
311 save_bclrpat = I915_READ(bclrpat_reg);
312 save_vtotal = I915_READ(vtotal_reg);
313 vblank = I915_READ(vblank_reg);
315 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
316 vactive = (save_vtotal & 0x7ff) + 1;
318 vblank_start = (vblank & 0xfff) + 1;
319 vblank_end = ((vblank >> 16) & 0xfff) + 1;
321 /* Set the border color to purple. */
322 I915_WRITE(bclrpat_reg, 0x500050);
324 if (IS_I9XX(dev)) {
325 uint32_t pipeconf = I915_READ(pipeconf_reg);
326 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
327 /* Wait for next Vblank to substitue
328 * border color for Color info */
329 intel_wait_for_vblank(dev, pipe);
330 st00 = I915_READ8(VGA_MSR_WRITE);
331 status = ((st00 & (1 << 4)) != 0) ?
332 connector_status_connected :
333 connector_status_disconnected;
335 I915_WRITE(pipeconf_reg, pipeconf);
336 } else {
337 bool restore_vblank = false;
338 int count, detect;
341 * If there isn't any border, add some.
342 * Yes, this will flicker
344 if (vblank_start <= vactive && vblank_end >= vtotal) {
345 uint32_t vsync = I915_READ(vsync_reg);
346 uint32_t vsync_start = (vsync & 0xffff) + 1;
348 vblank_start = vsync_start;
349 I915_WRITE(vblank_reg,
350 (vblank_start - 1) |
351 ((vblank_end - 1) << 16));
352 restore_vblank = true;
354 /* sample in the vertical border, selecting the larger one */
355 if (vblank_start - vactive >= vtotal - vblank_end)
356 vsample = (vblank_start + vactive) >> 1;
357 else
358 vsample = (vtotal + vblank_end) >> 1;
361 * Wait for the border to be displayed
363 while (I915_READ(pipe_dsl_reg) >= vactive)
365 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
368 * Watch ST00 for an entire scanline
370 detect = 0;
371 count = 0;
372 do {
373 count++;
374 /* Read the ST00 VGA status register */
375 st00 = I915_READ8(VGA_MSR_WRITE);
376 if (st00 & (1 << 4))
377 detect++;
378 } while ((I915_READ(pipe_dsl_reg) == dsl));
380 /* restore vblank if necessary */
381 if (restore_vblank)
382 I915_WRITE(vblank_reg, vblank);
384 * If more than 3/4 of the scanline detected a monitor,
385 * then it is assumed to be present. This works even on i830,
386 * where there isn't any way to force the border color across
387 * the screen
389 status = detect * 4 > count * 3 ?
390 connector_status_connected :
391 connector_status_disconnected;
394 /* Restore previous settings */
395 I915_WRITE(bclrpat_reg, save_bclrpat);
397 return status;
400 static enum drm_connector_status
401 intel_crt_detect(struct drm_connector *connector, bool force)
403 struct drm_device *dev = connector->dev;
404 struct drm_encoder *encoder = intel_attached_encoder(connector);
405 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
406 struct drm_crtc *crtc;
407 int dpms_mode;
408 enum drm_connector_status status;
410 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
411 if (intel_crt_detect_hotplug(connector))
412 return connector_status_connected;
413 else
414 return connector_status_disconnected;
417 if (intel_crt_detect_ddc(encoder))
418 return connector_status_connected;
420 if (!force)
421 return connector->status;
423 /* for pre-945g platforms use load detect */
424 if (encoder->crtc && encoder->crtc->enabled) {
425 status = intel_crt_load_detect(encoder->crtc, intel_encoder);
426 } else {
427 crtc = intel_get_load_detect_pipe(intel_encoder, connector,
428 NULL, &dpms_mode);
429 if (crtc) {
430 status = intel_crt_load_detect(crtc, intel_encoder);
431 intel_release_load_detect_pipe(intel_encoder,
432 connector, dpms_mode);
433 } else
434 status = connector_status_unknown;
437 return status;
440 static void intel_crt_destroy(struct drm_connector *connector)
442 drm_sysfs_connector_remove(connector);
443 drm_connector_cleanup(connector);
444 kfree(connector);
447 static int intel_crt_get_modes(struct drm_connector *connector)
449 int ret;
450 struct drm_encoder *encoder = intel_attached_encoder(connector);
451 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
452 struct i2c_adapter *ddc_bus;
453 struct drm_device *dev = connector->dev;
456 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
457 if (ret || !IS_G4X(dev))
458 goto end;
460 /* Try to probe digital port for output in DVI-I -> VGA mode. */
461 ddc_bus = intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
463 if (!ddc_bus) {
464 dev_printk(KERN_ERR, &connector->dev->pdev->dev,
465 "DDC bus registration failed for CRTDDC_D.\n");
466 goto end;
468 /* Try to get modes by GPIOD port */
469 ret = intel_ddc_get_modes(connector, ddc_bus);
470 intel_i2c_destroy(ddc_bus);
472 end:
473 return ret;
477 static int intel_crt_set_property(struct drm_connector *connector,
478 struct drm_property *property,
479 uint64_t value)
481 return 0;
485 * Routines for controlling stuff on the analog port
488 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
489 .dpms = intel_crt_dpms,
490 .mode_fixup = intel_crt_mode_fixup,
491 .prepare = intel_encoder_prepare,
492 .commit = intel_encoder_commit,
493 .mode_set = intel_crt_mode_set,
496 static const struct drm_connector_funcs intel_crt_connector_funcs = {
497 .dpms = drm_helper_connector_dpms,
498 .detect = intel_crt_detect,
499 .fill_modes = drm_helper_probe_single_connector_modes,
500 .destroy = intel_crt_destroy,
501 .set_property = intel_crt_set_property,
504 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
505 .mode_valid = intel_crt_mode_valid,
506 .get_modes = intel_crt_get_modes,
507 .best_encoder = intel_attached_encoder,
510 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
511 .destroy = intel_encoder_destroy,
514 void intel_crt_init(struct drm_device *dev)
516 struct drm_connector *connector;
517 struct intel_encoder *intel_encoder;
518 struct intel_connector *intel_connector;
519 struct drm_i915_private *dev_priv = dev->dev_private;
520 u32 i2c_reg;
522 intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL);
523 if (!intel_encoder)
524 return;
526 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
527 if (!intel_connector) {
528 kfree(intel_encoder);
529 return;
532 connector = &intel_connector->base;
533 drm_connector_init(dev, &intel_connector->base,
534 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
536 drm_encoder_init(dev, &intel_encoder->enc, &intel_crt_enc_funcs,
537 DRM_MODE_ENCODER_DAC);
539 drm_mode_connector_attach_encoder(&intel_connector->base,
540 &intel_encoder->enc);
542 /* Set up the DDC bus. */
543 if (HAS_PCH_SPLIT(dev))
544 i2c_reg = PCH_GPIOA;
545 else {
546 i2c_reg = GPIOA;
547 /* Use VBT information for CRT DDC if available */
548 if (dev_priv->crt_ddc_bus != 0)
549 i2c_reg = dev_priv->crt_ddc_bus;
551 intel_encoder->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
552 if (!intel_encoder->ddc_bus) {
553 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
554 "failed.\n");
555 return;
558 intel_encoder->type = INTEL_OUTPUT_ANALOG;
559 intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
560 (1 << INTEL_ANALOG_CLONE_BIT) |
561 (1 << INTEL_SDVO_LVDS_CLONE_BIT);
562 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
563 connector->interlace_allowed = 1;
564 connector->doublescan_allowed = 0;
566 drm_encoder_helper_add(&intel_encoder->enc, &intel_crt_helper_funcs);
567 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
569 drm_sysfs_connector_add(connector);
571 if (I915_HAS_HOTPLUG(dev))
572 connector->polled = DRM_CONNECTOR_POLL_HPD;
573 else
574 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
576 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;