2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
10 #include <linux/interrupt.h>
11 #include <linux/seq_file.h>
12 #include <linux/debugfs.h>
13 #include <linux/pfn.h>
14 #include <linux/percpu.h>
15 #include <linux/gfp.h>
18 #include <asm/processor.h>
19 #include <asm/tlbflush.h>
20 #include <asm/sections.h>
21 #include <asm/setup.h>
22 #include <asm/uaccess.h>
23 #include <asm/pgalloc.h>
24 #include <asm/proto.h>
28 * The current flushing context - we pass it instead of 5 arguments:
37 unsigned force_split
: 1;
43 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
44 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
45 * entries change the page attribute in parallel to some other cpu
46 * splitting a large page entry along with changing the attribute.
48 static DEFINE_SPINLOCK(cpa_lock
);
50 #define CPA_FLUSHTLB 1
52 #define CPA_PAGES_ARRAY 4
55 static unsigned long direct_pages_count
[PG_LEVEL_NUM
];
57 void update_page_count(int level
, unsigned long pages
)
61 /* Protect against CPA */
62 spin_lock_irqsave(&pgd_lock
, flags
);
63 direct_pages_count
[level
] += pages
;
64 spin_unlock_irqrestore(&pgd_lock
, flags
);
67 static void split_page_count(int level
)
69 direct_pages_count
[level
]--;
70 direct_pages_count
[level
- 1] += PTRS_PER_PTE
;
73 void arch_report_meminfo(struct seq_file
*m
)
75 seq_printf(m
, "DirectMap4k: %8lu kB\n",
76 direct_pages_count
[PG_LEVEL_4K
] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78 seq_printf(m
, "DirectMap2M: %8lu kB\n",
79 direct_pages_count
[PG_LEVEL_2M
] << 11);
81 seq_printf(m
, "DirectMap4M: %8lu kB\n",
82 direct_pages_count
[PG_LEVEL_2M
] << 12);
86 seq_printf(m
, "DirectMap1G: %8lu kB\n",
87 direct_pages_count
[PG_LEVEL_1G
] << 20);
91 static inline void split_page_count(int level
) { }
96 static inline unsigned long highmap_start_pfn(void)
98 return __pa(_text
) >> PAGE_SHIFT
;
101 static inline unsigned long highmap_end_pfn(void)
103 return __pa(roundup(_brk_end
, PMD_SIZE
)) >> PAGE_SHIFT
;
108 #ifdef CONFIG_DEBUG_PAGEALLOC
109 # define debug_pagealloc 1
111 # define debug_pagealloc 0
115 within(unsigned long addr
, unsigned long start
, unsigned long end
)
117 return addr
>= start
&& addr
< end
;
125 * clflush_cache_range - flush a cache range with clflush
126 * @addr: virtual start address
127 * @size: number of bytes to flush
129 * clflush is an unordered instruction which needs fencing with mfence
130 * to avoid ordering issues.
132 void clflush_cache_range(void *vaddr
, unsigned int size
)
134 void *vend
= vaddr
+ size
- 1;
138 for (; vaddr
< vend
; vaddr
+= boot_cpu_data
.x86_clflush_size
)
141 * Flush any possible final partial cacheline:
147 EXPORT_SYMBOL_GPL(clflush_cache_range
);
149 static void __cpa_flush_all(void *arg
)
151 unsigned long cache
= (unsigned long)arg
;
155 if (cache
&& boot_cpu_data
.x86
>= 4)
159 static void cpa_flush_all(unsigned long cache
)
161 BUG_ON(irqs_disabled());
163 on_each_cpu(__cpa_flush_all
, (void *) cache
, 1);
166 static void __cpa_flush_range(void *arg
)
169 * We could optimize that further and do individual per page
170 * tlb invalidates for a low number of pages. Caveat: we must
171 * flush the high aliases on 64bit as well.
176 static void cpa_flush_range(unsigned long start
, int numpages
, int cache
)
178 unsigned int i
, level
;
181 BUG_ON(irqs_disabled());
182 WARN_ON(PAGE_ALIGN(start
) != start
);
184 on_each_cpu(__cpa_flush_range
, NULL
, 1);
190 * We only need to flush on one CPU,
191 * clflush is a MESI-coherent instruction that
192 * will cause all other CPUs to flush the same
195 for (i
= 0, addr
= start
; i
< numpages
; i
++, addr
+= PAGE_SIZE
) {
196 pte_t
*pte
= lookup_address(addr
, &level
);
199 * Only flush present addresses:
201 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
202 clflush_cache_range((void *) addr
, PAGE_SIZE
);
206 static void cpa_flush_array(unsigned long *start
, int numpages
, int cache
,
207 int in_flags
, struct page
**pages
)
209 unsigned int i
, level
;
210 unsigned long do_wbinvd
= cache
&& numpages
>= 1024; /* 4M threshold */
212 BUG_ON(irqs_disabled());
214 on_each_cpu(__cpa_flush_all
, (void *) do_wbinvd
, 1);
216 if (!cache
|| do_wbinvd
)
220 * We only need to flush on one CPU,
221 * clflush is a MESI-coherent instruction that
222 * will cause all other CPUs to flush the same
225 for (i
= 0; i
< numpages
; i
++) {
229 if (in_flags
& CPA_PAGES_ARRAY
)
230 addr
= (unsigned long)page_address(pages
[i
]);
234 pte
= lookup_address(addr
, &level
);
237 * Only flush present addresses:
239 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
240 clflush_cache_range((void *)addr
, PAGE_SIZE
);
245 * Certain areas of memory on x86 require very specific protection flags,
246 * for example the BIOS area or kernel text. Callers don't always get this
247 * right (again, ioremap() on BIOS memory is not uncommon) so this function
248 * checks and fixes these known static required protection bits.
250 static inline pgprot_t
static_protections(pgprot_t prot
, unsigned long address
,
253 pgprot_t forbidden
= __pgprot(0);
256 * The BIOS area between 640k and 1Mb needs to be executable for
257 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
259 if (within(pfn
, BIOS_BEGIN
>> PAGE_SHIFT
, BIOS_END
>> PAGE_SHIFT
))
260 pgprot_val(forbidden
) |= _PAGE_NX
;
263 * The kernel text needs to be executable for obvious reasons
264 * Does not cover __inittext since that is gone later on. On
265 * 64bit we do not enforce !NX on the low mapping
267 if (within(address
, (unsigned long)_text
, (unsigned long)_etext
))
268 pgprot_val(forbidden
) |= _PAGE_NX
;
271 * The .rodata section needs to be read-only. Using the pfn
272 * catches all aliases.
274 if (within(pfn
, __pa((unsigned long)__start_rodata
) >> PAGE_SHIFT
,
275 __pa((unsigned long)__end_rodata
) >> PAGE_SHIFT
))
276 pgprot_val(forbidden
) |= _PAGE_RW
;
278 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
280 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
281 * kernel text mappings for the large page aligned text, rodata sections
282 * will be always read-only. For the kernel identity mappings covering
283 * the holes caused by this alignment can be anything that user asks.
285 * This will preserve the large page mappings for kernel text/data
288 if (kernel_set_to_readonly
&&
289 within(address
, (unsigned long)_text
,
290 (unsigned long)__end_rodata_hpage_align
)) {
294 * Don't enforce the !RW mapping for the kernel text mapping,
295 * if the current mapping is already using small page mapping.
296 * No need to work hard to preserve large page mappings in this
299 * This also fixes the Linux Xen paravirt guest boot failure
300 * (because of unexpected read-only mappings for kernel identity
301 * mappings). In this paravirt guest case, the kernel text
302 * mapping and the kernel identity mapping share the same
303 * page-table pages. Thus we can't really use different
304 * protections for the kernel text and identity mappings. Also,
305 * these shared mappings are made of small page mappings.
306 * Thus this don't enforce !RW mapping for small page kernel
307 * text mapping logic will help Linux Xen parvirt guest boot
310 if (lookup_address(address
, &level
) && (level
!= PG_LEVEL_4K
))
311 pgprot_val(forbidden
) |= _PAGE_RW
;
315 prot
= __pgprot(pgprot_val(prot
) & ~pgprot_val(forbidden
));
321 * Lookup the page table entry for a virtual address. Return a pointer
322 * to the entry and the level of the mapping.
324 * Note: We return pud and pmd either when the entry is marked large
325 * or when the present bit is not set. Otherwise we would return a
326 * pointer to a nonexisting mapping.
328 pte_t
*lookup_address(unsigned long address
, unsigned int *level
)
330 pgd_t
*pgd
= pgd_offset_k(address
);
334 *level
= PG_LEVEL_NONE
;
339 pud
= pud_offset(pgd
, address
);
343 *level
= PG_LEVEL_1G
;
344 if (pud_large(*pud
) || !pud_present(*pud
))
347 pmd
= pmd_offset(pud
, address
);
351 *level
= PG_LEVEL_2M
;
352 if (pmd_large(*pmd
) || !pmd_present(*pmd
))
355 *level
= PG_LEVEL_4K
;
357 return pte_offset_kernel(pmd
, address
);
359 EXPORT_SYMBOL_GPL(lookup_address
);
362 * Set the new pmd in all the pgds we know about:
364 static void __set_pmd_pte(pte_t
*kpte
, unsigned long address
, pte_t pte
)
367 set_pte_atomic(kpte
, pte
);
369 if (!SHARED_KERNEL_PMD
) {
372 list_for_each_entry(page
, &pgd_list
, lru
) {
377 pgd
= (pgd_t
*)page_address(page
) + pgd_index(address
);
378 pud
= pud_offset(pgd
, address
);
379 pmd
= pmd_offset(pud
, address
);
380 set_pte_atomic((pte_t
*)pmd
, pte
);
387 try_preserve_large_page(pte_t
*kpte
, unsigned long address
,
388 struct cpa_data
*cpa
)
390 unsigned long nextpage_addr
, numpages
, pmask
, psize
, flags
, addr
, pfn
;
391 pte_t new_pte
, old_pte
, *tmp
;
392 pgprot_t old_prot
, new_prot
;
396 if (cpa
->force_split
)
399 spin_lock_irqsave(&pgd_lock
, flags
);
401 * Check for races, another CPU might have split this page
404 tmp
= lookup_address(address
, &level
);
410 psize
= PMD_PAGE_SIZE
;
411 pmask
= PMD_PAGE_MASK
;
415 psize
= PUD_PAGE_SIZE
;
416 pmask
= PUD_PAGE_MASK
;
425 * Calculate the number of pages, which fit into this large
426 * page starting at address:
428 nextpage_addr
= (address
+ psize
) & pmask
;
429 numpages
= (nextpage_addr
- address
) >> PAGE_SHIFT
;
430 if (numpages
< cpa
->numpages
)
431 cpa
->numpages
= numpages
;
434 * We are safe now. Check whether the new pgprot is the same:
437 old_prot
= new_prot
= pte_pgprot(old_pte
);
439 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
440 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
443 * old_pte points to the large page base address. So we need
444 * to add the offset of the virtual address:
446 pfn
= pte_pfn(old_pte
) + ((address
& (psize
- 1)) >> PAGE_SHIFT
);
449 new_prot
= static_protections(new_prot
, address
, pfn
);
452 * We need to check the full range, whether
453 * static_protection() requires a different pgprot for one of
454 * the pages in the range we try to preserve:
456 addr
= address
+ PAGE_SIZE
;
458 for (i
= 1; i
< cpa
->numpages
; i
++, addr
+= PAGE_SIZE
, pfn
++) {
459 pgprot_t chk_prot
= static_protections(new_prot
, addr
, pfn
);
461 if (pgprot_val(chk_prot
) != pgprot_val(new_prot
))
466 * If there are no changes, return. maxpages has been updated
469 if (pgprot_val(new_prot
) == pgprot_val(old_prot
)) {
475 * We need to change the attributes. Check, whether we can
476 * change the large page in one go. We request a split, when
477 * the address is not aligned and the number of pages is
478 * smaller than the number of pages in the large page. Note
479 * that we limited the number of possible pages already to
480 * the number of pages in the large page.
482 if (address
== (nextpage_addr
- psize
) && cpa
->numpages
== numpages
) {
484 * The address is aligned and the number of pages
485 * covers the full page.
487 new_pte
= pfn_pte(pte_pfn(old_pte
), canon_pgprot(new_prot
));
488 __set_pmd_pte(kpte
, address
, new_pte
);
489 cpa
->flags
|= CPA_FLUSHTLB
;
494 spin_unlock_irqrestore(&pgd_lock
, flags
);
499 static int split_large_page(pte_t
*kpte
, unsigned long address
)
501 unsigned long flags
, pfn
, pfninc
= 1;
502 unsigned int i
, level
;
507 if (!debug_pagealloc
)
508 spin_unlock(&cpa_lock
);
509 base
= alloc_pages(GFP_KERNEL
| __GFP_NOTRACK
, 0);
510 if (!debug_pagealloc
)
511 spin_lock(&cpa_lock
);
515 spin_lock_irqsave(&pgd_lock
, flags
);
517 * Check for races, another CPU might have split this page
520 tmp
= lookup_address(address
, &level
);
524 pbase
= (pte_t
*)page_address(base
);
525 paravirt_alloc_pte(&init_mm
, page_to_pfn(base
));
526 ref_prot
= pte_pgprot(pte_clrhuge(*kpte
));
528 * If we ever want to utilize the PAT bit, we need to
529 * update this function to make sure it's converted from
530 * bit 12 to bit 7 when we cross from the 2MB level to
533 WARN_ON_ONCE(pgprot_val(ref_prot
) & _PAGE_PAT_LARGE
);
536 if (level
== PG_LEVEL_1G
) {
537 pfninc
= PMD_PAGE_SIZE
>> PAGE_SHIFT
;
538 pgprot_val(ref_prot
) |= _PAGE_PSE
;
543 * Get the target pfn from the original entry:
545 pfn
= pte_pfn(*kpte
);
546 for (i
= 0; i
< PTRS_PER_PTE
; i
++, pfn
+= pfninc
)
547 set_pte(&pbase
[i
], pfn_pte(pfn
, ref_prot
));
549 if (address
>= (unsigned long)__va(0) &&
550 address
< (unsigned long)__va(max_low_pfn_mapped
<< PAGE_SHIFT
))
551 split_page_count(level
);
554 if (address
>= (unsigned long)__va(1UL<<32) &&
555 address
< (unsigned long)__va(max_pfn_mapped
<< PAGE_SHIFT
))
556 split_page_count(level
);
560 * Install the new, split up pagetable.
562 * We use the standard kernel pagetable protections for the new
563 * pagetable protections, the actual ptes set above control the
564 * primary protection behavior:
566 __set_pmd_pte(kpte
, address
, mk_pte(base
, __pgprot(_KERNPG_TABLE
)));
574 * If we dropped out via the lookup_address check under
575 * pgd_lock then stick the page back into the pool:
579 spin_unlock_irqrestore(&pgd_lock
, flags
);
584 static int __cpa_process_fault(struct cpa_data
*cpa
, unsigned long vaddr
,
588 * Ignore all non primary paths.
594 * Ignore the NULL PTE for kernel identity mapping, as it is expected
596 * Also set numpages to '1' indicating that we processed cpa req for
597 * one virtual address page and its pfn. TBD: numpages can be set based
598 * on the initial value and the level returned by lookup_address().
600 if (within(vaddr
, PAGE_OFFSET
,
601 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
))) {
603 cpa
->pfn
= __pa(vaddr
) >> PAGE_SHIFT
;
606 WARN(1, KERN_WARNING
"CPA: called for zero pte. "
607 "vaddr = %lx cpa->vaddr = %lx\n", vaddr
,
614 static int __change_page_attr(struct cpa_data
*cpa
, int primary
)
616 unsigned long address
;
619 pte_t
*kpte
, old_pte
;
621 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
622 struct page
*page
= cpa
->pages
[cpa
->curpage
];
623 if (unlikely(PageHighMem(page
)))
625 address
= (unsigned long)page_address(page
);
626 } else if (cpa
->flags
& CPA_ARRAY
)
627 address
= cpa
->vaddr
[cpa
->curpage
];
629 address
= *cpa
->vaddr
;
631 kpte
= lookup_address(address
, &level
);
633 return __cpa_process_fault(cpa
, address
, primary
);
636 if (!pte_val(old_pte
))
637 return __cpa_process_fault(cpa
, address
, primary
);
639 if (level
== PG_LEVEL_4K
) {
641 pgprot_t new_prot
= pte_pgprot(old_pte
);
642 unsigned long pfn
= pte_pfn(old_pte
);
644 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
645 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
647 new_prot
= static_protections(new_prot
, address
, pfn
);
650 * We need to keep the pfn from the existing PTE,
651 * after all we're only going to change it's attributes
652 * not the memory it points to
654 new_pte
= pfn_pte(pfn
, canon_pgprot(new_prot
));
657 * Do we really change anything ?
659 if (pte_val(old_pte
) != pte_val(new_pte
)) {
660 set_pte_atomic(kpte
, new_pte
);
661 cpa
->flags
|= CPA_FLUSHTLB
;
668 * Check, whether we can keep the large page intact
669 * and just change the pte:
671 do_split
= try_preserve_large_page(kpte
, address
, cpa
);
673 * When the range fits into the existing large page,
674 * return. cp->numpages and cpa->tlbflush have been updated in
681 * We have to split the large page:
683 err
= split_large_page(kpte
, address
);
686 * Do a global flush tlb after splitting the large page
687 * and before we do the actual change page attribute in the PTE.
689 * With out this, we violate the TLB application note, that says
690 * "The TLBs may contain both ordinary and large-page
691 * translations for a 4-KByte range of linear addresses. This
692 * may occur if software modifies the paging structures so that
693 * the page size used for the address range changes. If the two
694 * translations differ with respect to page frame or attributes
695 * (e.g., permissions), processor behavior is undefined and may
696 * be implementation-specific."
698 * We do this global tlb flush inside the cpa_lock, so that we
699 * don't allow any other cpu, with stale tlb entries change the
700 * page attribute in parallel, that also falls into the
701 * just split large page entry.
710 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
);
712 static int cpa_process_alias(struct cpa_data
*cpa
)
714 struct cpa_data alias_cpa
;
715 unsigned long laddr
= (unsigned long)__va(cpa
->pfn
<< PAGE_SHIFT
);
719 if (cpa
->pfn
>= max_pfn_mapped
)
723 if (cpa
->pfn
>= max_low_pfn_mapped
&& cpa
->pfn
< (1UL<<(32-PAGE_SHIFT
)))
727 * No need to redo, when the primary call touched the direct
730 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
731 struct page
*page
= cpa
->pages
[cpa
->curpage
];
732 if (unlikely(PageHighMem(page
)))
734 vaddr
= (unsigned long)page_address(page
);
735 } else if (cpa
->flags
& CPA_ARRAY
)
736 vaddr
= cpa
->vaddr
[cpa
->curpage
];
740 if (!(within(vaddr
, PAGE_OFFSET
,
741 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
)))) {
744 alias_cpa
.vaddr
= &laddr
;
745 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
747 ret
= __change_page_attr_set_clr(&alias_cpa
, 0);
754 * If the primary call didn't touch the high mapping already
755 * and the physical address is inside the kernel map, we need
756 * to touch the high mapped kernel as well:
758 if (!within(vaddr
, (unsigned long)_text
, _brk_end
) &&
759 within(cpa
->pfn
, highmap_start_pfn(), highmap_end_pfn())) {
760 unsigned long temp_cpa_vaddr
= (cpa
->pfn
<< PAGE_SHIFT
) +
761 __START_KERNEL_map
- phys_base
;
763 alias_cpa
.vaddr
= &temp_cpa_vaddr
;
764 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
767 * The high mapping range is imprecise, so ignore the
770 __change_page_attr_set_clr(&alias_cpa
, 0);
777 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
)
779 int ret
, numpages
= cpa
->numpages
;
783 * Store the remaining nr of pages for the large page
784 * preservation check.
786 cpa
->numpages
= numpages
;
787 /* for array changes, we can't use large page */
788 if (cpa
->flags
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
791 if (!debug_pagealloc
)
792 spin_lock(&cpa_lock
);
793 ret
= __change_page_attr(cpa
, checkalias
);
794 if (!debug_pagealloc
)
795 spin_unlock(&cpa_lock
);
800 ret
= cpa_process_alias(cpa
);
806 * Adjust the number of pages with the result of the
807 * CPA operation. Either a large page has been
808 * preserved or a single page update happened.
810 BUG_ON(cpa
->numpages
> numpages
);
811 numpages
-= cpa
->numpages
;
812 if (cpa
->flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
))
815 *cpa
->vaddr
+= cpa
->numpages
* PAGE_SIZE
;
821 static inline int cache_attr(pgprot_t attr
)
823 return pgprot_val(attr
) &
824 (_PAGE_PAT
| _PAGE_PAT_LARGE
| _PAGE_PWT
| _PAGE_PCD
);
827 static int change_page_attr_set_clr(unsigned long *addr
, int numpages
,
828 pgprot_t mask_set
, pgprot_t mask_clr
,
829 int force_split
, int in_flag
,
833 int ret
, cache
, checkalias
;
834 unsigned long baddr
= 0;
837 * Check, if we are requested to change a not supported
840 mask_set
= canon_pgprot(mask_set
);
841 mask_clr
= canon_pgprot(mask_clr
);
842 if (!pgprot_val(mask_set
) && !pgprot_val(mask_clr
) && !force_split
)
845 /* Ensure we are PAGE_SIZE aligned */
846 if (in_flag
& CPA_ARRAY
) {
848 for (i
= 0; i
< numpages
; i
++) {
849 if (addr
[i
] & ~PAGE_MASK
) {
850 addr
[i
] &= PAGE_MASK
;
854 } else if (!(in_flag
& CPA_PAGES_ARRAY
)) {
856 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
857 * No need to cehck in that case
859 if (*addr
& ~PAGE_MASK
) {
862 * People should not be passing in unaligned addresses:
867 * Save address for cache flush. *addr is modified in the call
868 * to __change_page_attr_set_clr() below.
873 /* Must avoid aliasing mappings in the highmem code */
880 cpa
.numpages
= numpages
;
881 cpa
.mask_set
= mask_set
;
882 cpa
.mask_clr
= mask_clr
;
885 cpa
.force_split
= force_split
;
887 if (in_flag
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
888 cpa
.flags
|= in_flag
;
890 /* No alias checking for _NX bit modifications */
891 checkalias
= (pgprot_val(mask_set
) | pgprot_val(mask_clr
)) != _PAGE_NX
;
893 ret
= __change_page_attr_set_clr(&cpa
, checkalias
);
896 * Check whether we really changed something:
898 if (!(cpa
.flags
& CPA_FLUSHTLB
))
902 * No need to flush, when we did not set any of the caching
905 cache
= cache_attr(mask_set
);
908 * On success we use clflush, when the CPU supports it to
909 * avoid the wbindv. If the CPU does not support it and in the
910 * error case we fall back to cpa_flush_all (which uses
913 if (!ret
&& cpu_has_clflush
) {
914 if (cpa
.flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
)) {
915 cpa_flush_array(addr
, numpages
, cache
,
918 cpa_flush_range(baddr
, numpages
, cache
);
920 cpa_flush_all(cache
);
926 static inline int change_page_attr_set(unsigned long *addr
, int numpages
,
927 pgprot_t mask
, int array
)
929 return change_page_attr_set_clr(addr
, numpages
, mask
, __pgprot(0), 0,
930 (array
? CPA_ARRAY
: 0), NULL
);
933 static inline int change_page_attr_clear(unsigned long *addr
, int numpages
,
934 pgprot_t mask
, int array
)
936 return change_page_attr_set_clr(addr
, numpages
, __pgprot(0), mask
, 0,
937 (array
? CPA_ARRAY
: 0), NULL
);
940 static inline int cpa_set_pages_array(struct page
**pages
, int numpages
,
943 return change_page_attr_set_clr(NULL
, numpages
, mask
, __pgprot(0), 0,
944 CPA_PAGES_ARRAY
, pages
);
947 static inline int cpa_clear_pages_array(struct page
**pages
, int numpages
,
950 return change_page_attr_set_clr(NULL
, numpages
, __pgprot(0), mask
, 0,
951 CPA_PAGES_ARRAY
, pages
);
954 int _set_memory_uc(unsigned long addr
, int numpages
)
957 * for now UC MINUS. see comments in ioremap_nocache()
959 return change_page_attr_set(&addr
, numpages
,
960 __pgprot(_PAGE_CACHE_UC_MINUS
), 0);
963 int set_memory_uc(unsigned long addr
, int numpages
)
968 * for now UC MINUS. see comments in ioremap_nocache()
970 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
971 _PAGE_CACHE_UC_MINUS
, NULL
);
975 ret
= _set_memory_uc(addr
, numpages
);
982 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
986 EXPORT_SYMBOL(set_memory_uc
);
988 int _set_memory_array(unsigned long *addr
, int addrinarray
,
989 unsigned long new_type
)
995 * for now UC MINUS. see comments in ioremap_nocache()
997 for (i
= 0; i
< addrinarray
; i
++) {
998 ret
= reserve_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
,
1004 ret
= change_page_attr_set(addr
, addrinarray
,
1005 __pgprot(_PAGE_CACHE_UC_MINUS
), 1);
1007 if (!ret
&& new_type
== _PAGE_CACHE_WC
)
1008 ret
= change_page_attr_set_clr(addr
, addrinarray
,
1009 __pgprot(_PAGE_CACHE_WC
),
1010 __pgprot(_PAGE_CACHE_MASK
),
1011 0, CPA_ARRAY
, NULL
);
1018 for (j
= 0; j
< i
; j
++)
1019 free_memtype(__pa(addr
[j
]), __pa(addr
[j
]) + PAGE_SIZE
);
1024 int set_memory_array_uc(unsigned long *addr
, int addrinarray
)
1026 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_UC_MINUS
);
1028 EXPORT_SYMBOL(set_memory_array_uc
);
1030 int set_memory_array_wc(unsigned long *addr
, int addrinarray
)
1032 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_WC
);
1034 EXPORT_SYMBOL(set_memory_array_wc
);
1036 int _set_memory_wc(unsigned long addr
, int numpages
)
1039 unsigned long addr_copy
= addr
;
1041 ret
= change_page_attr_set(&addr
, numpages
,
1042 __pgprot(_PAGE_CACHE_UC_MINUS
), 0);
1044 ret
= change_page_attr_set_clr(&addr_copy
, numpages
,
1045 __pgprot(_PAGE_CACHE_WC
),
1046 __pgprot(_PAGE_CACHE_MASK
),
1052 int set_memory_wc(unsigned long addr
, int numpages
)
1057 return set_memory_uc(addr
, numpages
);
1059 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1060 _PAGE_CACHE_WC
, NULL
);
1064 ret
= _set_memory_wc(addr
, numpages
);
1071 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1075 EXPORT_SYMBOL(set_memory_wc
);
1077 int _set_memory_wb(unsigned long addr
, int numpages
)
1079 return change_page_attr_clear(&addr
, numpages
,
1080 __pgprot(_PAGE_CACHE_MASK
), 0);
1083 int set_memory_wb(unsigned long addr
, int numpages
)
1087 ret
= _set_memory_wb(addr
, numpages
);
1091 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1094 EXPORT_SYMBOL(set_memory_wb
);
1096 int set_memory_array_wb(unsigned long *addr
, int addrinarray
)
1101 ret
= change_page_attr_clear(addr
, addrinarray
,
1102 __pgprot(_PAGE_CACHE_MASK
), 1);
1106 for (i
= 0; i
< addrinarray
; i
++)
1107 free_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
);
1111 EXPORT_SYMBOL(set_memory_array_wb
);
1113 int set_memory_x(unsigned long addr
, int numpages
)
1115 if (!(__supported_pte_mask
& _PAGE_NX
))
1118 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1120 EXPORT_SYMBOL(set_memory_x
);
1122 int set_memory_nx(unsigned long addr
, int numpages
)
1124 if (!(__supported_pte_mask
& _PAGE_NX
))
1127 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1129 EXPORT_SYMBOL(set_memory_nx
);
1131 int set_memory_ro(unsigned long addr
, int numpages
)
1133 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1135 EXPORT_SYMBOL_GPL(set_memory_ro
);
1137 int set_memory_rw(unsigned long addr
, int numpages
)
1139 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1141 EXPORT_SYMBOL_GPL(set_memory_rw
);
1143 int set_memory_np(unsigned long addr
, int numpages
)
1145 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_PRESENT
), 0);
1148 int set_memory_4k(unsigned long addr
, int numpages
)
1150 return change_page_attr_set_clr(&addr
, numpages
, __pgprot(0),
1151 __pgprot(0), 1, 0, NULL
);
1154 int set_pages_uc(struct page
*page
, int numpages
)
1156 unsigned long addr
= (unsigned long)page_address(page
);
1158 return set_memory_uc(addr
, numpages
);
1160 EXPORT_SYMBOL(set_pages_uc
);
1162 static int _set_pages_array(struct page
**pages
, int addrinarray
,
1163 unsigned long new_type
)
1165 unsigned long start
;
1171 for (i
= 0; i
< addrinarray
; i
++) {
1172 if (PageHighMem(pages
[i
]))
1174 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1175 end
= start
+ PAGE_SIZE
;
1176 if (reserve_memtype(start
, end
, new_type
, NULL
))
1180 ret
= cpa_set_pages_array(pages
, addrinarray
,
1181 __pgprot(_PAGE_CACHE_UC_MINUS
));
1182 if (!ret
&& new_type
== _PAGE_CACHE_WC
)
1183 ret
= change_page_attr_set_clr(NULL
, addrinarray
,
1184 __pgprot(_PAGE_CACHE_WC
),
1185 __pgprot(_PAGE_CACHE_MASK
),
1186 0, CPA_PAGES_ARRAY
, pages
);
1189 return 0; /* Success */
1192 for (i
= 0; i
< free_idx
; i
++) {
1193 if (PageHighMem(pages
[i
]))
1195 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1196 end
= start
+ PAGE_SIZE
;
1197 free_memtype(start
, end
);
1202 int set_pages_array_uc(struct page
**pages
, int addrinarray
)
1204 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_UC_MINUS
);
1206 EXPORT_SYMBOL(set_pages_array_uc
);
1208 int set_pages_array_wc(struct page
**pages
, int addrinarray
)
1210 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_WC
);
1212 EXPORT_SYMBOL(set_pages_array_wc
);
1214 int set_pages_wb(struct page
*page
, int numpages
)
1216 unsigned long addr
= (unsigned long)page_address(page
);
1218 return set_memory_wb(addr
, numpages
);
1220 EXPORT_SYMBOL(set_pages_wb
);
1222 int set_pages_array_wb(struct page
**pages
, int addrinarray
)
1225 unsigned long start
;
1229 retval
= cpa_clear_pages_array(pages
, addrinarray
,
1230 __pgprot(_PAGE_CACHE_MASK
));
1234 for (i
= 0; i
< addrinarray
; i
++) {
1235 if (PageHighMem(pages
[i
]))
1237 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1238 end
= start
+ PAGE_SIZE
;
1239 free_memtype(start
, end
);
1244 EXPORT_SYMBOL(set_pages_array_wb
);
1246 int set_pages_x(struct page
*page
, int numpages
)
1248 unsigned long addr
= (unsigned long)page_address(page
);
1250 return set_memory_x(addr
, numpages
);
1252 EXPORT_SYMBOL(set_pages_x
);
1254 int set_pages_nx(struct page
*page
, int numpages
)
1256 unsigned long addr
= (unsigned long)page_address(page
);
1258 return set_memory_nx(addr
, numpages
);
1260 EXPORT_SYMBOL(set_pages_nx
);
1262 int set_pages_ro(struct page
*page
, int numpages
)
1264 unsigned long addr
= (unsigned long)page_address(page
);
1266 return set_memory_ro(addr
, numpages
);
1269 int set_pages_rw(struct page
*page
, int numpages
)
1271 unsigned long addr
= (unsigned long)page_address(page
);
1273 return set_memory_rw(addr
, numpages
);
1276 #ifdef CONFIG_DEBUG_PAGEALLOC
1278 static int __set_pages_p(struct page
*page
, int numpages
)
1280 unsigned long tempaddr
= (unsigned long) page_address(page
);
1281 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1282 .numpages
= numpages
,
1283 .mask_set
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1284 .mask_clr
= __pgprot(0),
1288 * No alias checking needed for setting present flag. otherwise,
1289 * we may need to break large pages for 64-bit kernel text
1290 * mappings (this adds to complexity if we want to do this from
1291 * atomic context especially). Let's keep it simple!
1293 return __change_page_attr_set_clr(&cpa
, 0);
1296 static int __set_pages_np(struct page
*page
, int numpages
)
1298 unsigned long tempaddr
= (unsigned long) page_address(page
);
1299 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1300 .numpages
= numpages
,
1301 .mask_set
= __pgprot(0),
1302 .mask_clr
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1306 * No alias checking needed for setting not present flag. otherwise,
1307 * we may need to break large pages for 64-bit kernel text
1308 * mappings (this adds to complexity if we want to do this from
1309 * atomic context especially). Let's keep it simple!
1311 return __change_page_attr_set_clr(&cpa
, 0);
1314 void kernel_map_pages(struct page
*page
, int numpages
, int enable
)
1316 if (PageHighMem(page
))
1319 debug_check_no_locks_freed(page_address(page
),
1320 numpages
* PAGE_SIZE
);
1324 * If page allocator is not up yet then do not call c_p_a():
1326 if (!debug_pagealloc_enabled
)
1330 * The return value is ignored as the calls cannot fail.
1331 * Large pages for identity mappings are not used at boot time
1332 * and hence no memory allocations during large page split.
1335 __set_pages_p(page
, numpages
);
1337 __set_pages_np(page
, numpages
);
1340 * We should perform an IPI and flush all tlbs,
1341 * but that can deadlock->flush only current cpu:
1346 #ifdef CONFIG_HIBERNATION
1348 bool kernel_page_present(struct page
*page
)
1353 if (PageHighMem(page
))
1356 pte
= lookup_address((unsigned long)page_address(page
), &level
);
1357 return (pte_val(*pte
) & _PAGE_PRESENT
);
1360 #endif /* CONFIG_HIBERNATION */
1362 #endif /* CONFIG_DEBUG_PAGEALLOC */
1365 * The testcases use internal knowledge of the implementation that shouldn't
1366 * be exposed to the rest of the kernel. Include these directly here.
1368 #ifdef CONFIG_CPA_DEBUG
1369 #include "pageattr-test.c"