1 #include <linux/clocksource.h>
2 #include <linux/clockchips.h>
3 #include <linux/interrupt.h>
4 #include <linux/sysdev.h>
5 #include <linux/delay.h>
6 #include <linux/errno.h>
7 #include <linux/slab.h>
8 #include <linux/hpet.h>
9 #include <linux/init.h>
10 #include <linux/cpu.h>
14 #include <asm/fixmap.h>
15 #include <asm/i8253.h>
18 #define HPET_MASK CLOCKSOURCE_MASK(32)
22 #define FSEC_PER_NSEC 1000000L
24 #define HPET_DEV_USED_BIT 2
25 #define HPET_DEV_USED (1 << HPET_DEV_USED_BIT)
26 #define HPET_DEV_VALID 0x8
27 #define HPET_DEV_FSB_CAP 0x1000
28 #define HPET_DEV_PERI_CAP 0x2000
30 #define EVT_TO_HPET_DEV(evt) container_of(evt, struct hpet_dev, evt)
33 * HPET address is set in acpi/boot.c, when an ACPI entry exists
35 unsigned long hpet_address
;
36 u8 hpet_blockid
; /* OS timer block num */
40 static unsigned long hpet_num_timers
;
42 static void __iomem
*hpet_virt_address
;
45 struct clock_event_device evt
;
53 inline unsigned int hpet_readl(unsigned int a
)
55 return readl(hpet_virt_address
+ a
);
58 static inline void hpet_writel(unsigned int d
, unsigned int a
)
60 writel(d
, hpet_virt_address
+ a
);
64 #include <asm/pgtable.h>
67 static inline void hpet_set_mapping(void)
69 hpet_virt_address
= ioremap_nocache(hpet_address
, HPET_MMAP_SIZE
);
71 __set_fixmap(VSYSCALL_HPET
, hpet_address
, PAGE_KERNEL_VSYSCALL_NOCACHE
);
75 static inline void hpet_clear_mapping(void)
77 iounmap(hpet_virt_address
);
78 hpet_virt_address
= NULL
;
82 * HPET command line enable / disable
84 static int boot_hpet_disable
;
86 static int hpet_verbose
;
88 static int __init
hpet_setup(char *str
)
91 if (!strncmp("disable", str
, 7))
92 boot_hpet_disable
= 1;
93 if (!strncmp("force", str
, 5))
95 if (!strncmp("verbose", str
, 7))
100 __setup("hpet=", hpet_setup
);
102 static int __init
disable_hpet(char *str
)
104 boot_hpet_disable
= 1;
107 __setup("nohpet", disable_hpet
);
109 static inline int is_hpet_capable(void)
111 return !boot_hpet_disable
&& hpet_address
;
115 * HPET timer interrupt enable / disable
117 static int hpet_legacy_int_enabled
;
120 * is_hpet_enabled - check whether the hpet timer interrupt is enabled
122 int is_hpet_enabled(void)
124 return is_hpet_capable() && hpet_legacy_int_enabled
;
126 EXPORT_SYMBOL_GPL(is_hpet_enabled
);
128 static void _hpet_print_config(const char *function
, int line
)
131 printk(KERN_INFO
"hpet: %s(%d):\n", function
, line
);
132 l
= hpet_readl(HPET_ID
);
133 h
= hpet_readl(HPET_PERIOD
);
134 timers
= ((l
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
) + 1;
135 printk(KERN_INFO
"hpet: ID: 0x%x, PERIOD: 0x%x\n", l
, h
);
136 l
= hpet_readl(HPET_CFG
);
137 h
= hpet_readl(HPET_STATUS
);
138 printk(KERN_INFO
"hpet: CFG: 0x%x, STATUS: 0x%x\n", l
, h
);
139 l
= hpet_readl(HPET_COUNTER
);
140 h
= hpet_readl(HPET_COUNTER
+4);
141 printk(KERN_INFO
"hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l
, h
);
143 for (i
= 0; i
< timers
; i
++) {
144 l
= hpet_readl(HPET_Tn_CFG(i
));
145 h
= hpet_readl(HPET_Tn_CFG(i
)+4);
146 printk(KERN_INFO
"hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
148 l
= hpet_readl(HPET_Tn_CMP(i
));
149 h
= hpet_readl(HPET_Tn_CMP(i
)+4);
150 printk(KERN_INFO
"hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
152 l
= hpet_readl(HPET_Tn_ROUTE(i
));
153 h
= hpet_readl(HPET_Tn_ROUTE(i
)+4);
154 printk(KERN_INFO
"hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
159 #define hpet_print_config() \
162 _hpet_print_config(__FUNCTION__, __LINE__); \
166 * When the hpet driver (/dev/hpet) is enabled, we need to reserve
167 * timer 0 and timer 1 in case of RTC emulation.
171 static void hpet_reserve_msi_timers(struct hpet_data
*hd
);
173 static void hpet_reserve_platform_timers(unsigned int id
)
175 struct hpet __iomem
*hpet
= hpet_virt_address
;
176 struct hpet_timer __iomem
*timer
= &hpet
->hpet_timers
[2];
177 unsigned int nrtimers
, i
;
180 nrtimers
= ((id
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
) + 1;
182 memset(&hd
, 0, sizeof(hd
));
183 hd
.hd_phys_address
= hpet_address
;
184 hd
.hd_address
= hpet
;
185 hd
.hd_nirqs
= nrtimers
;
186 hpet_reserve_timer(&hd
, 0);
188 #ifdef CONFIG_HPET_EMULATE_RTC
189 hpet_reserve_timer(&hd
, 1);
193 * NOTE that hd_irq[] reflects IOAPIC input pins (LEGACY_8254
194 * is wrong for i8259!) not the output IRQ. Many BIOS writers
195 * don't bother configuring *any* comparator interrupts.
197 hd
.hd_irq
[0] = HPET_LEGACY_8254
;
198 hd
.hd_irq
[1] = HPET_LEGACY_RTC
;
200 for (i
= 2; i
< nrtimers
; timer
++, i
++) {
201 hd
.hd_irq
[i
] = (readl(&timer
->hpet_config
) &
202 Tn_INT_ROUTE_CNF_MASK
) >> Tn_INT_ROUTE_CNF_SHIFT
;
205 hpet_reserve_msi_timers(&hd
);
211 static void hpet_reserve_platform_timers(unsigned int id
) { }
217 static unsigned long hpet_period
;
219 static void hpet_legacy_set_mode(enum clock_event_mode mode
,
220 struct clock_event_device
*evt
);
221 static int hpet_legacy_next_event(unsigned long delta
,
222 struct clock_event_device
*evt
);
225 * The hpet clock event device
227 static struct clock_event_device hpet_clockevent
= {
229 .features
= CLOCK_EVT_FEAT_PERIODIC
| CLOCK_EVT_FEAT_ONESHOT
,
230 .set_mode
= hpet_legacy_set_mode
,
231 .set_next_event
= hpet_legacy_next_event
,
237 static void hpet_stop_counter(void)
239 unsigned long cfg
= hpet_readl(HPET_CFG
);
240 cfg
&= ~HPET_CFG_ENABLE
;
241 hpet_writel(cfg
, HPET_CFG
);
244 static void hpet_reset_counter(void)
246 hpet_writel(0, HPET_COUNTER
);
247 hpet_writel(0, HPET_COUNTER
+ 4);
250 static void hpet_start_counter(void)
252 unsigned int cfg
= hpet_readl(HPET_CFG
);
253 cfg
|= HPET_CFG_ENABLE
;
254 hpet_writel(cfg
, HPET_CFG
);
257 static void hpet_restart_counter(void)
260 hpet_reset_counter();
261 hpet_start_counter();
264 static void hpet_resume_device(void)
269 static void hpet_resume_counter(struct clocksource
*cs
)
271 hpet_resume_device();
272 hpet_restart_counter();
275 static void hpet_enable_legacy_int(void)
277 unsigned int cfg
= hpet_readl(HPET_CFG
);
279 cfg
|= HPET_CFG_LEGACY
;
280 hpet_writel(cfg
, HPET_CFG
);
281 hpet_legacy_int_enabled
= 1;
284 static void hpet_legacy_clockevent_register(void)
286 /* Start HPET legacy interrupts */
287 hpet_enable_legacy_int();
290 * The mult factor is defined as (include/linux/clockchips.h)
291 * mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
292 * hpet_period is in units of femtoseconds (per cycle), so
293 * mult/2^shift = cyc/ns = 10^6/hpet_period
294 * mult = (10^6 * 2^shift)/hpet_period
295 * mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
297 hpet_clockevent
.mult
= div_sc((unsigned long) FSEC_PER_NSEC
,
298 hpet_period
, hpet_clockevent
.shift
);
299 /* Calculate the min / max delta */
300 hpet_clockevent
.max_delta_ns
= clockevent_delta2ns(0x7FFFFFFF,
302 /* 5 usec minimum reprogramming delta. */
303 hpet_clockevent
.min_delta_ns
= 5000;
306 * Start hpet with the boot cpu mask and make it
307 * global after the IO_APIC has been initialized.
309 hpet_clockevent
.cpumask
= cpumask_of(smp_processor_id());
310 clockevents_register_device(&hpet_clockevent
);
311 global_clock_event
= &hpet_clockevent
;
312 printk(KERN_DEBUG
"hpet clockevent registered\n");
315 static int hpet_setup_msi_irq(unsigned int irq
);
317 static void hpet_set_mode(enum clock_event_mode mode
,
318 struct clock_event_device
*evt
, int timer
)
320 unsigned int cfg
, cmp
, now
;
324 case CLOCK_EVT_MODE_PERIODIC
:
326 delta
= ((uint64_t)(NSEC_PER_SEC
/HZ
)) * evt
->mult
;
327 delta
>>= evt
->shift
;
328 now
= hpet_readl(HPET_COUNTER
);
329 cmp
= now
+ (unsigned int) delta
;
330 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
331 /* Make sure we use edge triggered interrupts */
332 cfg
&= ~HPET_TN_LEVEL
;
333 cfg
|= HPET_TN_ENABLE
| HPET_TN_PERIODIC
|
334 HPET_TN_SETVAL
| HPET_TN_32BIT
;
335 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
336 hpet_writel(cmp
, HPET_Tn_CMP(timer
));
339 * HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL
340 * cleared) to T0_CMP to set the period. The HPET_TN_SETVAL
341 * bit is automatically cleared after the first write.
342 * (See AMD-8111 HyperTransport I/O Hub Data Sheet,
343 * Publication # 24674)
345 hpet_writel((unsigned int) delta
, HPET_Tn_CMP(timer
));
346 hpet_start_counter();
350 case CLOCK_EVT_MODE_ONESHOT
:
351 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
352 cfg
&= ~HPET_TN_PERIODIC
;
353 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
354 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
357 case CLOCK_EVT_MODE_UNUSED
:
358 case CLOCK_EVT_MODE_SHUTDOWN
:
359 cfg
= hpet_readl(HPET_Tn_CFG(timer
));
360 cfg
&= ~HPET_TN_ENABLE
;
361 hpet_writel(cfg
, HPET_Tn_CFG(timer
));
364 case CLOCK_EVT_MODE_RESUME
:
366 hpet_enable_legacy_int();
368 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
369 hpet_setup_msi_irq(hdev
->irq
);
370 disable_irq(hdev
->irq
);
371 irq_set_affinity(hdev
->irq
, cpumask_of(hdev
->cpu
));
372 enable_irq(hdev
->irq
);
379 static int hpet_next_event(unsigned long delta
,
380 struct clock_event_device
*evt
, int timer
)
384 cnt
= hpet_readl(HPET_COUNTER
);
386 hpet_writel(cnt
, HPET_Tn_CMP(timer
));
388 if (unlikely((u32
)hpet_readl(HPET_Tn_CMP(timer
)) != cnt
)) {
389 if (hpet_readl(HPET_Tn_CMP(timer
)) != cnt
)
390 printk_once(KERN_WARNING
391 "hpet: compare register read back failed.\n");
394 return (s32
)(hpet_readl(HPET_COUNTER
) - cnt
) >= 0 ? -ETIME
: 0;
397 static void hpet_legacy_set_mode(enum clock_event_mode mode
,
398 struct clock_event_device
*evt
)
400 hpet_set_mode(mode
, evt
, 0);
403 static int hpet_legacy_next_event(unsigned long delta
,
404 struct clock_event_device
*evt
)
406 return hpet_next_event(delta
, evt
, 0);
412 #ifdef CONFIG_PCI_MSI
414 static DEFINE_PER_CPU(struct hpet_dev
*, cpu_hpet_dev
);
415 static struct hpet_dev
*hpet_devs
;
417 void hpet_msi_unmask(unsigned int irq
)
419 struct hpet_dev
*hdev
= get_irq_data(irq
);
423 cfg
= hpet_readl(HPET_Tn_CFG(hdev
->num
));
425 hpet_writel(cfg
, HPET_Tn_CFG(hdev
->num
));
428 void hpet_msi_mask(unsigned int irq
)
431 struct hpet_dev
*hdev
= get_irq_data(irq
);
434 cfg
= hpet_readl(HPET_Tn_CFG(hdev
->num
));
436 hpet_writel(cfg
, HPET_Tn_CFG(hdev
->num
));
439 void hpet_msi_write(unsigned int irq
, struct msi_msg
*msg
)
441 struct hpet_dev
*hdev
= get_irq_data(irq
);
443 hpet_writel(msg
->data
, HPET_Tn_ROUTE(hdev
->num
));
444 hpet_writel(msg
->address_lo
, HPET_Tn_ROUTE(hdev
->num
) + 4);
447 void hpet_msi_read(unsigned int irq
, struct msi_msg
*msg
)
449 struct hpet_dev
*hdev
= get_irq_data(irq
);
451 msg
->data
= hpet_readl(HPET_Tn_ROUTE(hdev
->num
));
452 msg
->address_lo
= hpet_readl(HPET_Tn_ROUTE(hdev
->num
) + 4);
456 static void hpet_msi_set_mode(enum clock_event_mode mode
,
457 struct clock_event_device
*evt
)
459 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
460 hpet_set_mode(mode
, evt
, hdev
->num
);
463 static int hpet_msi_next_event(unsigned long delta
,
464 struct clock_event_device
*evt
)
466 struct hpet_dev
*hdev
= EVT_TO_HPET_DEV(evt
);
467 return hpet_next_event(delta
, evt
, hdev
->num
);
470 static int hpet_setup_msi_irq(unsigned int irq
)
472 if (arch_setup_hpet_msi(irq
, hpet_blockid
)) {
479 static int hpet_assign_irq(struct hpet_dev
*dev
)
483 irq
= create_irq_nr(0, -1);
487 set_irq_data(irq
, dev
);
489 if (hpet_setup_msi_irq(irq
))
496 static irqreturn_t
hpet_interrupt_handler(int irq
, void *data
)
498 struct hpet_dev
*dev
= (struct hpet_dev
*)data
;
499 struct clock_event_device
*hevt
= &dev
->evt
;
501 if (!hevt
->event_handler
) {
502 printk(KERN_INFO
"Spurious HPET timer interrupt on HPET timer %d\n",
507 hevt
->event_handler(hevt
);
511 static int hpet_setup_irq(struct hpet_dev
*dev
)
514 if (request_irq(dev
->irq
, hpet_interrupt_handler
,
515 IRQF_TIMER
| IRQF_DISABLED
| IRQF_NOBALANCING
,
519 disable_irq(dev
->irq
);
520 irq_set_affinity(dev
->irq
, cpumask_of(dev
->cpu
));
521 enable_irq(dev
->irq
);
523 printk(KERN_DEBUG
"hpet: %s irq %d for MSI\n",
524 dev
->name
, dev
->irq
);
529 /* This should be called in specific @cpu */
530 static void init_one_hpet_msi_clockevent(struct hpet_dev
*hdev
, int cpu
)
532 struct clock_event_device
*evt
= &hdev
->evt
;
535 WARN_ON(cpu
!= smp_processor_id());
536 if (!(hdev
->flags
& HPET_DEV_VALID
))
539 if (hpet_setup_msi_irq(hdev
->irq
))
543 per_cpu(cpu_hpet_dev
, cpu
) = hdev
;
544 evt
->name
= hdev
->name
;
545 hpet_setup_irq(hdev
);
546 evt
->irq
= hdev
->irq
;
549 evt
->features
= CLOCK_EVT_FEAT_ONESHOT
;
550 if (hdev
->flags
& HPET_DEV_PERI_CAP
)
551 evt
->features
|= CLOCK_EVT_FEAT_PERIODIC
;
553 evt
->set_mode
= hpet_msi_set_mode
;
554 evt
->set_next_event
= hpet_msi_next_event
;
558 * The period is a femto seconds value. We need to calculate the
559 * scaled math multiplication factor for nanosecond to hpet tick
562 hpet_freq
= FSEC_PER_SEC
;
563 do_div(hpet_freq
, hpet_period
);
564 evt
->mult
= div_sc((unsigned long) hpet_freq
,
565 NSEC_PER_SEC
, evt
->shift
);
566 /* Calculate the max delta */
567 evt
->max_delta_ns
= clockevent_delta2ns(0x7FFFFFFF, evt
);
568 /* 5 usec minimum reprogramming delta. */
569 evt
->min_delta_ns
= 5000;
571 evt
->cpumask
= cpumask_of(hdev
->cpu
);
572 clockevents_register_device(evt
);
576 /* Reserve at least one timer for userspace (/dev/hpet) */
577 #define RESERVE_TIMERS 1
579 #define RESERVE_TIMERS 0
582 static void hpet_msi_capability_lookup(unsigned int start_timer
)
585 unsigned int num_timers
;
586 unsigned int num_timers_used
= 0;
589 if (hpet_msi_disable
)
592 if (boot_cpu_has(X86_FEATURE_ARAT
))
594 id
= hpet_readl(HPET_ID
);
596 num_timers
= ((id
& HPET_ID_NUMBER
) >> HPET_ID_NUMBER_SHIFT
);
597 num_timers
++; /* Value read out starts from 0 */
600 hpet_devs
= kzalloc(sizeof(struct hpet_dev
) * num_timers
, GFP_KERNEL
);
604 hpet_num_timers
= num_timers
;
606 for (i
= start_timer
; i
< num_timers
- RESERVE_TIMERS
; i
++) {
607 struct hpet_dev
*hdev
= &hpet_devs
[num_timers_used
];
608 unsigned int cfg
= hpet_readl(HPET_Tn_CFG(i
));
610 /* Only consider HPET timer with MSI support */
611 if (!(cfg
& HPET_TN_FSB_CAP
))
615 if (cfg
& HPET_TN_PERIODIC_CAP
)
616 hdev
->flags
|= HPET_DEV_PERI_CAP
;
619 sprintf(hdev
->name
, "hpet%d", i
);
620 if (hpet_assign_irq(hdev
))
623 hdev
->flags
|= HPET_DEV_FSB_CAP
;
624 hdev
->flags
|= HPET_DEV_VALID
;
626 if (num_timers_used
== num_possible_cpus())
630 printk(KERN_INFO
"HPET: %d timers in total, %d timers will be used for per-cpu timer\n",
631 num_timers
, num_timers_used
);
635 static void hpet_reserve_msi_timers(struct hpet_data
*hd
)
642 for (i
= 0; i
< hpet_num_timers
; i
++) {
643 struct hpet_dev
*hdev
= &hpet_devs
[i
];
645 if (!(hdev
->flags
& HPET_DEV_VALID
))
648 hd
->hd_irq
[hdev
->num
] = hdev
->irq
;
649 hpet_reserve_timer(hd
, hdev
->num
);
654 static struct hpet_dev
*hpet_get_unused_timer(void)
661 for (i
= 0; i
< hpet_num_timers
; i
++) {
662 struct hpet_dev
*hdev
= &hpet_devs
[i
];
664 if (!(hdev
->flags
& HPET_DEV_VALID
))
666 if (test_and_set_bit(HPET_DEV_USED_BIT
,
667 (unsigned long *)&hdev
->flags
))
674 struct hpet_work_struct
{
675 struct delayed_work work
;
676 struct completion complete
;
679 static void hpet_work(struct work_struct
*w
)
681 struct hpet_dev
*hdev
;
682 int cpu
= smp_processor_id();
683 struct hpet_work_struct
*hpet_work
;
685 hpet_work
= container_of(w
, struct hpet_work_struct
, work
.work
);
687 hdev
= hpet_get_unused_timer();
689 init_one_hpet_msi_clockevent(hdev
, cpu
);
691 complete(&hpet_work
->complete
);
694 static int hpet_cpuhp_notify(struct notifier_block
*n
,
695 unsigned long action
, void *hcpu
)
697 unsigned long cpu
= (unsigned long)hcpu
;
698 struct hpet_work_struct work
;
699 struct hpet_dev
*hdev
= per_cpu(cpu_hpet_dev
, cpu
);
701 switch (action
& 0xf) {
703 INIT_DELAYED_WORK_ON_STACK(&work
.work
, hpet_work
);
704 init_completion(&work
.complete
);
705 schedule_delayed_work_on(cpu
, &work
.work
, 0);
706 wait_for_completion(&work
.complete
);
707 destroy_timer_on_stack(&work
.work
.timer
);
711 free_irq(hdev
->irq
, hdev
);
712 hdev
->flags
&= ~HPET_DEV_USED
;
713 per_cpu(cpu_hpet_dev
, cpu
) = NULL
;
721 static int hpet_setup_msi_irq(unsigned int irq
)
725 static void hpet_msi_capability_lookup(unsigned int start_timer
)
731 static void hpet_reserve_msi_timers(struct hpet_data
*hd
)
737 static int hpet_cpuhp_notify(struct notifier_block
*n
,
738 unsigned long action
, void *hcpu
)
746 * Clock source related code
748 static cycle_t
read_hpet(struct clocksource
*cs
)
750 return (cycle_t
)hpet_readl(HPET_COUNTER
);
754 static cycle_t __vsyscall_fn
vread_hpet(void)
756 return readl((const void __iomem
*)fix_to_virt(VSYSCALL_HPET
) + 0xf0);
760 static struct clocksource clocksource_hpet
= {
765 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
766 .resume
= hpet_resume_counter
,
772 static int hpet_clocksource_register(void)
778 /* Start the counter */
779 hpet_restart_counter();
781 /* Verify whether hpet counter works */
782 t1
= hpet_readl(HPET_COUNTER
);
786 * We don't know the TSC frequency yet, but waiting for
787 * 200000 TSC cycles is safe:
794 } while ((now
- start
) < 200000UL);
796 if (t1
== hpet_readl(HPET_COUNTER
)) {
798 "HPET counter not counting. HPET disabled\n");
803 * The definition of mult is (include/linux/clocksource.h)
804 * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
805 * so we first need to convert hpet_period to ns/cyc units:
806 * mult/2^shift = ns/cyc = hpet_period/10^6
807 * mult = (hpet_period * 2^shift)/10^6
808 * mult = (hpet_period << shift)/FSEC_PER_NSEC
811 /* Need to convert hpet_period (fsec/cyc) to cyc/sec:
813 * cyc/sec = FSEC_PER_SEC/hpet_period(fsec/cyc)
814 * cyc/sec = (FSEC_PER_NSEC * NSEC_PER_SEC)/hpet_period
816 hpet_freq
= FSEC_PER_SEC
;
817 do_div(hpet_freq
, hpet_period
);
818 clocksource_register_hz(&clocksource_hpet
, (u32
)hpet_freq
);
824 * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
826 int __init
hpet_enable(void)
831 if (!is_hpet_capable())
837 * Read the period and check for a sane value:
839 hpet_period
= hpet_readl(HPET_PERIOD
);
842 * AMD SB700 based systems with spread spectrum enabled use a
843 * SMM based HPET emulation to provide proper frequency
844 * setting. The SMM code is initialized with the first HPET
845 * register access and takes some time to complete. During
846 * this time the config register reads 0xffffffff. We check
847 * for max. 1000 loops whether the config register reads a non
848 * 0xffffffff value to make sure that HPET is up and running
849 * before we go further. A counting loop is safe, as the HPET
850 * access takes thousands of CPU cycles. On non SB700 based
851 * machines this check is only done once and has no side
854 for (i
= 0; hpet_readl(HPET_CFG
) == 0xFFFFFFFF; i
++) {
857 "HPET config register value = 0xFFFFFFFF. "
863 if (hpet_period
< HPET_MIN_PERIOD
|| hpet_period
> HPET_MAX_PERIOD
)
867 * Read the HPET ID register to retrieve the IRQ routing
868 * information and the number of channels
870 id
= hpet_readl(HPET_ID
);
873 #ifdef CONFIG_HPET_EMULATE_RTC
875 * The legacy routing mode needs at least two channels, tick timer
876 * and the rtc emulation channel.
878 if (!(id
& HPET_ID_NUMBER
))
882 if (hpet_clocksource_register())
885 if (id
& HPET_ID_LEGSUP
) {
886 hpet_legacy_clockevent_register();
892 hpet_clear_mapping();
898 * Needs to be late, as the reserve_timer code calls kalloc !
900 * Not a problem on i386 as hpet_enable is called from late_time_init,
901 * but on x86_64 it is necessary !
903 static __init
int hpet_late_init(void)
907 if (boot_hpet_disable
)
911 if (!force_hpet_address
)
914 hpet_address
= force_hpet_address
;
918 if (!hpet_virt_address
)
921 if (hpet_readl(HPET_ID
) & HPET_ID_LEGSUP
)
922 hpet_msi_capability_lookup(2);
924 hpet_msi_capability_lookup(0);
926 hpet_reserve_platform_timers(hpet_readl(HPET_ID
));
929 if (hpet_msi_disable
)
932 if (boot_cpu_has(X86_FEATURE_ARAT
))
935 for_each_online_cpu(cpu
) {
936 hpet_cpuhp_notify(NULL
, CPU_ONLINE
, (void *)(long)cpu
);
939 /* This notifier should be called after workqueue is ready */
940 hotcpu_notifier(hpet_cpuhp_notify
, -20);
944 fs_initcall(hpet_late_init
);
946 void hpet_disable(void)
948 if (is_hpet_capable() && hpet_virt_address
) {
949 unsigned int cfg
= hpet_readl(HPET_CFG
);
951 if (hpet_legacy_int_enabled
) {
952 cfg
&= ~HPET_CFG_LEGACY
;
953 hpet_legacy_int_enabled
= 0;
955 cfg
&= ~HPET_CFG_ENABLE
;
956 hpet_writel(cfg
, HPET_CFG
);
960 #ifdef CONFIG_HPET_EMULATE_RTC
962 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
963 * is enabled, we support RTC interrupt functionality in software.
964 * RTC has 3 kinds of interrupts:
965 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
967 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
968 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
969 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
970 * (1) and (2) above are implemented using polling at a frequency of
971 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
972 * overhead. (DEFAULT_RTC_INT_FREQ)
973 * For (3), we use interrupts at 64Hz or user specified periodic
974 * frequency, whichever is higher.
976 #include <linux/mc146818rtc.h>
977 #include <linux/rtc.h>
980 #define DEFAULT_RTC_INT_FREQ 64
981 #define DEFAULT_RTC_SHIFT 6
982 #define RTC_NUM_INTS 1
984 static unsigned long hpet_rtc_flags
;
985 static int hpet_prev_update_sec
;
986 static struct rtc_time hpet_alarm_time
;
987 static unsigned long hpet_pie_count
;
988 static u32 hpet_t1_cmp
;
989 static u32 hpet_default_delta
;
990 static u32 hpet_pie_delta
;
991 static unsigned long hpet_pie_limit
;
993 static rtc_irq_handler irq_handler
;
996 * Check that the hpet counter c1 is ahead of the c2
998 static inline int hpet_cnt_ahead(u32 c1
, u32 c2
)
1000 return (s32
)(c2
- c1
) < 0;
1004 * Registers a IRQ handler.
1006 int hpet_register_irq_handler(rtc_irq_handler handler
)
1008 if (!is_hpet_enabled())
1013 irq_handler
= handler
;
1017 EXPORT_SYMBOL_GPL(hpet_register_irq_handler
);
1020 * Deregisters the IRQ handler registered with hpet_register_irq_handler()
1023 void hpet_unregister_irq_handler(rtc_irq_handler handler
)
1025 if (!is_hpet_enabled())
1031 EXPORT_SYMBOL_GPL(hpet_unregister_irq_handler
);
1034 * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
1035 * is not supported by all HPET implementations for timer 1.
1037 * hpet_rtc_timer_init() is called when the rtc is initialized.
1039 int hpet_rtc_timer_init(void)
1041 unsigned int cfg
, cnt
, delta
;
1042 unsigned long flags
;
1044 if (!is_hpet_enabled())
1047 if (!hpet_default_delta
) {
1050 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
1051 clc
>>= hpet_clockevent
.shift
+ DEFAULT_RTC_SHIFT
;
1052 hpet_default_delta
= clc
;
1055 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
1056 delta
= hpet_default_delta
;
1058 delta
= hpet_pie_delta
;
1060 local_irq_save(flags
);
1062 cnt
= delta
+ hpet_readl(HPET_COUNTER
);
1063 hpet_writel(cnt
, HPET_T1_CMP
);
1066 cfg
= hpet_readl(HPET_T1_CFG
);
1067 cfg
&= ~HPET_TN_PERIODIC
;
1068 cfg
|= HPET_TN_ENABLE
| HPET_TN_32BIT
;
1069 hpet_writel(cfg
, HPET_T1_CFG
);
1071 local_irq_restore(flags
);
1075 EXPORT_SYMBOL_GPL(hpet_rtc_timer_init
);
1078 * The functions below are called from rtc driver.
1079 * Return 0 if HPET is not being used.
1080 * Otherwise do the necessary changes and return 1.
1082 int hpet_mask_rtc_irq_bit(unsigned long bit_mask
)
1084 if (!is_hpet_enabled())
1087 hpet_rtc_flags
&= ~bit_mask
;
1090 EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit
);
1092 int hpet_set_rtc_irq_bit(unsigned long bit_mask
)
1094 unsigned long oldbits
= hpet_rtc_flags
;
1096 if (!is_hpet_enabled())
1099 hpet_rtc_flags
|= bit_mask
;
1101 if ((bit_mask
& RTC_UIE
) && !(oldbits
& RTC_UIE
))
1102 hpet_prev_update_sec
= -1;
1105 hpet_rtc_timer_init();
1109 EXPORT_SYMBOL_GPL(hpet_set_rtc_irq_bit
);
1111 int hpet_set_alarm_time(unsigned char hrs
, unsigned char min
,
1114 if (!is_hpet_enabled())
1117 hpet_alarm_time
.tm_hour
= hrs
;
1118 hpet_alarm_time
.tm_min
= min
;
1119 hpet_alarm_time
.tm_sec
= sec
;
1123 EXPORT_SYMBOL_GPL(hpet_set_alarm_time
);
1125 int hpet_set_periodic_freq(unsigned long freq
)
1129 if (!is_hpet_enabled())
1132 if (freq
<= DEFAULT_RTC_INT_FREQ
)
1133 hpet_pie_limit
= DEFAULT_RTC_INT_FREQ
/ freq
;
1135 clc
= (uint64_t) hpet_clockevent
.mult
* NSEC_PER_SEC
;
1137 clc
>>= hpet_clockevent
.shift
;
1138 hpet_pie_delta
= clc
;
1143 EXPORT_SYMBOL_GPL(hpet_set_periodic_freq
);
1145 int hpet_rtc_dropped_irq(void)
1147 return is_hpet_enabled();
1149 EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq
);
1151 static void hpet_rtc_timer_reinit(void)
1153 unsigned int cfg
, delta
;
1156 if (unlikely(!hpet_rtc_flags
)) {
1157 cfg
= hpet_readl(HPET_T1_CFG
);
1158 cfg
&= ~HPET_TN_ENABLE
;
1159 hpet_writel(cfg
, HPET_T1_CFG
);
1163 if (!(hpet_rtc_flags
& RTC_PIE
) || hpet_pie_limit
)
1164 delta
= hpet_default_delta
;
1166 delta
= hpet_pie_delta
;
1169 * Increment the comparator value until we are ahead of the
1173 hpet_t1_cmp
+= delta
;
1174 hpet_writel(hpet_t1_cmp
, HPET_T1_CMP
);
1176 } while (!hpet_cnt_ahead(hpet_t1_cmp
, hpet_readl(HPET_COUNTER
)));
1179 if (hpet_rtc_flags
& RTC_PIE
)
1180 hpet_pie_count
+= lost_ints
;
1181 if (printk_ratelimit())
1182 printk(KERN_WARNING
"hpet1: lost %d rtc interrupts\n",
1187 irqreturn_t
hpet_rtc_interrupt(int irq
, void *dev_id
)
1189 struct rtc_time curr_time
;
1190 unsigned long rtc_int_flag
= 0;
1192 hpet_rtc_timer_reinit();
1193 memset(&curr_time
, 0, sizeof(struct rtc_time
));
1195 if (hpet_rtc_flags
& (RTC_UIE
| RTC_AIE
))
1196 get_rtc_time(&curr_time
);
1198 if (hpet_rtc_flags
& RTC_UIE
&&
1199 curr_time
.tm_sec
!= hpet_prev_update_sec
) {
1200 if (hpet_prev_update_sec
>= 0)
1201 rtc_int_flag
= RTC_UF
;
1202 hpet_prev_update_sec
= curr_time
.tm_sec
;
1205 if (hpet_rtc_flags
& RTC_PIE
&&
1206 ++hpet_pie_count
>= hpet_pie_limit
) {
1207 rtc_int_flag
|= RTC_PF
;
1211 if (hpet_rtc_flags
& RTC_AIE
&&
1212 (curr_time
.tm_sec
== hpet_alarm_time
.tm_sec
) &&
1213 (curr_time
.tm_min
== hpet_alarm_time
.tm_min
) &&
1214 (curr_time
.tm_hour
== hpet_alarm_time
.tm_hour
))
1215 rtc_int_flag
|= RTC_AF
;
1218 rtc_int_flag
|= (RTC_IRQF
| (RTC_NUM_INTS
<< 8));
1220 irq_handler(rtc_int_flag
, dev_id
);
1224 EXPORT_SYMBOL_GPL(hpet_rtc_interrupt
);