release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/boards/mach-se/7724/setup.c

   1 /*
   2  * linux/arch/sh/boards/se/7724/setup.c
   3  *
   4  * Copyright (C) 2009 Renesas Solutions Corp.
   5  *
   6  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General Public
   9  * License.  See the file "COPYING" in the main directory of this archive
  10  * for more details.
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/device.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mfd/sh_mobile_sdhi.h>
  18 #include <linux/mtd/physmap.h>
  19 #include <linux/delay.h>
  20 #include <linux/smc91x.h>
  21 #include <linux/gpio.h>
  22 #include <linux/input.h>
  23 #include <linux/input/sh_keysc.h>
  24 #include <linux/usb/r8a66597.h>
  25 #include <video/sh_mobile_lcdc.h>
  26 #include <media/sh_mobile_ceu.h>
  27 #include <sound/sh_fsi.h>
  28 #include <asm/io.h>
  29 #include <asm/heartbeat.h>
  30 #include <asm/sh_eth.h>
  31 #include <asm/clock.h>
  32 #include <asm/suspend.h>
  33 #include <cpu/sh7724.h>
  34 #include <mach-se/mach/se7724.h>
  35
  36
  37 /*
  38  * about 720p
  39  *
  40  * When you use 1280 x 720 lcdc output,
  41  * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
  42  * and change SW41 to use 720p
  43  */
  44
  45 /*
  46  * about sound
  47  *
  48  * This setup.c supports FSI slave mode.
  49  * Please change J20, J21, J22 pin to 1-2 connection.
  50  */
  51
  52 /* Heartbeat */
  53 static struct resource heartbeat_resource = {
  54         .start  = PA_LED,
  55         .end    = PA_LED,
  56         .flags  = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  57 };
  58
  59 static struct platform_device heartbeat_device = {
  60         .name           = "heartbeat",
  61         .id             = -1,
  62         .num_resources  = 1,
  63         .resource       = &heartbeat_resource,
  64 };
  65
  66 /* LAN91C111 */
  67 static struct smc91x_platdata smc91x_info = {
  68         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  69 };
  70
  71 static struct resource smc91x_eth_resources[] = {
  72         [0] = {
  73                 .name   = "SMC91C111" ,
  74                 .start  = 0x1a300300,
  75                 .end    = 0x1a30030f,
  76                 .flags  = IORESOURCE_MEM,
  77         },
  78         [1] = {
  79                 .start  = IRQ0_SMC,
  80                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  81         },
  82 };
  83
  84 static struct platform_device smc91x_eth_device = {
  85         .name   = "smc91x",
  86         .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
  87         .resource       = smc91x_eth_resources,
  88         .dev    = {
  89                 .platform_data  = &smc91x_info,
  90         },
  91 };
  92
  93 /* MTD */
  94 static struct mtd_partition nor_flash_partitions[] = {
  95         {
  96                 .name = "uboot",
  97                 .offset = 0,
  98                 .size = (1 * 1024 * 1024),
  99                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
 100         }, {
 101                 .name = "kernel",
 102                 .offset = MTDPART_OFS_APPEND,
 103                 .size = (2 * 1024 * 1024),
 104         }, {
 105                 .name = "free-area",
 106                 .offset = MTDPART_OFS_APPEND,
 107                 .size = MTDPART_SIZ_FULL,
 108         },
 109 };
 110
 111 static struct physmap_flash_data nor_flash_data = {
 112         .width          = 2,
 113         .parts          = nor_flash_partitions,
 114         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
 115 };
 116
 117 static struct resource nor_flash_resources[] = {
 118         [0] = {
 119                 .name   = "NOR Flash",
 120                 .start  = 0x00000000,
 121                 .end    = 0x01ffffff,
 122                 .flags  = IORESOURCE_MEM,
 123         }
 124 };
 125
 126 static struct platform_device nor_flash_device = {
 127         .name           = "physmap-flash",
 128         .resource       = nor_flash_resources,
 129         .num_resources  = ARRAY_SIZE(nor_flash_resources),
 130         .dev            = {
 131                 .platform_data = &nor_flash_data,
 132         },
 133 };
 134
 135 /* LCDC */
 136 static struct sh_mobile_lcdc_info lcdc_info = {
 137         .clock_source = LCDC_CLK_EXTERNAL,
 138         .ch[0] = {
 139                 .chan = LCDC_CHAN_MAINLCD,
 140                 .bpp = 16,
 141                 .clock_divider = 1,
 142                 .lcd_cfg = {
 143                         .name = "LB070WV1",
 144                         .sync = 0, /* hsync and vsync are active low */
 145                 },
 146                 .lcd_size_cfg = { /* 7.0 inch */
 147                         .width = 152,
 148                         .height = 91,
 149                 },
 150                 .board_cfg = {
 151                 },
 152         }
 153 };
 154
 155 static struct resource lcdc_resources[] = {
 156         [0] = {
 157                 .name   = "LCDC",
 158                 .start  = 0xfe940000,
 159                 .end    = 0xfe942fff,
 160                 .flags  = IORESOURCE_MEM,
 161         },
 162         [1] = {
 163                 .start  = 106,
 164                 .flags  = IORESOURCE_IRQ,
 165         },
 166 };
 167
 168 static struct platform_device lcdc_device = {
 169         .name           = "sh_mobile_lcdc_fb",
 170         .num_resources  = ARRAY_SIZE(lcdc_resources),
 171         .resource       = lcdc_resources,
 172         .dev            = {
 173                 .platform_data  = &lcdc_info,
 174         },
 175         .archdata = {
 176                 .hwblk_id = HWBLK_LCDC,
 177         },
 178 };
 179
 180 /* CEU0 */
 181 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
 182         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 183 };
 184
 185 static struct resource ceu0_resources[] = {
 186         [0] = {
 187                 .name   = "CEU0",
 188                 .start  = 0xfe910000,
 189                 .end    = 0xfe91009f,
 190                 .flags  = IORESOURCE_MEM,
 191         },
 192         [1] = {
 193                 .start  = 52,
 194                 .flags  = IORESOURCE_IRQ,
 195         },
 196         [2] = {
 197                 /* place holder for contiguous memory */
 198         },
 199 };
 200
 201 static struct platform_device ceu0_device = {
 202         .name           = "sh_mobile_ceu",
 203         .id             = 0, /* "ceu0" clock */
 204         .num_resources  = ARRAY_SIZE(ceu0_resources),
 205         .resource       = ceu0_resources,
 206         .dev    = {
 207                 .platform_data  = &sh_mobile_ceu0_info,
 208         },
 209         .archdata = {
 210                 .hwblk_id = HWBLK_CEU0,
 211         },
 212 };
 213
 214 /* CEU1 */
 215 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
 216         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 217 };
 218
 219 static struct resource ceu1_resources[] = {
 220         [0] = {
 221                 .name   = "CEU1",
 222                 .start  = 0xfe914000,
 223                 .end    = 0xfe91409f,
 224                 .flags  = IORESOURCE_MEM,
 225         },
 226         [1] = {
 227                 .start  = 63,
 228                 .flags  = IORESOURCE_IRQ,
 229         },
 230         [2] = {
 231                 /* place holder for contiguous memory */
 232         },
 233 };
 234
 235 static struct platform_device ceu1_device = {
 236         .name           = "sh_mobile_ceu",
 237         .id             = 1, /* "ceu1" clock */
 238         .num_resources  = ARRAY_SIZE(ceu1_resources),
 239         .resource       = ceu1_resources,
 240         .dev    = {
 241                 .platform_data  = &sh_mobile_ceu1_info,
 242         },
 243         .archdata = {
 244                 .hwblk_id = HWBLK_CEU1,
 245         },
 246 };
 247
 248 /* FSI */
 249 /*
 250  * FSI-A use external clock which came from ak464x.
 251  * So, we should change parent of fsi
 252  */
 253 #define FCLKACR         0xa4150008
 254 static void fsimck_init(struct clk *clk)
 255 {
 256         u32 status = __raw_readl(clk->enable_reg);
 257
 258         /* use external clock */
 259         status &= ~0x000000ff;
 260         status |= 0x00000080;
 261         __raw_writel(status, clk->enable_reg);
 262 }
 263
 264 static struct clk_ops fsimck_clk_ops = {
 265         .init = fsimck_init,
 266 };
 267
 268 static struct clk fsimcka_clk = {
 269         .ops            = &fsimck_clk_ops,
 270         .enable_reg     = (void __iomem *)FCLKACR,
 271         .rate           = 0, /* unknown */
 272 };
 273
 274 /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
 275 static struct sh_fsi_platform_info fsi_info = {
 276         .porta_flags = SH_FSI_BRS_INV |
 277                        SH_FSI_OUT_SLAVE_MODE |
 278                        SH_FSI_IN_SLAVE_MODE |
 279                        SH_FSI_OFMT(PCM) |
 280                        SH_FSI_IFMT(PCM),
 281 };
 282
 283 static struct resource fsi_resources[] = {
 284         [0] = {
 285                 .name   = "FSI",
 286                 .start  = 0xFE3C0000,
 287                 .end    = 0xFE3C021d,
 288                 .flags  = IORESOURCE_MEM,
 289         },
 290         [1] = {
 291                 .start  = 108,
 292                 .flags  = IORESOURCE_IRQ,
 293         },
 294 };
 295
 296 static struct platform_device fsi_device = {
 297         .name           = "sh_fsi",
 298         .id             = 0,
 299         .num_resources  = ARRAY_SIZE(fsi_resources),
 300         .resource       = fsi_resources,
 301         .dev    = {
 302                 .platform_data  = &fsi_info,
 303         },
 304         .archdata = {
 305                 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
 306         },
 307 };
 308
 309 /* KEYSC in SoC (Needs SW33-2 set to ON) */
 310 static struct sh_keysc_info keysc_info = {
 311         .mode = SH_KEYSC_MODE_1,
 312         .scan_timing = 3,
 313         .delay = 50,
 314         .keycodes = {
 315                 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
 316                 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
 317                 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
 318                 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
 319                 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
 320                 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
 321         },
 322 };
 323
 324 static struct resource keysc_resources[] = {
 325         [0] = {
 326                 .name   = "KEYSC",
 327                 .start  = 0x044b0000,
 328                 .end    = 0x044b000f,
 329                 .flags  = IORESOURCE_MEM,
 330         },
 331         [1] = {
 332                 .start  = 79,
 333                 .flags  = IORESOURCE_IRQ,
 334         },
 335 };
 336
 337 static struct platform_device keysc_device = {
 338         .name           = "sh_keysc",
 339         .id             = 0, /* "keysc0" clock */
 340         .num_resources  = ARRAY_SIZE(keysc_resources),
 341         .resource       = keysc_resources,
 342         .dev    = {
 343                 .platform_data  = &keysc_info,
 344         },
 345         .archdata = {
 346                 .hwblk_id = HWBLK_KEYSC,
 347         },
 348 };
 349
 350 /* SH Eth */
 351 static struct resource sh_eth_resources[] = {
 352         [0] = {
 353                 .start = SH_ETH_ADDR,
 354                 .end   = SH_ETH_ADDR + 0x1FC,
 355                 .flags = IORESOURCE_MEM,
 356         },
 357         [1] = {
 358                 .start = 91,
 359                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 360         },
 361 };
 362
 363 static struct sh_eth_plat_data sh_eth_plat = {
 364         .phy = 0x1f, /* SMSC LAN8187 */
 365         .edmac_endian = EDMAC_LITTLE_ENDIAN,
 366 };
 367
 368 static struct platform_device sh_eth_device = {
 369         .name = "sh-eth",
 370         .id     = 0,
 371         .dev = {
 372                 .platform_data = &sh_eth_plat,
 373         },
 374         .num_resources = ARRAY_SIZE(sh_eth_resources),
 375         .resource = sh_eth_resources,
 376         .archdata = {
 377                 .hwblk_id = HWBLK_ETHER,
 378         },
 379 };
 380
 381 static struct r8a66597_platdata sh7724_usb0_host_data = {
 382         .on_chip = 1,
 383 };
 384
 385 static struct resource sh7724_usb0_host_resources[] = {
 386         [0] = {
 387                 .start  = 0xa4d80000,
 388                 .end    = 0xa4d80124 - 1,
 389                 .flags  = IORESOURCE_MEM,
 390         },
 391         [1] = {
 392                 .start  = 65,
 393                 .end    = 65,
 394                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 395         },
 396 };
 397
 398 static struct platform_device sh7724_usb0_host_device = {
 399         .name           = "r8a66597_hcd",
 400         .id             = 0,
 401         .dev = {
 402                 .dma_mask               = NULL,         /*  not use dma */
 403                 .coherent_dma_mask      = 0xffffffff,
 404                 .platform_data          = &sh7724_usb0_host_data,
 405         },
 406         .num_resources  = ARRAY_SIZE(sh7724_usb0_host_resources),
 407         .resource       = sh7724_usb0_host_resources,
 408         .archdata = {
 409                 .hwblk_id = HWBLK_USB0,
 410         },
 411 };
 412
 413 static struct r8a66597_platdata sh7724_usb1_gadget_data = {
 414         .on_chip = 1,
 415 };
 416
 417 static struct resource sh7724_usb1_gadget_resources[] = {
 418         [0] = {
 419                 .start  = 0xa4d90000,
 420                 .end    = 0xa4d90123,
 421                 .flags  = IORESOURCE_MEM,
 422         },
 423         [1] = {
 424                 .start  = 66,
 425                 .end    = 66,
 426                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 427         },
 428 };
 429
 430 static struct platform_device sh7724_usb1_gadget_device = {
 431         .name           = "r8a66597_udc",
 432         .id             = 1, /* USB1 */
 433         .dev = {
 434                 .dma_mask               = NULL,         /*  not use dma */
 435                 .coherent_dma_mask      = 0xffffffff,
 436                 .platform_data          = &sh7724_usb1_gadget_data,
 437         },
 438         .num_resources  = ARRAY_SIZE(sh7724_usb1_gadget_resources),
 439         .resource       = sh7724_usb1_gadget_resources,
 440 };
 441
 442 static struct resource sdhi0_cn7_resources[] = {
 443         [0] = {
 444                 .name   = "SDHI0",
 445                 .start  = 0x04ce0000,
 446                 .end    = 0x04ce01ff,
 447                 .flags  = IORESOURCE_MEM,
 448         },
 449         [1] = {
 450                 .start  = 100,
 451                 .flags  = IORESOURCE_IRQ,
 452         },
 453 };
 454
 455 static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
 456         .dma_slave_tx   = SHDMA_SLAVE_SDHI0_TX,
 457         .dma_slave_rx   = SHDMA_SLAVE_SDHI0_RX,
 458 };
 459
 460 static struct platform_device sdhi0_cn7_device = {
 461         .name           = "sh_mobile_sdhi",
 462         .id             = 0,
 463         .num_resources  = ARRAY_SIZE(sdhi0_cn7_resources),
 464         .resource       = sdhi0_cn7_resources,
 465         .dev = {
 466                 .platform_data  = &sh7724_sdhi0_data,
 467         },
 468         .archdata = {
 469                 .hwblk_id = HWBLK_SDHI0,
 470         },
 471 };
 472
 473 static struct resource sdhi1_cn8_resources[] = {
 474         [0] = {
 475                 .name   = "SDHI1",
 476                 .start  = 0x04cf0000,
 477                 .end    = 0x04cf01ff,
 478                 .flags  = IORESOURCE_MEM,
 479         },
 480         [1] = {
 481                 .start  = 23,
 482                 .flags  = IORESOURCE_IRQ,
 483         },
 484 };
 485
 486 static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
 487         .dma_slave_tx   = SHDMA_SLAVE_SDHI1_TX,
 488         .dma_slave_rx   = SHDMA_SLAVE_SDHI1_RX,
 489 };
 490
 491 static struct platform_device sdhi1_cn8_device = {
 492         .name           = "sh_mobile_sdhi",
 493         .id             = 1,
 494         .num_resources  = ARRAY_SIZE(sdhi1_cn8_resources),
 495         .resource       = sdhi1_cn8_resources,
 496         .dev = {
 497                 .platform_data  = &sh7724_sdhi1_data,
 498         },
 499         .archdata = {
 500                 .hwblk_id = HWBLK_SDHI1,
 501         },
 502 };
 503
 504 /* IrDA */
 505 static struct resource irda_resources[] = {
 506         [0] = {
 507                 .name   = "IrDA",
 508                 .start  = 0xA45D0000,
 509                 .end    = 0xA45D0049,
 510                 .flags  = IORESOURCE_MEM,
 511         },
 512         [1] = {
 513                 .start  = 20,
 514                 .flags  = IORESOURCE_IRQ,
 515         },
 516 };
 517
 518 static struct platform_device irda_device = {
 519         .name           = "sh_sir",
 520         .num_resources  = ARRAY_SIZE(irda_resources),
 521         .resource       = irda_resources,
 522 };
 523
 524 #include <media/ak881x.h>
 525 #include <media/sh_vou.h>
 526
 527 static struct ak881x_pdata ak881x_pdata = {
 528         .flags = AK881X_IF_MODE_SLAVE,
 529 };
 530
 531 static struct i2c_board_info ak8813 = {
 532         /* With open J18 jumper address is 0x21 */
 533         I2C_BOARD_INFO("ak8813", 0x20),
 534         .platform_data = &ak881x_pdata,
 535 };
 536
 537 static struct sh_vou_pdata sh_vou_pdata = {
 538         .bus_fmt        = SH_VOU_BUS_8BIT,
 539         .flags          = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
 540         .board_info     = &ak8813,
 541         .i2c_adap       = 0,
 542         .module_name    = "ak881x",
 543 };
 544
 545 static struct resource sh_vou_resources[] = {
 546         [0] = {
 547                 .start  = 0xfe960000,
 548                 .end    = 0xfe962043,
 549                 .flags  = IORESOURCE_MEM,
 550         },
 551         [1] = {
 552                 .start  = 55,
 553                 .flags  = IORESOURCE_IRQ,
 554         },
 555 };
 556
 557 static struct platform_device vou_device = {
 558         .name           = "sh-vou",
 559         .id             = -1,
 560         .num_resources  = ARRAY_SIZE(sh_vou_resources),
 561         .resource       = sh_vou_resources,
 562         .dev            = {
 563                 .platform_data  = &sh_vou_pdata,
 564         },
 565         .archdata       = {
 566                 .hwblk_id       = HWBLK_VOU,
 567         },
 568 };
 569
 570 static struct platform_device *ms7724se_devices[] __initdata = {
 571         &heartbeat_device,
 572         &smc91x_eth_device,
 573         &lcdc_device,
 574         &nor_flash_device,
 575         &ceu0_device,
 576         &ceu1_device,
 577         &keysc_device,
 578         &sh_eth_device,
 579         &sh7724_usb0_host_device,
 580         &sh7724_usb1_gadget_device,
 581         &fsi_device,
 582         &sdhi0_cn7_device,
 583         &sdhi1_cn8_device,
 584         &irda_device,
 585         &vou_device,
 586 };
 587
 588 /* I2C device */
 589 static struct i2c_board_info i2c0_devices[] = {
 590         {
 591                 I2C_BOARD_INFO("ak4642", 0x12),
 592         },
 593 };
 594
 595 #define EEPROM_OP   0xBA206000
 596 #define EEPROM_ADR  0xBA206004
 597 #define EEPROM_DATA 0xBA20600C
 598 #define EEPROM_STAT 0xBA206010
 599 #define EEPROM_STRT 0xBA206014
 600 static int __init sh_eth_is_eeprom_ready(void)
 601 {
 602         int t = 10000;
 603
 604         while (t--) {
 605                 if (!__raw_readw(EEPROM_STAT))
 606                         return 1;
 607                 udelay(1);
 608         }
 609
 610         printk(KERN_ERR "ms7724se can not access to eeprom\n");
 611         return 0;
 612 }
 613
 614 static void __init sh_eth_init(void)
 615 {
 616         int i;
 617         u16 mac;
 618
 619         /* check EEPROM status */
 620         if (!sh_eth_is_eeprom_ready())
 621                 return;
 622
 623         /* read MAC addr from EEPROM */
 624         for (i = 0 ; i < 3 ; i++) {
 625                 __raw_writew(0x0, EEPROM_OP); /* read */
 626                 __raw_writew(i*2, EEPROM_ADR);
 627                 __raw_writew(0x1, EEPROM_STRT);
 628                 if (!sh_eth_is_eeprom_ready())
 629                         return;
 630
 631                 mac = __raw_readw(EEPROM_DATA);
 632                 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
 633                 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
 634         }
 635 }
 636
 637 #define SW4140    0xBA201000
 638 #define FPGA_OUT  0xBA200400
 639 #define PORT_HIZA 0xA4050158
 640 #define PORT_MSELCRB 0xA4050182
 641
 642 #define SW41_A    0x0100
 643 #define SW41_B    0x0200
 644 #define SW41_C    0x0400
 645 #define SW41_D    0x0800
 646 #define SW41_E    0x1000
 647 #define SW41_F    0x2000
 648 #define SW41_G    0x4000
 649 #define SW41_H    0x8000
 650
 651 extern char ms7724se_sdram_enter_start;
 652 extern char ms7724se_sdram_enter_end;
 653 extern char ms7724se_sdram_leave_start;
 654 extern char ms7724se_sdram_leave_end;
 655
 656
 657 static int __init arch_setup(void)
 658 {
 659         /* enable I2C device */
 660         i2c_register_board_info(0, i2c0_devices,
 661                                 ARRAY_SIZE(i2c0_devices));
 662         return 0;
 663 }
 664 arch_initcall(arch_setup);
 665
 666 static int __init devices_setup(void)
 667 {
 668         u16 sw = __raw_readw(SW4140); /* select camera, monitor */
 669         struct clk *clk;
 670         u16 fpga_out;
 671
 672         /* register board specific self-refresh code */
 673         sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
 674                                         SUSP_SH_RSTANDBY,
 675                                         &ms7724se_sdram_enter_start,
 676                                         &ms7724se_sdram_enter_end,
 677                                         &ms7724se_sdram_leave_start,
 678                                         &ms7724se_sdram_leave_end);
 679         /* Reset Release */
 680         fpga_out = __raw_readw(FPGA_OUT);
 681         /* bit4: NTSC_PDN, bit5: NTSC_RESET */
 682         fpga_out &= ~((1 << 1)  | /* LAN */
 683                       (1 << 4)  | /* AK8813 PDN */
 684                       (1 << 5)  | /* AK8813 RESET */
 685                       (1 << 6)  | /* VIDEO DAC */
 686                       (1 << 7)  | /* AK4643 */
 687                       (1 << 8)  | /* IrDA */
 688                       (1 << 12) | /* USB0 */
 689                       (1 << 14)); /* RMII */
 690         __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
 691
 692         udelay(10);
 693
 694         /* AK8813 RESET */
 695         __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
 696
 697         udelay(10);
 698
 699         __raw_writew(fpga_out, FPGA_OUT);
 700
 701         /* turn on USB clocks, use external clock */
 702         __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
 703
 704         /* Let LED9 show STATUS2 */
 705         gpio_request(GPIO_FN_STATUS2, NULL);
 706
 707         /* Lit LED10 show STATUS0 */
 708         gpio_request(GPIO_FN_STATUS0, NULL);
 709
 710         /* Lit LED11 show PDSTATUS */
 711         gpio_request(GPIO_FN_PDSTATUS, NULL);
 712
 713         /* enable USB0 port */
 714         __raw_writew(0x0600, 0xa40501d4);
 715
 716         /* enable USB1 port */
 717         __raw_writew(0x0600, 0xa4050192);
 718
 719         /* enable IRQ 0,1,2 */
 720         gpio_request(GPIO_FN_INTC_IRQ0, NULL);
 721         gpio_request(GPIO_FN_INTC_IRQ1, NULL);
 722         gpio_request(GPIO_FN_INTC_IRQ2, NULL);
 723
 724         /* enable SCIFA3 */
 725         gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
 726         gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
 727         gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
 728         gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
 729         gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
 730
 731         /* enable LCDC */
 732         gpio_request(GPIO_FN_LCDD23,   NULL);
 733         gpio_request(GPIO_FN_LCDD22,   NULL);
 734         gpio_request(GPIO_FN_LCDD21,   NULL);
 735         gpio_request(GPIO_FN_LCDD20,   NULL);
 736         gpio_request(GPIO_FN_LCDD19,   NULL);
 737         gpio_request(GPIO_FN_LCDD18,   NULL);
 738         gpio_request(GPIO_FN_LCDD17,   NULL);
 739         gpio_request(GPIO_FN_LCDD16,   NULL);
 740         gpio_request(GPIO_FN_LCDD15,   NULL);
 741         gpio_request(GPIO_FN_LCDD14,   NULL);
 742         gpio_request(GPIO_FN_LCDD13,   NULL);
 743         gpio_request(GPIO_FN_LCDD12,   NULL);
 744         gpio_request(GPIO_FN_LCDD11,   NULL);
 745         gpio_request(GPIO_FN_LCDD10,   NULL);
 746         gpio_request(GPIO_FN_LCDD9,    NULL);
 747         gpio_request(GPIO_FN_LCDD8,    NULL);
 748         gpio_request(GPIO_FN_LCDD7,    NULL);
 749         gpio_request(GPIO_FN_LCDD6,    NULL);
 750         gpio_request(GPIO_FN_LCDD5,    NULL);
 751         gpio_request(GPIO_FN_LCDD4,    NULL);
 752         gpio_request(GPIO_FN_LCDD3,    NULL);
 753         gpio_request(GPIO_FN_LCDD2,    NULL);
 754         gpio_request(GPIO_FN_LCDD1,    NULL);
 755         gpio_request(GPIO_FN_LCDD0,    NULL);
 756         gpio_request(GPIO_FN_LCDDISP,  NULL);
 757         gpio_request(GPIO_FN_LCDHSYN,  NULL);
 758         gpio_request(GPIO_FN_LCDDCK,   NULL);
 759         gpio_request(GPIO_FN_LCDVSYN,  NULL);
 760         gpio_request(GPIO_FN_LCDDON,   NULL);
 761         gpio_request(GPIO_FN_LCDVEPWC, NULL);
 762         gpio_request(GPIO_FN_LCDVCPWC, NULL);
 763         gpio_request(GPIO_FN_LCDRD,    NULL);
 764         gpio_request(GPIO_FN_LCDLCLK,  NULL);
 765         __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
 766
 767         /* enable CEU0 */
 768         gpio_request(GPIO_FN_VIO0_D15, NULL);
 769         gpio_request(GPIO_FN_VIO0_D14, NULL);
 770         gpio_request(GPIO_FN_VIO0_D13, NULL);
 771         gpio_request(GPIO_FN_VIO0_D12, NULL);
 772         gpio_request(GPIO_FN_VIO0_D11, NULL);
 773         gpio_request(GPIO_FN_VIO0_D10, NULL);
 774         gpio_request(GPIO_FN_VIO0_D9,  NULL);
 775         gpio_request(GPIO_FN_VIO0_D8,  NULL);
 776         gpio_request(GPIO_FN_VIO0_D7,  NULL);
 777         gpio_request(GPIO_FN_VIO0_D6,  NULL);
 778         gpio_request(GPIO_FN_VIO0_D5,  NULL);
 779         gpio_request(GPIO_FN_VIO0_D4,  NULL);
 780         gpio_request(GPIO_FN_VIO0_D3,  NULL);
 781         gpio_request(GPIO_FN_VIO0_D2,  NULL);
 782         gpio_request(GPIO_FN_VIO0_D1,  NULL);
 783         gpio_request(GPIO_FN_VIO0_D0,  NULL);
 784         gpio_request(GPIO_FN_VIO0_VD,  NULL);
 785         gpio_request(GPIO_FN_VIO0_CLK, NULL);
 786         gpio_request(GPIO_FN_VIO0_FLD, NULL);
 787         gpio_request(GPIO_FN_VIO0_HD,  NULL);
 788         platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
 789
 790         /* enable CEU1 */
 791         gpio_request(GPIO_FN_VIO1_D7,  NULL);
 792         gpio_request(GPIO_FN_VIO1_D6,  NULL);
 793         gpio_request(GPIO_FN_VIO1_D5,  NULL);
 794         gpio_request(GPIO_FN_VIO1_D4,  NULL);
 795         gpio_request(GPIO_FN_VIO1_D3,  NULL);
 796         gpio_request(GPIO_FN_VIO1_D2,  NULL);
 797         gpio_request(GPIO_FN_VIO1_D1,  NULL);
 798         gpio_request(GPIO_FN_VIO1_D0,  NULL);
 799         gpio_request(GPIO_FN_VIO1_FLD, NULL);
 800         gpio_request(GPIO_FN_VIO1_HD,  NULL);
 801         gpio_request(GPIO_FN_VIO1_VD,  NULL);
 802         gpio_request(GPIO_FN_VIO1_CLK, NULL);
 803         platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
 804
 805         /* KEYSC */
 806         gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
 807         gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
 808         gpio_request(GPIO_FN_KEYIN4,      NULL);
 809         gpio_request(GPIO_FN_KEYIN3,      NULL);
 810         gpio_request(GPIO_FN_KEYIN2,      NULL);
 811         gpio_request(GPIO_FN_KEYIN1,      NULL);
 812         gpio_request(GPIO_FN_KEYIN0,      NULL);
 813         gpio_request(GPIO_FN_KEYOUT3,     NULL);
 814         gpio_request(GPIO_FN_KEYOUT2,     NULL);
 815         gpio_request(GPIO_FN_KEYOUT1,     NULL);
 816         gpio_request(GPIO_FN_KEYOUT0,     NULL);
 817
 818         /* enable FSI */
 819         gpio_request(GPIO_FN_FSIMCKB,    NULL);
 820         gpio_request(GPIO_FN_FSIMCKA,    NULL);
 821         gpio_request(GPIO_FN_FSIOASD,    NULL);
 822         gpio_request(GPIO_FN_FSIIABCK,   NULL);
 823         gpio_request(GPIO_FN_FSIIALRCK,  NULL);
 824         gpio_request(GPIO_FN_FSIOABCK,   NULL);
 825         gpio_request(GPIO_FN_FSIOALRCK,  NULL);
 826         gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
 827         gpio_request(GPIO_FN_FSIIBSD,    NULL);
 828         gpio_request(GPIO_FN_FSIOBSD,    NULL);
 829         gpio_request(GPIO_FN_FSIIBBCK,   NULL);
 830         gpio_request(GPIO_FN_FSIIBLRCK,  NULL);
 831         gpio_request(GPIO_FN_FSIOBBCK,   NULL);
 832         gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
 833         gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
 834         gpio_request(GPIO_FN_FSIIASD,    NULL);
 835
 836         /* set SPU2 clock to 83.4 MHz */
 837         clk = clk_get(NULL, "spu_clk");
 838         if (clk) {
 839                 clk_set_rate(clk, clk_round_rate(clk, 83333333));
 840                 clk_put(clk);
 841         }
 842
 843         /* change parent of FSI A */
 844         clk = clk_get(NULL, "fsia_clk");
 845         if (clk) {
 846                 clk_register(&fsimcka_clk);
 847                 clk_set_parent(clk, &fsimcka_clk);
 848                 clk_set_rate(clk, 11000);
 849                 clk_set_rate(&fsimcka_clk, 11000);
 850                 clk_put(clk);
 851         }
 852
 853         /* SDHI0 connected to cn7 */
 854         gpio_request(GPIO_FN_SDHI0CD, NULL);
 855         gpio_request(GPIO_FN_SDHI0WP, NULL);
 856         gpio_request(GPIO_FN_SDHI0D3, NULL);
 857         gpio_request(GPIO_FN_SDHI0D2, NULL);
 858         gpio_request(GPIO_FN_SDHI0D1, NULL);
 859         gpio_request(GPIO_FN_SDHI0D0, NULL);
 860         gpio_request(GPIO_FN_SDHI0CMD, NULL);
 861         gpio_request(GPIO_FN_SDHI0CLK, NULL);
 862
 863         /* SDHI1 connected to cn8 */
 864         gpio_request(GPIO_FN_SDHI1CD, NULL);
 865         gpio_request(GPIO_FN_SDHI1WP, NULL);
 866         gpio_request(GPIO_FN_SDHI1D3, NULL);
 867         gpio_request(GPIO_FN_SDHI1D2, NULL);
 868         gpio_request(GPIO_FN_SDHI1D1, NULL);
 869         gpio_request(GPIO_FN_SDHI1D0, NULL);
 870         gpio_request(GPIO_FN_SDHI1CMD, NULL);
 871         gpio_request(GPIO_FN_SDHI1CLK, NULL);
 872
 873         /* enable IrDA */
 874         gpio_request(GPIO_FN_IRDA_OUT, NULL);
 875         gpio_request(GPIO_FN_IRDA_IN,  NULL);
 876
 877         /*
 878          * enable SH-Eth
 879          *
 880          * please remove J33 pin from your board !!
 881          *
 882          * ms7724 board should not use GPIO_FN_LNKSTA pin
 883          * So, This time PTX5 is set to input pin
 884          */
 885         gpio_request(GPIO_FN_RMII_RXD0,    NULL);
 886         gpio_request(GPIO_FN_RMII_RXD1,    NULL);
 887         gpio_request(GPIO_FN_RMII_TXD0,    NULL);
 888         gpio_request(GPIO_FN_RMII_TXD1,    NULL);
 889         gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
 890         gpio_request(GPIO_FN_RMII_TX_EN,   NULL);
 891         gpio_request(GPIO_FN_RMII_RX_ER,   NULL);
 892         gpio_request(GPIO_FN_RMII_CRS_DV,  NULL);
 893         gpio_request(GPIO_FN_MDIO,         NULL);
 894         gpio_request(GPIO_FN_MDC,          NULL);
 895         gpio_request(GPIO_PTX5, NULL);
 896         gpio_direction_input(GPIO_PTX5);
 897         sh_eth_init();
 898
 899         if (sw & SW41_B) {
 900                 /* 720p */
 901                 lcdc_info.ch[0].lcd_cfg.xres         = 1280;
 902                 lcdc_info.ch[0].lcd_cfg.yres         = 720;
 903                 lcdc_info.ch[0].lcd_cfg.left_margin  = 220;
 904                 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
 905                 lcdc_info.ch[0].lcd_cfg.hsync_len    = 40;
 906                 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
 907                 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
 908                 lcdc_info.ch[0].lcd_cfg.vsync_len    = 5;
 909         } else {
 910                 /* VGA */
 911                 lcdc_info.ch[0].lcd_cfg.xres         = 640;
 912                 lcdc_info.ch[0].lcd_cfg.yres         = 480;
 913                 lcdc_info.ch[0].lcd_cfg.left_margin  = 105;
 914                 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
 915                 lcdc_info.ch[0].lcd_cfg.hsync_len    = 96;
 916                 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
 917                 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
 918                 lcdc_info.ch[0].lcd_cfg.vsync_len    = 2;
 919         }
 920
 921         if (sw & SW41_A) {
 922                 /* Digital monitor */
 923                 lcdc_info.ch[0].interface_type = RGB18;
 924                 lcdc_info.ch[0].flags          = 0;
 925         } else {
 926                 /* Analog monitor */
 927                 lcdc_info.ch[0].interface_type = RGB24;
 928                 lcdc_info.ch[0].flags          = LCDC_FLAGS_DWPOL;
 929         }
 930
 931         /* VOU */
 932         gpio_request(GPIO_FN_DV_D15, NULL);
 933         gpio_request(GPIO_FN_DV_D14, NULL);
 934         gpio_request(GPIO_FN_DV_D13, NULL);
 935         gpio_request(GPIO_FN_DV_D12, NULL);
 936         gpio_request(GPIO_FN_DV_D11, NULL);
 937         gpio_request(GPIO_FN_DV_D10, NULL);
 938         gpio_request(GPIO_FN_DV_D9, NULL);
 939         gpio_request(GPIO_FN_DV_D8, NULL);
 940         gpio_request(GPIO_FN_DV_CLKI, NULL);
 941         gpio_request(GPIO_FN_DV_CLK, NULL);
 942         gpio_request(GPIO_FN_DV_VSYNC, NULL);
 943         gpio_request(GPIO_FN_DV_HSYNC, NULL);
 944
 945         return platform_add_devices(ms7724se_devices,
 946                                     ARRAY_SIZE(ms7724se_devices));
 947 }
 948 device_initcall(devices_setup);
 949
 950 static struct sh_machine_vector mv_ms7724se __initmv = {
 951         .mv_name        = "ms7724se",
 952         .mv_init_irq    = init_se7724_IRQ,
 953         .mv_nr_irqs     = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
 954 };