release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org)
   7  */
   8 #ifndef __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
   9 #define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
  10
  11 /*
  12  * Sibyte are MIPS64 processors wired to a specific configuration
  13  */
  14 #define cpu_has_watch           1
  15 #define cpu_has_mips16          0
  16 #define cpu_has_divec           1
  17 #define cpu_has_vce             0
  18 #define cpu_has_cache_cdex_p    0
  19 #define cpu_has_cache_cdex_s    0
  20 #define cpu_has_prefetch        1
  21 #define cpu_has_mcheck          1
  22 #define cpu_has_ejtag           1
  23
  24 #define cpu_has_llsc            1
  25 #define cpu_has_vtag_icache     1
  26 #define cpu_has_dc_aliases      0
  27 #define cpu_has_ic_fills_f_dc   0
  28 #define cpu_has_dsp             0
  29 #define cpu_has_mipsmt          0
  30 #define cpu_has_userlocal       0
  31 #define cpu_icache_snoops_remote_store  0
  32
  33 #define cpu_has_nofpuex         0
  34 #define cpu_has_64bits          1
  35
  36 #define cpu_has_mips32r1        1
  37 #define cpu_has_mips32r2        0
  38 #define cpu_has_mips64r1        1
  39 #define cpu_has_mips64r2        0
  40
  41 #define cpu_has_inclusive_pcaches       0
  42
  43 #define cpu_dcache_line_size()  32
  44 #define cpu_icache_line_size()  32
  45 #define cpu_scache_line_size()  32
  46
  47 #endif /* __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H */