release/src-rt-6.x.4708/linux/linux-2.6.36/arch/frv/mb93090-mb00/pci-frv.c

   1 /* pci-frv.c: low-level PCI access routines
   2  *
   3  * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  * - Derived from the i386 equivalent stuff
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version
  10  * 2 of the License, or (at your option) any later version.
  11  */
  12
  13 #include <linux/types.h>
  14 #include <linux/kernel.h>
  15 #include <linux/pci.h>
  16 #include <linux/init.h>
  17 #include <linux/ioport.h>
  18 #include <linux/errno.h>
  19
  20 #include "pci-frv.h"
  21
  22 /*
  23  * We need to avoid collisions with `mirrored' VGA ports
  24  * and other strange ISA hardware, so we always want the
  25  * addresses to be allocated in the 0x000-0x0ff region
  26  * modulo 0x400.
  27  *
  28  * Why? Because some silly external IO cards only decode
  29  * the low 10 bits of the IO address. The 0x00-0xff region
  30  * is reserved for motherboard devices that decode all 16
  31  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
  32  * but we want to try to avoid allocating at 0x2900-0x2bff
  33  * which might have be mirrored at 0x0100-0x03ff..
  34  */
  35 resource_size_t
  36 pcibios_align_resource(void *data, const struct resource *res,
  37                        resource_size_t size, resource_size_t align)
  38 {
  39         resource_size_t start = res->start;
  40
  41         if ((res->flags & IORESOURCE_IO) && (start & 0x300))
  42                 start = (start + 0x3ff) & ~0x3ff;
  43
  44         return start;
  45 }
  46
  47
  48
  49 static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
  50 {
  51         struct list_head *ln;
  52         struct pci_bus *bus;
  53         struct pci_dev *dev;
  54         int idx;
  55         struct resource *r;
  56
  57         /* Depth-First Search on bus tree */
  58         for (ln=bus_list->next; ln != bus_list; ln=ln->next) {
  59                 bus = pci_bus_b(ln);
  60                 if ((dev = bus->self)) {
  61                         for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
  62                                 r = &dev->resource[idx];
  63                                 if (!r->start)
  64                                         continue;
  65                                 pci_claim_resource(dev, idx);
  66                         }
  67                 }
  68                 pcibios_allocate_bus_resources(&bus->children);
  69         }
  70 }
  71
  72 static void __init pcibios_allocate_resources(int pass)
  73 {
  74         struct pci_dev *dev = NULL;
  75         int idx, disabled;
  76         u16 command;
  77         struct resource *r;
  78
  79         for_each_pci_dev(dev) {
  80                 pci_read_config_word(dev, PCI_COMMAND, &command);
  81                 for(idx = 0; idx < 6; idx++) {
  82                         r = &dev->resource[idx];
  83                         if (r->parent)          /* Already allocated */
  84                                 continue;
  85                         if (!r->start)          /* Address not assigned at all */
  86                                 continue;
  87                         if (r->flags & IORESOURCE_IO)
  88                                 disabled = !(command & PCI_COMMAND_IO);
  89                         else
  90                                 disabled = !(command & PCI_COMMAND_MEMORY);
  91                         if (pass == disabled) {
  92                                 DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",
  93                                     r->start, r->end, r->flags, disabled, pass);
  94                                 if (pci_claim_resource(dev, idx) < 0) {
  95                                         /* We'll assign a new address later */
  96                                         r->end -= r->start;
  97                                         r->start = 0;
  98                                 }
  99                         }
 100                 }
 101                 if (!pass) {
 102                         r = &dev->resource[PCI_ROM_RESOURCE];
 103                         if (r->flags & IORESOURCE_ROM_ENABLE) {
 104                                 /* Turn the ROM off, leave the resource region, but keep it unregistered. */
 105                                 u32 reg;
 106                                 DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
 107                                 r->flags &= ~IORESOURCE_ROM_ENABLE;
 108                                 pci_read_config_dword(dev, dev->rom_base_reg, &reg);
 109                                 pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
 110                         }
 111                 }
 112         }
 113 }
 114
 115 static void __init pcibios_assign_resources(void)
 116 {
 117         struct pci_dev *dev = NULL;
 118         int idx;
 119         struct resource *r;
 120
 121         for_each_pci_dev(dev) {
 122                 int class = dev->class >> 8;
 123
 124                 /* Don't touch classless devices and host bridges */
 125                 if (!class || class == PCI_CLASS_BRIDGE_HOST)
 126                         continue;
 127
 128                 for(idx=0; idx<6; idx++) {
 129                         r = &dev->resource[idx];
 130
 131                         /*
 132                          *  Don't touch IDE controllers and I/O ports of video cards!
 133                          */
 134                         if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
 135                             (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
 136                                 continue;
 137
 138                         /*
 139                          *  We shall assign a new address to this resource, either because
 140                          *  the BIOS forgot to do so or because we have decided the old
 141                          *  address was unusable for some reason.
 142                          */
 143                         if (!r->start && r->end)
 144                                 pci_assign_resource(dev, idx);
 145                 }
 146
 147                 if (pci_probe & PCI_ASSIGN_ROMS) {
 148                         r = &dev->resource[PCI_ROM_RESOURCE];
 149                         r->end -= r->start;
 150                         r->start = 0;
 151                         if (r->end)
 152                                 pci_assign_resource(dev, PCI_ROM_RESOURCE);
 153                 }
 154         }
 155 }
 156
 157 void __init pcibios_resource_survey(void)
 158 {
 159         DBG("PCI: Allocating resources\n");
 160         pcibios_allocate_bus_resources(&pci_root_buses);
 161         pcibios_allocate_resources(0);
 162         pcibios_allocate_resources(1);
 163         pcibios_assign_resources();
 164 }
 165
 166 /*
 167  *  If we set up a device for bus mastering, we need to check the latency
 168  *  timer as certain crappy BIOSes forget to set it properly.
 169  */
 170 unsigned int pcibios_max_latency = 255;
 171
 172 void pcibios_set_master(struct pci_dev *dev)
 173 {
 174         u8 lat;
 175         pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
 176         if (lat < 16)
 177                 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
 178         else if (lat > pcibios_max_latency)
 179                 lat = pcibios_max_latency;
 180         else
 181                 return;
 182         printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
 183         pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
 184 }