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[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / cris / arch-v32 / drivers / i2c.c
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1 /*!***************************************************************************
2 *!
3 *! FILE NAME : i2c.c
4 *!
5 *! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
6 *! kernel modules (i2c_writereg/readreg) and from userspace using
7 *! ioctl()'s
8 *!
9 *! Nov 30 1998 Torbjorn Eliasson Initial version.
10 *! Bjorn Wesen Elinux kernel version.
11 *! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
12 *! don't use PB_I2C if DS1302 uses same bits,
13 *! use PB.
14 *| June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
15 *| generates nack on last received byte,
16 *| instead of ack.
17 *| i2c_getack changed data level while clock
18 *| was high, causing DS75 to see a stop condition
20 *! ---------------------------------------------------------------------------
22 *! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
24 *!***************************************************************************/
26 /****************** INCLUDE FILES SECTION ***********************************/
28 #include <linux/module.h>
29 #include <linux/sched.h>
30 #include <linux/errno.h>
31 #include <linux/kernel.h>
32 #include <linux/fs.h>
33 #include <linux/string.h>
34 #include <linux/init.h>
35 #include <linux/mutex.h>
37 #include <asm/etraxi2c.h>
39 #include <asm/system.h>
40 #include <asm/io.h>
41 #include <asm/delay.h>
43 #include "i2c.h"
45 /****************** I2C DEFINITION SECTION *************************/
47 #define D(x)
49 #define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
50 static DEFINE_MUTEX(i2c_mutex);
51 static const char i2c_name[] = "i2c";
53 #define CLOCK_LOW_TIME 8
54 #define CLOCK_HIGH_TIME 8
55 #define START_CONDITION_HOLD_TIME 8
56 #define STOP_CONDITION_HOLD_TIME 8
57 #define ENABLE_OUTPUT 0x01
58 #define ENABLE_INPUT 0x00
59 #define I2C_CLOCK_HIGH 1
60 #define I2C_CLOCK_LOW 0
61 #define I2C_DATA_HIGH 1
62 #define I2C_DATA_LOW 0
64 #define i2c_enable()
65 #define i2c_disable()
67 /* enable or disable output-enable, to select output or input on the i2c bus */
69 #define i2c_dir_out() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_out)
70 #define i2c_dir_in() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_in)
72 /* control the i2c clock and data signals */
74 #define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x)
75 #define i2c_data(x) crisv32_io_set(&cris_i2c_data, x)
77 /* read a bit from the i2c interface */
79 #define i2c_getbit() crisv32_io_rd(&cris_i2c_data)
81 #define i2c_delay(usecs) udelay(usecs)
83 static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
85 /****************** VARIABLE SECTION ************************************/
87 static struct crisv32_iopin cris_i2c_clk;
88 static struct crisv32_iopin cris_i2c_data;
90 /****************** FUNCTION DEFINITION SECTION *************************/
93 /* generate i2c start condition */
95 void
96 i2c_start(void)
99 * SCL=1 SDA=1
101 i2c_dir_out();
102 i2c_delay(CLOCK_HIGH_TIME/6);
103 i2c_data(I2C_DATA_HIGH);
104 i2c_clk(I2C_CLOCK_HIGH);
105 i2c_delay(CLOCK_HIGH_TIME);
107 * SCL=1 SDA=0
109 i2c_data(I2C_DATA_LOW);
110 i2c_delay(START_CONDITION_HOLD_TIME);
112 * SCL=0 SDA=0
114 i2c_clk(I2C_CLOCK_LOW);
115 i2c_delay(CLOCK_LOW_TIME);
118 /* generate i2c stop condition */
120 void
121 i2c_stop(void)
123 i2c_dir_out();
126 * SCL=0 SDA=0
128 i2c_clk(I2C_CLOCK_LOW);
129 i2c_data(I2C_DATA_LOW);
130 i2c_delay(CLOCK_LOW_TIME*2);
132 * SCL=1 SDA=0
134 i2c_clk(I2C_CLOCK_HIGH);
135 i2c_delay(CLOCK_HIGH_TIME*2);
137 * SCL=1 SDA=1
139 i2c_data(I2C_DATA_HIGH);
140 i2c_delay(STOP_CONDITION_HOLD_TIME);
142 i2c_dir_in();
145 /* write a byte to the i2c interface */
147 void
148 i2c_outbyte(unsigned char x)
150 int i;
152 i2c_dir_out();
154 for (i = 0; i < 8; i++) {
155 if (x & 0x80) {
156 i2c_data(I2C_DATA_HIGH);
157 } else {
158 i2c_data(I2C_DATA_LOW);
161 i2c_delay(CLOCK_LOW_TIME/2);
162 i2c_clk(I2C_CLOCK_HIGH);
163 i2c_delay(CLOCK_HIGH_TIME);
164 i2c_clk(I2C_CLOCK_LOW);
165 i2c_delay(CLOCK_LOW_TIME/2);
166 x <<= 1;
168 i2c_data(I2C_DATA_LOW);
169 i2c_delay(CLOCK_LOW_TIME/2);
172 * enable input
174 i2c_dir_in();
177 /* read a byte from the i2c interface */
179 unsigned char
180 i2c_inbyte(void)
182 unsigned char aBitByte = 0;
183 int i;
185 /* Switch off I2C to get bit */
186 i2c_disable();
187 i2c_dir_in();
188 i2c_delay(CLOCK_HIGH_TIME/2);
190 /* Get bit */
191 aBitByte |= i2c_getbit();
193 /* Enable I2C */
194 i2c_enable();
195 i2c_delay(CLOCK_LOW_TIME/2);
197 for (i = 1; i < 8; i++) {
198 aBitByte <<= 1;
199 /* Clock pulse */
200 i2c_clk(I2C_CLOCK_HIGH);
201 i2c_delay(CLOCK_HIGH_TIME);
202 i2c_clk(I2C_CLOCK_LOW);
203 i2c_delay(CLOCK_LOW_TIME);
205 /* Switch off I2C to get bit */
206 i2c_disable();
207 i2c_dir_in();
208 i2c_delay(CLOCK_HIGH_TIME/2);
210 /* Get bit */
211 aBitByte |= i2c_getbit();
213 /* Enable I2C */
214 i2c_enable();
215 i2c_delay(CLOCK_LOW_TIME/2);
217 i2c_clk(I2C_CLOCK_HIGH);
218 i2c_delay(CLOCK_HIGH_TIME);
221 * we leave the clock low, getbyte is usually followed
222 * by sendack/nack, they assume the clock to be low
224 i2c_clk(I2C_CLOCK_LOW);
225 return aBitByte;
228 /*#---------------------------------------------------------------------------
230 *# FUNCTION NAME: i2c_getack
232 *# DESCRIPTION : checks if ack was received from ic2
234 *#--------------------------------------------------------------------------*/
237 i2c_getack(void)
239 int ack = 1;
241 * enable output
243 i2c_dir_out();
245 * Release data bus by setting
246 * data high
248 i2c_data(I2C_DATA_HIGH);
250 * enable input
252 i2c_dir_in();
253 i2c_delay(CLOCK_HIGH_TIME/4);
255 * generate ACK clock pulse
257 i2c_clk(I2C_CLOCK_HIGH);
260 * now wait for ack
262 i2c_delay(CLOCK_HIGH_TIME/2);
264 * check for ack
266 if (i2c_getbit())
267 ack = 0;
268 i2c_delay(CLOCK_HIGH_TIME/2);
269 if (!ack) {
270 if (!i2c_getbit()) /* receiver pulld SDA low */
271 ack = 1;
272 i2c_delay(CLOCK_HIGH_TIME/2);
276 * our clock is high now, make sure data is low
277 * before we enable our output. If we keep data high
278 * and enable output, we would generate a stop condition.
280 i2c_clk(I2C_CLOCK_LOW);
281 i2c_delay(CLOCK_HIGH_TIME/4);
283 * enable output
285 i2c_dir_out();
287 * remove ACK clock pulse
289 i2c_data(I2C_DATA_HIGH);
290 i2c_delay(CLOCK_LOW_TIME/2);
291 return ack;
294 /*#---------------------------------------------------------------------------
296 *# FUNCTION NAME: I2C::sendAck
298 *# DESCRIPTION : Send ACK on received data
300 *#--------------------------------------------------------------------------*/
301 void
302 i2c_sendack(void)
305 * enable output
307 i2c_delay(CLOCK_LOW_TIME);
308 i2c_dir_out();
310 * set ack pulse high
312 i2c_data(I2C_DATA_LOW);
314 * generate clock pulse
316 i2c_delay(CLOCK_HIGH_TIME/6);
317 i2c_clk(I2C_CLOCK_HIGH);
318 i2c_delay(CLOCK_HIGH_TIME);
319 i2c_clk(I2C_CLOCK_LOW);
320 i2c_delay(CLOCK_LOW_TIME/6);
322 * reset data out
324 i2c_data(I2C_DATA_HIGH);
325 i2c_delay(CLOCK_LOW_TIME);
327 i2c_dir_in();
330 /*#---------------------------------------------------------------------------
332 *# FUNCTION NAME: i2c_sendnack
334 *# DESCRIPTION : Sends NACK on received data
336 *#--------------------------------------------------------------------------*/
337 void
338 i2c_sendnack(void)
341 * enable output
343 i2c_delay(CLOCK_LOW_TIME);
344 i2c_dir_out();
346 * set data high
348 i2c_data(I2C_DATA_HIGH);
350 * generate clock pulse
352 i2c_delay(CLOCK_HIGH_TIME/6);
353 i2c_clk(I2C_CLOCK_HIGH);
354 i2c_delay(CLOCK_HIGH_TIME);
355 i2c_clk(I2C_CLOCK_LOW);
356 i2c_delay(CLOCK_LOW_TIME);
358 i2c_dir_in();
361 /*#---------------------------------------------------------------------------
363 *# FUNCTION NAME: i2c_write
365 *# DESCRIPTION : Writes a value to an I2C device
367 *#--------------------------------------------------------------------------*/
369 i2c_write(unsigned char theSlave, void *data, size_t nbytes)
371 int error, cntr = 3;
372 unsigned char bytes_wrote = 0;
373 unsigned char value;
374 unsigned long flags;
376 spin_lock_irqsave(&i2c_lock, flags);
378 do {
379 error = 0;
381 i2c_start();
383 * send slave address
385 i2c_outbyte((theSlave & 0xfe));
387 * wait for ack
389 if (!i2c_getack())
390 error = 1;
392 * send data
394 for (bytes_wrote = 0; bytes_wrote < nbytes; bytes_wrote++) {
395 memcpy(&value, data + bytes_wrote, sizeof value);
396 i2c_outbyte(value);
398 * now it's time to wait for ack
400 if (!i2c_getack())
401 error |= 4;
404 * end byte stream
406 i2c_stop();
408 } while (error && cntr--);
410 i2c_delay(CLOCK_LOW_TIME);
412 spin_unlock_irqrestore(&i2c_lock, flags);
414 return -error;
417 /*#---------------------------------------------------------------------------
419 *# FUNCTION NAME: i2c_read
421 *# DESCRIPTION : Reads a value from an I2C device
423 *#--------------------------------------------------------------------------*/
425 i2c_read(unsigned char theSlave, void *data, size_t nbytes)
427 unsigned char b = 0;
428 unsigned char bytes_read = 0;
429 int error, cntr = 3;
430 unsigned long flags;
432 spin_lock_irqsave(&i2c_lock, flags);
434 do {
435 error = 0;
436 memset(data, 0, nbytes);
438 * generate start condition
440 i2c_start();
442 * send slave address
444 i2c_outbyte((theSlave | 0x01));
446 * wait for ack
448 if (!i2c_getack())
449 error = 1;
451 * fetch data
453 for (bytes_read = 0; bytes_read < nbytes; bytes_read++) {
454 b = i2c_inbyte();
455 memcpy(data + bytes_read, &b, sizeof b);
457 if (bytes_read < (nbytes - 1))
458 i2c_sendack();
461 * last received byte needs to be nacked
462 * instead of acked
464 i2c_sendnack();
466 * end sequence
468 i2c_stop();
469 } while (error && cntr--);
471 spin_unlock_irqrestore(&i2c_lock, flags);
473 return -error;
476 /*#---------------------------------------------------------------------------
478 *# FUNCTION NAME: i2c_writereg
480 *# DESCRIPTION : Writes a value to an I2C device
482 *#--------------------------------------------------------------------------*/
484 i2c_writereg(unsigned char theSlave, unsigned char theReg,
485 unsigned char theValue)
487 int error, cntr = 3;
488 unsigned long flags;
490 spin_lock_irqsave(&i2c_lock, flags);
492 do {
493 error = 0;
495 i2c_start();
497 * send slave address
499 i2c_outbyte((theSlave & 0xfe));
501 * wait for ack
503 if(!i2c_getack())
504 error = 1;
506 * now select register
508 i2c_dir_out();
509 i2c_outbyte(theReg);
511 * now it's time to wait for ack
513 if(!i2c_getack())
514 error |= 2;
516 * send register register data
518 i2c_outbyte(theValue);
520 * now it's time to wait for ack
522 if(!i2c_getack())
523 error |= 4;
525 * end byte stream
527 i2c_stop();
528 } while(error && cntr--);
530 i2c_delay(CLOCK_LOW_TIME);
532 spin_unlock_irqrestore(&i2c_lock, flags);
534 return -error;
537 /*#---------------------------------------------------------------------------
539 *# FUNCTION NAME: i2c_readreg
541 *# DESCRIPTION : Reads a value from the decoder registers.
543 *#--------------------------------------------------------------------------*/
544 unsigned char
545 i2c_readreg(unsigned char theSlave, unsigned char theReg)
547 unsigned char b = 0;
548 int error, cntr = 3;
549 unsigned long flags;
551 spin_lock_irqsave(&i2c_lock, flags);
553 do {
554 error = 0;
556 * generate start condition
558 i2c_start();
561 * send slave address
563 i2c_outbyte((theSlave & 0xfe));
565 * wait for ack
567 if(!i2c_getack())
568 error = 1;
570 * now select register
572 i2c_dir_out();
573 i2c_outbyte(theReg);
575 * now it's time to wait for ack
577 if(!i2c_getack())
578 error |= 2;
580 * repeat start condition
582 i2c_delay(CLOCK_LOW_TIME);
583 i2c_start();
585 * send slave address
587 i2c_outbyte(theSlave | 0x01);
589 * wait for ack
591 if(!i2c_getack())
592 error |= 4;
594 * fetch register
596 b = i2c_inbyte();
598 * last received byte needs to be nacked
599 * instead of acked
601 i2c_sendnack();
603 * end sequence
605 i2c_stop();
607 } while(error && cntr--);
609 spin_unlock_irqrestore(&i2c_lock, flags);
611 return b;
614 static int
615 i2c_open(struct inode *inode, struct file *filp)
617 return 0;
620 static int
621 i2c_release(struct inode *inode, struct file *filp)
623 return 0;
626 /* Main device API. ioctl's to write or read to/from i2c registers.
629 static long
630 i2c_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
632 int ret;
633 if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
634 return -ENOTTY;
637 switch (_IOC_NR(cmd)) {
638 case I2C_WRITEREG:
639 /* write to an i2c slave */
640 D(printk("i2cw %d %d %d\n",
641 I2C_ARGSLAVE(arg),
642 I2C_ARGREG(arg),
643 I2C_ARGVALUE(arg)));
645 mutex_lock(&i2c_mutex);
646 ret = i2c_writereg(I2C_ARGSLAVE(arg),
647 I2C_ARGREG(arg),
648 I2C_ARGVALUE(arg));
649 mutex_unlock(&i2c_mutex);
650 return ret;
652 case I2C_READREG:
654 unsigned char val;
655 /* read from an i2c slave */
656 D(printk("i2cr %d %d ",
657 I2C_ARGSLAVE(arg),
658 I2C_ARGREG(arg)));
659 mutex_lock(&i2c_mutex);
660 val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
661 mutex_unlock(&i2c_mutex);
662 D(printk("= %d\n", val));
663 return val;
665 default:
666 return -EINVAL;
670 return 0;
673 static const struct file_operations i2c_fops = {
674 .owner = THIS_MODULE,
675 .unlocked_ioctl = i2c_ioctl,
676 .open = i2c_open,
677 .release = i2c_release,
680 static int __init i2c_init(void)
682 static int res;
683 static int first = 1;
685 if (!first)
686 return res;
688 first = 0;
690 /* Setup and enable the DATA and CLK pins */
692 res = crisv32_io_get_name(&cris_i2c_data,
693 CONFIG_ETRAX_V32_I2C_DATA_PORT);
694 if (res < 0)
695 return res;
697 res = crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_V32_I2C_CLK_PORT);
698 crisv32_io_set_dir(&cris_i2c_clk, crisv32_io_dir_out);
700 return res;
704 static int __init i2c_register(void)
706 int res;
708 res = i2c_init();
709 if (res < 0)
710 return res;
712 /* register char device */
714 res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
715 if (res < 0) {
716 printk(KERN_ERR "i2c: couldn't get a major number.\n");
717 return res;
720 printk(KERN_INFO
721 "I2C driver v2.2, (c) 1999-2007 Axis Communications AB\n");
723 return 0;
725 /* this makes sure that i2c_init is called during boot */
726 module_init(i2c_register);
728 /****************** END OF FILE i2c.c ********************************/