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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / blackfin / mach-bf548 / boards / ezkit.c
blob4bc04b486ea2cae658c98084c9f7609452df423b
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/usb/musb.h>
20 #include <asm/bfin5xx_spi.h>
21 #include <asm/dma.h>
22 #include <asm/gpio.h>
23 #include <asm/nand.h>
24 #include <asm/dpmc.h>
25 #include <asm/portmux.h>
26 #include <asm/bfin_sdh.h>
27 #include <mach/bf54x_keys.h>
28 #include <linux/input.h>
29 #include <linux/spi/ad7877.h>
30
31 /*
32 * Name the Board for the /proc/cpuinfo
33 */
34 const char bfin_board_name[] = "ADI BF548-EZKIT";
35
36 /*
37 * Driver needs to know address, irq and flag pin.
38 */
39
40 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
41 #include <linux/usb/isp1760.h>
42 static struct resource bfin_isp1760_resources[] = {
43 [0] = {
44 .start = 0x2C0C0000,
45 .end = 0x2C0C0000 + 0xfffff,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = IRQ_PG7,
50 .end = IRQ_PG7,
51 .flags = IORESOURCE_IRQ,
52 },
53 };
54
55 static struct isp1760_platform_data isp1760_priv = {
56 .is_isp1761 = 0,
57 .bus_width_16 = 1,
58 .port1_otg = 0,
59 .analog_oc = 0,
60 .dack_polarity_high = 0,
61 .dreq_polarity_high = 0,
62 };
63
64 static struct platform_device bfin_isp1760_device = {
65 .name = "isp1760",
66 .id = 0,
67 .dev = {
68 .platform_data = &isp1760_priv,
69 },
70 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
71 .resource = bfin_isp1760_resources,
72 };
73 #endif
74
75 #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
76
77 #include <mach/bf54x-lq043.h>
78
79 static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
80 .width = 95,
81 .height = 54,
82 .xres = {480, 480, 480},
83 .yres = {272, 272, 272},
84 .bpp = {24, 24, 24},
85 .disp = GPIO_PE3,
86 };
87
88 static struct resource bf54x_lq043_resources[] = {
89 {
90 .start = IRQ_EPPI0_ERR,
91 .end = IRQ_EPPI0_ERR,
92 .flags = IORESOURCE_IRQ,
93 },
94 };
95
96 static struct platform_device bf54x_lq043_device = {
97 .name = "bf54x-lq043",
98 .id = -1,
99 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
100 .resource = bf54x_lq043_resources,
101 .dev = {
102 .platform_data = &bf54x_lq043_data,
103 },
104 };
105 #endif
106
107 #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
108 static const unsigned int bf548_keymap[] = {
109 KEYVAL(0, 0, KEY_ENTER),
110 KEYVAL(0, 1, KEY_HELP),
111 KEYVAL(0, 2, KEY_0),
112 KEYVAL(0, 3, KEY_BACKSPACE),
113 KEYVAL(1, 0, KEY_TAB),
114 KEYVAL(1, 1, KEY_9),
115 KEYVAL(1, 2, KEY_8),
116 KEYVAL(1, 3, KEY_7),
117 KEYVAL(2, 0, KEY_DOWN),
118 KEYVAL(2, 1, KEY_6),
119 KEYVAL(2, 2, KEY_5),
120 KEYVAL(2, 3, KEY_4),
121 KEYVAL(3, 0, KEY_UP),
122 KEYVAL(3, 1, KEY_3),
123 KEYVAL(3, 2, KEY_2),
124 KEYVAL(3, 3, KEY_1),
125 };
126
127 static struct bfin_kpad_platform_data bf54x_kpad_data = {
128 .rows = 4,
129 .cols = 4,
130 .keymap = bf548_keymap,
131 .keymapsize = ARRAY_SIZE(bf548_keymap),
132 .repeat = 0,
133 .debounce_time = 5000, /* ns (5ms) */
134 .coldrive_time = 1000, /* ns (1ms) */
135 .keyup_test_interval = 50, /* ms (50ms) */
136 };
137
138 static struct resource bf54x_kpad_resources[] = {
139 {
140 .start = IRQ_KEY,
141 .end = IRQ_KEY,
142 .flags = IORESOURCE_IRQ,
143 },
144 };
145
146 static struct platform_device bf54x_kpad_device = {
147 .name = "bf54x-keys",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
150 .resource = bf54x_kpad_resources,
151 .dev = {
152 .platform_data = &bf54x_kpad_data,
153 },
154 };
155 #endif
156
157 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
158 #include <asm/bfin_rotary.h>
159
160 static struct bfin_rotary_platform_data bfin_rotary_data = {
161 /*.rotary_up_key = KEY_UP,*/
162 /*.rotary_down_key = KEY_DOWN,*/
163 .rotary_rel_code = REL_WHEEL,
164 .rotary_button_key = KEY_ENTER,
165 .debounce = 10, /* 0..17 */
166 .mode = ROT_QUAD_ENC | ROT_DEBE,
167 };
168
169 static struct resource bfin_rotary_resources[] = {
170 {
171 .start = IRQ_CNT,
172 .end = IRQ_CNT,
173 .flags = IORESOURCE_IRQ,
174 },
175 };
176
177 static struct platform_device bfin_rotary_device = {
178 .name = "bfin-rotary",
179 .id = -1,
180 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
181 .resource = bfin_rotary_resources,
182 .dev = {
183 .platform_data = &bfin_rotary_data,
184 },
185 };
186 #endif
187
188 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
189 #include <linux/input/adxl34x.h>
190 static const struct adxl34x_platform_data adxl34x_info = {
191 .x_axis_offset = 0,
192 .y_axis_offset = 0,
193 .z_axis_offset = 0,
194 .tap_threshold = 0x31,
195 .tap_duration = 0x10,
196 .tap_latency = 0x60,
197 .tap_window = 0xF0,
198 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
199 .act_axis_control = 0xFF,
200 .activity_threshold = 5,
201 .inactivity_threshold = 3,
202 .inactivity_time = 4,
203 .free_fall_threshold = 0x7,
204 .free_fall_time = 0x20,
205 .data_rate = 0x8,
206 .data_range = ADXL_FULL_RES,
207
208 .ev_type = EV_ABS,
209 .ev_code_x = ABS_X, /* EV_REL */
210 .ev_code_y = ABS_Y, /* EV_REL */
211 .ev_code_z = ABS_Z, /* EV_REL */
212
213 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
214
215 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
216 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
217 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
218 .fifo_mode = ADXL_FIFO_STREAM,
219 .orientation_enable = ADXL_EN_ORIENTATION_3D,
220 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
221 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
222 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
223 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
224 };
225 #endif
226
227 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
228 static struct platform_device rtc_device = {
229 .name = "rtc-bfin",
230 .id = -1,
231 };
232 #endif
233
234 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
235 #ifdef CONFIG_SERIAL_BFIN_UART0
236 static struct resource bfin_uart0_resources[] = {
237 {
238 .start = UART0_DLL,
239 .end = UART0_RBR+2,
240 .flags = IORESOURCE_MEM,
241 },
242 {
243 .start = IRQ_UART0_RX,
244 .end = IRQ_UART0_RX+1,
245 .flags = IORESOURCE_IRQ,
246 },
247 {
248 .start = IRQ_UART0_ERROR,
249 .end = IRQ_UART0_ERROR,
250 .flags = IORESOURCE_IRQ,
251 },
252 {
253 .start = CH_UART0_TX,
254 .end = CH_UART0_TX,
255 .flags = IORESOURCE_DMA,
256 },
257 {
258 .start = CH_UART0_RX,
259 .end = CH_UART0_RX,
260 .flags = IORESOURCE_DMA,
261 },
262 };
263
264 unsigned short bfin_uart0_peripherals[] = {
265 P_UART0_TX, P_UART0_RX, 0
266 };
267
268 static struct platform_device bfin_uart0_device = {
269 .name = "bfin-uart",
270 .id = 0,
271 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
272 .resource = bfin_uart0_resources,
273 .dev = {
274 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
275 },
276 };
277 #endif
278 #ifdef CONFIG_SERIAL_BFIN_UART1
279 static struct resource bfin_uart1_resources[] = {
280 {
281 .start = UART1_DLL,
282 .end = UART1_RBR+2,
283 .flags = IORESOURCE_MEM,
284 },
285 {
286 .start = IRQ_UART1_RX,
287 .end = IRQ_UART1_RX+1,
288 .flags = IORESOURCE_IRQ,
289 },
290 {
291 .start = IRQ_UART1_ERROR,
292 .end = IRQ_UART1_ERROR,
293 .flags = IORESOURCE_IRQ,
294 },
295 {
296 .start = CH_UART1_TX,
297 .end = CH_UART1_TX,
298 .flags = IORESOURCE_DMA,
299 },
300 {
301 .start = CH_UART1_RX,
302 .end = CH_UART1_RX,
303 .flags = IORESOURCE_DMA,
304 },
305 #ifdef CONFIG_BFIN_UART1_CTSRTS
306 { /* CTS pin -- 0 means not supported */
307 .start = GPIO_PE10,
308 .end = GPIO_PE10,
309 .flags = IORESOURCE_IO,
310 },
311 { /* RTS pin -- 0 means not supported */
312 .start = GPIO_PE9,
313 .end = GPIO_PE9,
314 .flags = IORESOURCE_IO,
315 },
316 #endif
317 };
318
319 unsigned short bfin_uart1_peripherals[] = {
320 P_UART1_TX, P_UART1_RX,
321 #ifdef CONFIG_BFIN_UART1_CTSRTS
322 P_UART1_RTS, P_UART1_CTS,
323 #endif
324 0
325 };
326
327 static struct platform_device bfin_uart1_device = {
328 .name = "bfin-uart",
329 .id = 1,
330 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
331 .resource = bfin_uart1_resources,
332 .dev = {
333 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
334 },
335 };
336 #endif
337 #ifdef CONFIG_SERIAL_BFIN_UART2
338 static struct resource bfin_uart2_resources[] = {
339 {
340 .start = UART2_DLL,
341 .end = UART2_RBR+2,
342 .flags = IORESOURCE_MEM,
343 },
344 {
345 .start = IRQ_UART2_RX,
346 .end = IRQ_UART2_RX+1,
347 .flags = IORESOURCE_IRQ,
348 },
349 {
350 .start = IRQ_UART2_ERROR,
351 .end = IRQ_UART2_ERROR,
352 .flags = IORESOURCE_IRQ,
353 },
354 {
355 .start = CH_UART2_TX,
356 .end = CH_UART2_TX,
357 .flags = IORESOURCE_DMA,
358 },
359 {
360 .start = CH_UART2_RX,
361 .end = CH_UART2_RX,
362 .flags = IORESOURCE_DMA,
363 },
364 };
365
366 unsigned short bfin_uart2_peripherals[] = {
367 P_UART2_TX, P_UART2_RX, 0
368 };
369
370 static struct platform_device bfin_uart2_device = {
371 .name = "bfin-uart",
372 .id = 2,
373 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
374 .resource = bfin_uart2_resources,
375 .dev = {
376 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
377 },
378 };
379 #endif
380 #ifdef CONFIG_SERIAL_BFIN_UART3
381 static struct resource bfin_uart3_resources[] = {
382 {
383 .start = UART3_DLL,
384 .end = UART3_RBR+2,
385 .flags = IORESOURCE_MEM,
386 },
387 {
388 .start = IRQ_UART3_RX,
389 .end = IRQ_UART3_RX+1,
390 .flags = IORESOURCE_IRQ,
391 },
392 {
393 .start = IRQ_UART3_ERROR,
394 .end = IRQ_UART3_ERROR,
395 .flags = IORESOURCE_IRQ,
396 },
397 {
398 .start = CH_UART3_TX,
399 .end = CH_UART3_TX,
400 .flags = IORESOURCE_DMA,
401 },
402 {
403 .start = CH_UART3_RX,
404 .end = CH_UART3_RX,
405 .flags = IORESOURCE_DMA,
406 },
407 #ifdef CONFIG_BFIN_UART3_CTSRTS
408 { /* CTS pin -- 0 means not supported */
409 .start = GPIO_PB3,
410 .end = GPIO_PB3,
411 .flags = IORESOURCE_IO,
412 },
413 { /* RTS pin -- 0 means not supported */
414 .start = GPIO_PB2,
415 .end = GPIO_PB2,
416 .flags = IORESOURCE_IO,
417 },
418 #endif
419 };
420
421 unsigned short bfin_uart3_peripherals[] = {
422 P_UART3_TX, P_UART3_RX,
423 #ifdef CONFIG_BFIN_UART3_CTSRTS
424 P_UART3_RTS, P_UART3_CTS,
425 #endif
426 0
427 };
428
429 static struct platform_device bfin_uart3_device = {
430 .name = "bfin-uart",
431 .id = 3,
432 .num_resources = ARRAY_SIZE(bfin_uart3_resources),
433 .resource = bfin_uart3_resources,
434 .dev = {
435 .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
436 },
437 };
438 #endif
439 #endif
440
441 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
442 #ifdef CONFIG_BFIN_SIR0
443 static struct resource bfin_sir0_resources[] = {
444 {
445 .start = 0xFFC00400,
446 .end = 0xFFC004FF,
447 .flags = IORESOURCE_MEM,
448 },
449 {
450 .start = IRQ_UART0_RX,
451 .end = IRQ_UART0_RX+1,
452 .flags = IORESOURCE_IRQ,
453 },
454 {
455 .start = CH_UART0_RX,
456 .end = CH_UART0_RX+1,
457 .flags = IORESOURCE_DMA,
458 },
459 };
460 static struct platform_device bfin_sir0_device = {
461 .name = "bfin_sir",
462 .id = 0,
463 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
464 .resource = bfin_sir0_resources,
465 };
466 #endif
467 #ifdef CONFIG_BFIN_SIR1
468 static struct resource bfin_sir1_resources[] = {
469 {
470 .start = 0xFFC02000,
471 .end = 0xFFC020FF,
472 .flags = IORESOURCE_MEM,
473 },
474 {
475 .start = IRQ_UART1_RX,
476 .end = IRQ_UART1_RX+1,
477 .flags = IORESOURCE_IRQ,
478 },
479 {
480 .start = CH_UART1_RX,
481 .end = CH_UART1_RX+1,
482 .flags = IORESOURCE_DMA,
483 },
484 };
485 static struct platform_device bfin_sir1_device = {
486 .name = "bfin_sir",
487 .id = 1,
488 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
489 .resource = bfin_sir1_resources,
490 };
491 #endif
492 #ifdef CONFIG_BFIN_SIR2
493 static struct resource bfin_sir2_resources[] = {
494 {
495 .start = 0xFFC02100,
496 .end = 0xFFC021FF,
497 .flags = IORESOURCE_MEM,
498 },
499 {
500 .start = IRQ_UART2_RX,
501 .end = IRQ_UART2_RX+1,
502 .flags = IORESOURCE_IRQ,
503 },
504 {
505 .start = CH_UART2_RX,
506 .end = CH_UART2_RX+1,
507 .flags = IORESOURCE_DMA,
508 },
509 };
510 static struct platform_device bfin_sir2_device = {
511 .name = "bfin_sir",
512 .id = 2,
513 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
514 .resource = bfin_sir2_resources,
515 };
516 #endif
517 #ifdef CONFIG_BFIN_SIR3
518 static struct resource bfin_sir3_resources[] = {
519 {
520 .start = 0xFFC03100,
521 .end = 0xFFC031FF,
522 .flags = IORESOURCE_MEM,
523 },
524 {
525 .start = IRQ_UART3_RX,
526 .end = IRQ_UART3_RX+1,
527 .flags = IORESOURCE_IRQ,
528 },
529 {
530 .start = CH_UART3_RX,
531 .end = CH_UART3_RX+1,
532 .flags = IORESOURCE_DMA,
533 },
534 };
535 static struct platform_device bfin_sir3_device = {
536 .name = "bfin_sir",
537 .id = 3,
538 .num_resources = ARRAY_SIZE(bfin_sir3_resources),
539 .resource = bfin_sir3_resources,
540 };
541 #endif
542 #endif
543
544 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
545 #include <linux/smsc911x.h>
546
547 static struct resource smsc911x_resources[] = {
548 {
549 .name = "smsc911x-memory",
550 .start = 0x24000000,
551 .end = 0x24000000 + 0xFF,
552 .flags = IORESOURCE_MEM,
553 },
554 {
555 .start = IRQ_PE8,
556 .end = IRQ_PE8,
557 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
558 },
559 };
560
561 static struct smsc911x_platform_config smsc911x_config = {
562 .flags = SMSC911X_USE_32BIT,
563 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
564 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
565 .phy_interface = PHY_INTERFACE_MODE_MII,
566 };
567
568 static struct platform_device smsc911x_device = {
569 .name = "smsc911x",
570 .id = 0,
571 .num_resources = ARRAY_SIZE(smsc911x_resources),
572 .resource = smsc911x_resources,
573 .dev = {
574 .platform_data = &smsc911x_config,
575 },
576 };
577 #endif
578
579 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
580 static struct resource musb_resources[] = {
581 [0] = {
582 .start = 0xFFC03C00,
583 .end = 0xFFC040FF,
584 .flags = IORESOURCE_MEM,
585 },
586 [1] = { /* general IRQ */
587 .start = IRQ_USB_INT0,
588 .end = IRQ_USB_INT0,
589 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
590 },
591 [2] = { /* DMA IRQ */
592 .start = IRQ_USB_DMA,
593 .end = IRQ_USB_DMA,
594 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
595 },
596 };
597
598 static struct musb_hdrc_config musb_config = {
599 .multipoint = 0,
600 .dyn_fifo = 0,
601 .soft_con = 1,
602 .dma = 1,
603 .num_eps = 8,
604 .dma_channels = 8,
605 .gpio_vrsel = GPIO_PE7,
606 /* Some custom boards need to be active low, just set it to "0"
607 * if it is the case.
608 */
609 .gpio_vrsel_active = 1,
610 };
611
612 static struct musb_hdrc_platform_data musb_plat = {
613 #if defined(CONFIG_USB_MUSB_OTG)
614 .mode = MUSB_OTG,
615 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
616 .mode = MUSB_HOST,
617 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
618 .mode = MUSB_PERIPHERAL,
619 #endif
620 .config = &musb_config,
621 };
622
623 static u64 musb_dmamask = ~(u32)0;
624
625 static struct platform_device musb_device = {
626 .name = "musb_hdrc",
627 .id = 0,
628 .dev = {
629 .dma_mask = &musb_dmamask,
630 .coherent_dma_mask = 0xffffffff,
631 .platform_data = &musb_plat,
632 },
633 .num_resources = ARRAY_SIZE(musb_resources),
634 .resource = musb_resources,
635 };
636 #endif
637
638 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
639 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
640 static struct resource bfin_sport0_uart_resources[] = {
641 {
642 .start = SPORT0_TCR1,
643 .end = SPORT0_MRCS3+4,
644 .flags = IORESOURCE_MEM,
645 },
646 {
647 .start = IRQ_SPORT0_RX,
648 .end = IRQ_SPORT0_RX+1,
649 .flags = IORESOURCE_IRQ,
650 },
651 {
652 .start = IRQ_SPORT0_ERROR,
653 .end = IRQ_SPORT0_ERROR,
654 .flags = IORESOURCE_IRQ,
655 },
656 };
657
658 unsigned short bfin_sport0_peripherals[] = {
659 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
660 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
661 };
662
663 static struct platform_device bfin_sport0_uart_device = {
664 .name = "bfin-sport-uart",
665 .id = 0,
666 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
667 .resource = bfin_sport0_uart_resources,
668 .dev = {
669 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
670 },
671 };
672 #endif
673 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
674 static struct resource bfin_sport1_uart_resources[] = {
675 {
676 .start = SPORT1_TCR1,
677 .end = SPORT1_MRCS3+4,
678 .flags = IORESOURCE_MEM,
679 },
680 {
681 .start = IRQ_SPORT1_RX,
682 .end = IRQ_SPORT1_RX+1,
683 .flags = IORESOURCE_IRQ,
684 },
685 {
686 .start = IRQ_SPORT1_ERROR,
687 .end = IRQ_SPORT1_ERROR,
688 .flags = IORESOURCE_IRQ,
689 },
690 };
691
692 unsigned short bfin_sport1_peripherals[] = {
693 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
694 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
695 };
696
697 static struct platform_device bfin_sport1_uart_device = {
698 .name = "bfin-sport-uart",
699 .id = 1,
700 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
701 .resource = bfin_sport1_uart_resources,
702 .dev = {
703 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
704 },
705 };
706 #endif
707 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
708 static struct resource bfin_sport2_uart_resources[] = {
709 {
710 .start = SPORT2_TCR1,
711 .end = SPORT2_MRCS3+4,
712 .flags = IORESOURCE_MEM,
713 },
714 {
715 .start = IRQ_SPORT2_RX,
716 .end = IRQ_SPORT2_RX+1,
717 .flags = IORESOURCE_IRQ,
718 },
719 {
720 .start = IRQ_SPORT2_ERROR,
721 .end = IRQ_SPORT2_ERROR,
722 .flags = IORESOURCE_IRQ,
723 },
724 };
725
726 unsigned short bfin_sport2_peripherals[] = {
727 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
728 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
729 };
730
731 static struct platform_device bfin_sport2_uart_device = {
732 .name = "bfin-sport-uart",
733 .id = 2,
734 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
735 .resource = bfin_sport2_uart_resources,
736 .dev = {
737 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
738 },
739 };
740 #endif
741 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
742 static struct resource bfin_sport3_uart_resources[] = {
743 {
744 .start = SPORT3_TCR1,
745 .end = SPORT3_MRCS3+4,
746 .flags = IORESOURCE_MEM,
747 },
748 {
749 .start = IRQ_SPORT3_RX,
750 .end = IRQ_SPORT3_RX+1,
751 .flags = IORESOURCE_IRQ,
752 },
753 {
754 .start = IRQ_SPORT3_ERROR,
755 .end = IRQ_SPORT3_ERROR,
756 .flags = IORESOURCE_IRQ,
757 },
758 };
759
760 unsigned short bfin_sport3_peripherals[] = {
761 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
762 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
763 };
764
765 static struct platform_device bfin_sport3_uart_device = {
766 .name = "bfin-sport-uart",
767 .id = 3,
768 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
769 .resource = bfin_sport3_uart_resources,
770 .dev = {
771 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
772 },
773 };
774 #endif
775 #endif
776
777 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
778 unsigned short bfin_can_peripherals[] = {
779 P_CAN0_RX, P_CAN0_TX, 0
780 };
781
782 static struct resource bfin_can_resources[] = {
783 {
784 .start = 0xFFC02A00,
785 .end = 0xFFC02FFF,
786 .flags = IORESOURCE_MEM,
787 },
788 {
789 .start = IRQ_CAN0_RX,
790 .end = IRQ_CAN0_RX,
791 .flags = IORESOURCE_IRQ,
792 },
793 {
794 .start = IRQ_CAN0_TX,
795 .end = IRQ_CAN0_TX,
796 .flags = IORESOURCE_IRQ,
797 },
798 {
799 .start = IRQ_CAN0_ERROR,
800 .end = IRQ_CAN0_ERROR,
801 .flags = IORESOURCE_IRQ,
802 },
803 };
804
805 static struct platform_device bfin_can_device = {
806 .name = "bfin_can",
807 .num_resources = ARRAY_SIZE(bfin_can_resources),
808 .resource = bfin_can_resources,
809 .dev = {
810 .platform_data = &bfin_can_peripherals, /* Passed to driver */
811 },
812 };
813 #endif
814
815 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
816 static struct resource bfin_atapi_resources[] = {
817 {
818 .start = 0xFFC03800,
819 .end = 0xFFC0386F,
820 .flags = IORESOURCE_MEM,
821 },
822 {
823 .start = IRQ_ATAPI_ERR,
824 .end = IRQ_ATAPI_ERR,
825 .flags = IORESOURCE_IRQ,
826 },
827 };
828
829 static struct platform_device bfin_atapi_device = {
830 .name = "pata-bf54x",
831 .id = -1,
832 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
833 .resource = bfin_atapi_resources,
834 };
835 #endif
836
837 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
838 static struct mtd_partition partition_info[] = {
839 {
840 .name = "linux kernel(nand)",
841 .offset = 0,
842 .size = 4 * 1024 * 1024,
843 },
844 {
845 .name = "file system(nand)",
846 .offset = MTDPART_OFS_APPEND,
847 .size = MTDPART_SIZ_FULL,
848 },
849 };
850
851 static struct bf5xx_nand_platform bf5xx_nand_platform = {
852 .data_width = NFC_NWIDTH_8,
853 .partitions = partition_info,
854 .nr_partitions = ARRAY_SIZE(partition_info),
855 .rd_dly = 3,
856 .wr_dly = 3,
857 };
858
859 static struct resource bf5xx_nand_resources[] = {
860 {
861 .start = 0xFFC03B00,
862 .end = 0xFFC03B4F,
863 .flags = IORESOURCE_MEM,
864 },
865 {
866 .start = CH_NFC,
867 .end = CH_NFC,
868 .flags = IORESOURCE_IRQ,
869 },
870 };
871
872 static struct platform_device bf5xx_nand_device = {
873 .name = "bf5xx-nand",
874 .id = 0,
875 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
876 .resource = bf5xx_nand_resources,
877 .dev = {
878 .platform_data = &bf5xx_nand_platform,
879 },
880 };
881 #endif
882
883 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
884
885 static struct bfin_sd_host bfin_sdh_data = {
886 .dma_chan = CH_SDH,
887 .irq_int0 = IRQ_SDH_MASK0,
888 .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
889 };
890
891 static struct platform_device bf54x_sdh_device = {
892 .name = "bfin-sdh",
893 .id = 0,
894 .dev = {
895 .platform_data = &bfin_sdh_data,
896 },
897 };
898 #endif
899
900 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
901 static struct mtd_partition ezkit_partitions[] = {
902 {
903 .name = "bootloader(nor)",
904 .size = 0x40000,
905 .offset = 0,
906 }, {
907 .name = "linux kernel(nor)",
908 .size = 0x400000,
909 .offset = MTDPART_OFS_APPEND,
910 }, {
911 .name = "file system(nor)",
912 .size = MTDPART_SIZ_FULL,
913 .offset = MTDPART_OFS_APPEND,
914 }
915 };
916
917 static struct physmap_flash_data ezkit_flash_data = {
918 .width = 2,
919 .parts = ezkit_partitions,
920 .nr_parts = ARRAY_SIZE(ezkit_partitions),
921 };
922
923 static struct resource ezkit_flash_resource = {
924 .start = 0x20000000,
925 .end = 0x21ffffff,
926 .flags = IORESOURCE_MEM,
927 };
928
929 static struct platform_device ezkit_flash_device = {
930 .name = "physmap-flash",
931 .id = 0,
932 .dev = {
933 .platform_data = &ezkit_flash_data,
934 },
935 .num_resources = 1,
936 .resource = &ezkit_flash_resource,
937 };
938 #endif
939
940 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
941 /* SPI flash chip (m25p16) */
942 static struct mtd_partition bfin_spi_flash_partitions[] = {
943 {
944 .name = "bootloader(spi)",
945 .size = 0x00040000,
946 .offset = 0,
947 .mask_flags = MTD_CAP_ROM
948 }, {
949 .name = "linux kernel(spi)",
950 .size = MTDPART_SIZ_FULL,
951 .offset = MTDPART_OFS_APPEND,
952 }
953 };
954
955 static struct flash_platform_data bfin_spi_flash_data = {
956 .name = "m25p80",
957 .parts = bfin_spi_flash_partitions,
958 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
959 .type = "m25p16",
960 };
961
962 static struct bfin5xx_spi_chip spi_flash_chip_info = {
963 .enable_dma = 0, /* use dma transfer with this chip*/
964 .bits_per_word = 8,
965 };
966 #endif
967
968 #if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
969 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
970 .enable_dma = 0,
971 .bits_per_word = 16,
972 };
973 #endif
974
975 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
976 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
977 .enable_dma = 0,
978 .bits_per_word = 16,
979 };
980
981 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
982 .model = 7877,
983 .vref_delay_usecs = 50, /* internal, no capacitor */
984 .x_plate_ohms = 419,
985 .y_plate_ohms = 486,
986 .pressure_max = 1000,
987 .pressure_min = 0,
988 .stopacq_polarity = 1,
989 .first_conversion_delay = 3,
990 .acquisition_time = 1,
991 .averaging = 1,
992 .pen_down_acc_interval = 1,
993 };
994 #endif
995
996 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
997 static struct bfin5xx_spi_chip spidev_chip_info = {
998 .enable_dma = 0,
999 .bits_per_word = 8,
1000 };
1001 #endif
1002
1003 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1004 static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
1005 .enable_dma = 0, /* use dma transfer with this chip*/
1006 .bits_per_word = 8,
1007 };
1008 #endif
1009
1010 static struct spi_board_info bfin_spi_board_info[] __initdata = {
1011 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
1012 {
1013 /* the modalias must be the same as spi device driver name */
1014 .modalias = "m25p80", /* Name of spi_driver for this device */
1015 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
1016 .bus_num = 0, /* Framework bus number */
1017 .chip_select = 1, /* SPI_SSEL1*/
1018 .platform_data = &bfin_spi_flash_data,
1019 .controller_data = &spi_flash_chip_info,
1020 .mode = SPI_MODE_3,
1021 },
1022 #endif
1023 #if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
1024 {
1025 .modalias = "ad1836",
1026 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1027 .bus_num = 1,
1028 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
1029 .controller_data = &ad1836_spi_chip_info,
1030 },
1031 #endif
1032 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1033 {
1034 .modalias = "ad7877",
1035 .platform_data = &bfin_ad7877_ts_info,
1036 .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
1037 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1038 .bus_num = 0,
1039 .chip_select = 2,
1040 .controller_data = &spi_ad7877_chip_info,
1041 },
1042 #endif
1043 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1044 {
1045 .modalias = "spidev",
1046 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1047 .bus_num = 0,
1048 .chip_select = 1,
1049 .controller_data = &spidev_chip_info,
1050 },
1051 #endif
1052 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1053 {
1054 .modalias = "adxl34x",
1055 .platform_data = &adxl34x_info,
1056 .irq = IRQ_PC5,
1057 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1058 .bus_num = 1,
1059 .chip_select = 2,
1060 .controller_data = &spi_adxl34x_chip_info,
1061 .mode = SPI_MODE_3,
1062 },
1063 #endif
1064 };
1065 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1066 /* SPI (0) */
1067 static struct resource bfin_spi0_resource[] = {
1068 [0] = {
1069 .start = SPI0_REGBASE,
1070 .end = SPI0_REGBASE + 0xFF,
1071 .flags = IORESOURCE_MEM,
1072 },
1073 [1] = {
1074 .start = CH_SPI0,
1075 .end = CH_SPI0,
1076 .flags = IORESOURCE_DMA,
1077 },
1078 [2] = {
1079 .start = IRQ_SPI0,
1080 .end = IRQ_SPI0,
1081 .flags = IORESOURCE_IRQ,
1082 }
1083 };
1084
1085 /* SPI (1) */
1086 static struct resource bfin_spi1_resource[] = {
1087 [0] = {
1088 .start = SPI1_REGBASE,
1089 .end = SPI1_REGBASE + 0xFF,
1090 .flags = IORESOURCE_MEM,
1091 },
1092 [1] = {
1093 .start = CH_SPI1,
1094 .end = CH_SPI1,
1095 .flags = IORESOURCE_DMA,
1096 },
1097 [2] = {
1098 .start = IRQ_SPI1,
1099 .end = IRQ_SPI1,
1100 .flags = IORESOURCE_IRQ,
1101 }
1102 };
1103
1104 /* SPI controller data */
1105 static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
1106 .num_chipselect = 3,
1107 .enable_dma = 1, /* master has the ability to do dma transfer */
1108 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1109 };
1110
1111 static struct platform_device bf54x_spi_master0 = {
1112 .name = "bfin-spi",
1113 .id = 0, /* Bus number */
1114 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1115 .resource = bfin_spi0_resource,
1116 .dev = {
1117 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
1118 },
1119 };
1120
1121 static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
1122 .num_chipselect = 3,
1123 .enable_dma = 1, /* master has the ability to do dma transfer */
1124 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1125 };
1126
1127 static struct platform_device bf54x_spi_master1 = {
1128 .name = "bfin-spi",
1129 .id = 1, /* Bus number */
1130 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1131 .resource = bfin_spi1_resource,
1132 .dev = {
1133 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
1134 },
1135 };
1136 #endif /* spi master and devices */
1137
1138 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1139 static struct resource bfin_twi0_resource[] = {
1140 [0] = {
1141 .start = TWI0_REGBASE,
1142 .end = TWI0_REGBASE + 0xFF,
1143 .flags = IORESOURCE_MEM,
1144 },
1145 [1] = {
1146 .start = IRQ_TWI0,
1147 .end = IRQ_TWI0,
1148 .flags = IORESOURCE_IRQ,
1149 },
1150 };
1151
1152 static struct platform_device i2c_bfin_twi0_device = {
1153 .name = "i2c-bfin-twi",
1154 .id = 0,
1155 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1156 .resource = bfin_twi0_resource,
1157 };
1158
1159 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1160 static struct resource bfin_twi1_resource[] = {
1161 [0] = {
1162 .start = TWI1_REGBASE,
1163 .end = TWI1_REGBASE + 0xFF,
1164 .flags = IORESOURCE_MEM,
1165 },
1166 [1] = {
1167 .start = IRQ_TWI1,
1168 .end = IRQ_TWI1,
1169 .flags = IORESOURCE_IRQ,
1170 },
1171 };
1172
1173 static struct platform_device i2c_bfin_twi1_device = {
1174 .name = "i2c-bfin-twi",
1175 .id = 1,
1176 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1177 .resource = bfin_twi1_resource,
1178 };
1179 #endif
1180 #endif
1181
1182 static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1183 };
1184
1185 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1186 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
1187 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
1188 {
1189 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
1190 },
1191 #endif
1192 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
1193 {
1194 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
1195 .irq = 212,
1196 },
1197 #endif
1198 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1199 {
1200 I2C_BOARD_INFO("adxl34x", 0x53),
1201 .irq = IRQ_PC5,
1202 .platform_data = (void *)&adxl34x_info,
1203 },
1204 #endif
1205 };
1206 #endif
1207
1208 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1209 #include <linux/gpio_keys.h>
1210
1211 static struct gpio_keys_button bfin_gpio_keys_table[] = {
1212 {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
1213 {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
1214 {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
1215 {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
1216 };
1217
1218 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1219 .buttons = bfin_gpio_keys_table,
1220 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1221 };
1222
1223 static struct platform_device bfin_device_gpiokeys = {
1224 .name = "gpio-keys",
1225 .dev = {
1226 .platform_data = &bfin_gpio_keys_data,
1227 },
1228 };
1229 #endif
1230
1231 static const unsigned int cclk_vlev_datasheet[] =
1232 {
1233 /*
1234 * Internal VLEV BF54XSBBC1533
1235 ****temporarily using these values until data sheet is updated
1236 */
1237 VRPAIR(VLEV_085, 150000000),
1238 VRPAIR(VLEV_090, 250000000),
1239 VRPAIR(VLEV_110, 276000000),
1240 VRPAIR(VLEV_115, 301000000),
1241 VRPAIR(VLEV_120, 525000000),
1242 VRPAIR(VLEV_125, 550000000),
1243 VRPAIR(VLEV_130, 600000000),
1244 };
1245
1246 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1247 .tuple_tab = cclk_vlev_datasheet,
1248 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1249 .vr_settling_time = 25 /* us */,
1250 };
1251
1252 static struct platform_device bfin_dpmc = {
1253 .name = "bfin dpmc",
1254 .dev = {
1255 .platform_data = &bfin_dmpc_vreg_data,
1256 },
1257 };
1258
1259 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1260 static struct platform_device bfin_i2s = {
1261 .name = "bfin-i2s",
1262 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1263 /* TODO: add platform data here */
1264 };
1265 #endif
1266
1267 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1268 static struct platform_device bfin_tdm = {
1269 .name = "bfin-tdm",
1270 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1271 /* TODO: add platform data here */
1272 };
1273 #endif
1274
1275 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1276 static struct platform_device bfin_ac97 = {
1277 .name = "bfin-ac97",
1278 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1279 /* TODO: add platform data here */
1280 };
1281 #endif
1282
1283 static struct platform_device *ezkit_devices[] __initdata = {
1284
1285 &bfin_dpmc,
1286
1287 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1288 &rtc_device,
1289 #endif
1290
1291 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1292 #ifdef CONFIG_SERIAL_BFIN_UART0
1293 &bfin_uart0_device,
1294 #endif
1295 #ifdef CONFIG_SERIAL_BFIN_UART1
1296 &bfin_uart1_device,
1297 #endif
1298 #ifdef CONFIG_SERIAL_BFIN_UART2
1299 &bfin_uart2_device,
1300 #endif
1301 #ifdef CONFIG_SERIAL_BFIN_UART3
1302 &bfin_uart3_device,
1303 #endif
1304 #endif
1305
1306 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1307 #ifdef CONFIG_BFIN_SIR0
1308 &bfin_sir0_device,
1309 #endif
1310 #ifdef CONFIG_BFIN_SIR1
1311 &bfin_sir1_device,
1312 #endif
1313 #ifdef CONFIG_BFIN_SIR2
1314 &bfin_sir2_device,
1315 #endif
1316 #ifdef CONFIG_BFIN_SIR3
1317 &bfin_sir3_device,
1318 #endif
1319 #endif
1320
1321 #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
1322 &bf54x_lq043_device,
1323 #endif
1324
1325 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
1326 &smsc911x_device,
1327 #endif
1328
1329 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1330 &musb_device,
1331 #endif
1332
1333 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1334 &bfin_isp1760_device,
1335 #endif
1336
1337 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1338 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1339 &bfin_sport0_uart_device,
1340 #endif
1341 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1342 &bfin_sport1_uart_device,
1343 #endif
1344 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1345 &bfin_sport2_uart_device,
1346 #endif
1347 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1348 &bfin_sport3_uart_device,
1349 #endif
1350 #endif
1351
1352 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1353 &bfin_can_device,
1354 #endif
1355
1356 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
1357 &bfin_atapi_device,
1358 #endif
1359
1360 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1361 &bf5xx_nand_device,
1362 #endif
1363
1364 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1365 &bf54x_sdh_device,
1366 #endif
1367
1368 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1369 &bf54x_spi_master0,
1370 &bf54x_spi_master1,
1371 #endif
1372
1373 #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
1374 &bf54x_kpad_device,
1375 #endif
1376
1377 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1378 &bfin_rotary_device,
1379 #endif
1380
1381 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1382 &i2c_bfin_twi0_device,
1383 #if !defined(CONFIG_BF542)
1384 &i2c_bfin_twi1_device,
1385 #endif
1386 #endif
1387
1388 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1389 &bfin_device_gpiokeys,
1390 #endif
1391
1392 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1393 &ezkit_flash_device,
1394 #endif
1395
1396 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1397 &bfin_i2s,
1398 #endif
1399
1400 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1401 &bfin_tdm,
1402 #endif
1403
1404 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1405 &bfin_ac97,
1406 #endif
1407 };
1408
1409 static int __init ezkit_init(void)
1410 {
1411 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1412
1413 i2c_register_board_info(0, bfin_i2c_board_info0,
1414 ARRAY_SIZE(bfin_i2c_board_info0));
1415 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1416 i2c_register_board_info(1, bfin_i2c_board_info1,
1417 ARRAY_SIZE(bfin_i2c_board_info1));
1418 #endif
1419
1420 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
1421
1422 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1423
1424 return 0;
1425 }
1426
1427 arch_initcall(ezkit_init);
1428
1429 static struct platform_device *ezkit_early_devices[] __initdata = {
1430 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1431 #ifdef CONFIG_SERIAL_BFIN_UART0
1432 &bfin_uart0_device,
1433 #endif
1434 #ifdef CONFIG_SERIAL_BFIN_UART1
1435 &bfin_uart1_device,
1436 #endif
1437 #ifdef CONFIG_SERIAL_BFIN_UART2
1438 &bfin_uart2_device,
1439 #endif
1440 #ifdef CONFIG_SERIAL_BFIN_UART3
1441 &bfin_uart3_device,
1442 #endif
1443 #endif
1444
1445 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1446 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1447 &bfin_sport0_uart_device,
1448 #endif
1449 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1450 &bfin_sport1_uart_device,
1451 #endif
1452 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1453 &bfin_sport2_uart_device,
1454 #endif
1455 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1456 &bfin_sport3_uart_device,
1457 #endif
1458 #endif
1459 };
1460
1461 void __init native_machine_early_platform_add_devices(void)
1462 {
1463 printk(KERN_INFO "register early platform devices\n");
1464 early_platform_add_devices(ezkit_early_devices,
1465 ARRAY_SIZE(ezkit_early_devices));
1466 }
Tomato firmware and modifications.