release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf537/boards/cm_bf537e.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *           2008-2009 Bluetechnix
   4  *                2005 National ICT Australia (NICTA)
   5  *                      Aidan Williams <aidan@nicta.com.au>
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/etherdevice.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/mtd/mtd.h>
  14 #include <linux/mtd/partitions.h>
  15 #include <linux/mtd/physmap.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/spi/flash.h>
  18 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  19 #include <linux/usb/isp1362.h>
  20 #endif
  21 #include <linux/ata_platform.h>
  22 #include <linux/irq.h>
  23 #include <asm/dma.h>
  24 #include <asm/bfin5xx_spi.h>
  25 #include <asm/portmux.h>
  26 #include <asm/dpmc.h>
  27
  28 /*
  29  * Name the Board for the /proc/cpuinfo
  30  */
  31 const char bfin_board_name[] = "Bluetechnix CM BF537E";
  32
  33 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  34 /* all SPI peripherals info goes here */
  35
  36 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  37 static struct mtd_partition bfin_spi_flash_partitions[] = {
  38         {
  39                 .name = "bootloader(spi)",
  40                 .size = 0x00020000,
  41                 .offset = 0,
  42                 .mask_flags = MTD_CAP_ROM
  43         }, {
  44                 .name = "linux kernel(spi)",
  45                 .size = 0xe0000,
  46                 .offset = 0x20000
  47         }, {
  48                 .name = "file system(spi)",
  49                 .size = 0x700000,
  50                 .offset = 0x00100000,
  51         }
  52 };
  53
  54 static struct flash_platform_data bfin_spi_flash_data = {
  55         .name = "m25p80",
  56         .parts = bfin_spi_flash_partitions,
  57         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  58         .type = "m25p64",
  59 };
  60
  61 /* SPI flash chip (m25p64) */
  62 static struct bfin5xx_spi_chip spi_flash_chip_info = {
  63         .enable_dma = 0,         /* use dma transfer with this chip*/
  64         .bits_per_word = 8,
  65 };
  66 #endif
  67
  68 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  69 /* SPI ADC chip */
  70 static struct bfin5xx_spi_chip spi_adc_chip_info = {
  71         .enable_dma = 1,         /* use dma transfer with this chip*/
  72         .bits_per_word = 16,
  73 };
  74 #endif
  75
  76 #if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  77 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  78         .enable_dma = 0,
  79         .bits_per_word = 16,
  80 };
  81 #endif
  82
  83 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  84 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
  85         .enable_dma = 0,
  86         .bits_per_word = 8,
  87 };
  88 #endif
  89
  90 static struct spi_board_info bfin_spi_board_info[] __initdata = {
  91 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  92         {
  93                 /* the modalias must be the same as spi device driver name */
  94                 .modalias = "m25p80", /* Name of spi_driver for this device */
  95                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
  96                 .bus_num = 0, /* Framework bus number */
  97                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  98                 .platform_data = &bfin_spi_flash_data,
  99                 .controller_data = &spi_flash_chip_info,
 100                 .mode = SPI_MODE_3,
 101         },
 102 #endif
 103
 104 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 105         {
 106                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 107                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 108                 .bus_num = 0, /* Framework bus number */
 109                 .chip_select = 1, /* Framework chip select. */
 110                 .platform_data = NULL, /* No spi_driver specific config */
 111                 .controller_data = &spi_adc_chip_info,
 112         },
 113 #endif
 114
 115 #if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
 116         {
 117                 .modalias = "ad1836",
 118                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 119                 .bus_num = 0,
 120                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
 121                 .controller_data = &ad1836_spi_chip_info,
 122         },
 123 #endif
 124
 125 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 126         {
 127                 .modalias = "mmc_spi",
 128                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 129                 .bus_num = 0,
 130                 .chip_select = 1,
 131                 .controller_data = &mmc_spi_chip_info,
 132                 .mode = SPI_MODE_3,
 133         },
 134 #endif
 135 };
 136
 137 /* SPI (0) */
 138 static struct resource bfin_spi0_resource[] = {
 139         [0] = {
 140                 .start = SPI0_REGBASE,
 141                 .end   = SPI0_REGBASE + 0xFF,
 142                 .flags = IORESOURCE_MEM,
 143                 },
 144         [1] = {
 145                 .start = CH_SPI,
 146                 .end   = CH_SPI,
 147                 .flags = IORESOURCE_DMA,
 148         },
 149         [2] = {
 150                 .start = IRQ_SPI,
 151                 .end   = IRQ_SPI,
 152                 .flags = IORESOURCE_IRQ,
 153         },
 154 };
 155
 156 /* SPI controller data */
 157 static struct bfin5xx_spi_master bfin_spi0_info = {
 158         .num_chipselect = 8,
 159         .enable_dma = 1,  /* master has the ability to do dma transfer */
 160         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 161 };
 162
 163 static struct platform_device bfin_spi0_device = {
 164         .name = "bfin-spi",
 165         .id = 0, /* Bus number */
 166         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 167         .resource = bfin_spi0_resource,
 168         .dev = {
 169                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 170         },
 171 };
 172 #endif  /* spi master and devices */
 173
 174 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 175 static struct platform_device rtc_device = {
 176         .name = "rtc-bfin",
 177         .id   = -1,
 178 };
 179 #endif
 180
 181 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
 182 static struct platform_device hitachi_fb_device = {
 183         .name = "hitachi-tx09",
 184 };
 185 #endif
 186
 187 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 188 #include <linux/smc91x.h>
 189
 190 static struct smc91x_platdata smc91x_info = {
 191         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 192         .leda = RPC_LED_100_10,
 193         .ledb = RPC_LED_TX_RX,
 194 };
 195
 196 static struct resource smc91x_resources[] = {
 197         {
 198                 .start = 0x20200300,
 199                 .end = 0x20200300 + 16,
 200                 .flags = IORESOURCE_MEM,
 201         }, {
 202                 .start = IRQ_PF14,
 203                 .end = IRQ_PF14,
 204                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 205                 },
 206 };
 207
 208 static struct platform_device smc91x_device = {
 209         .name = "smc91x",
 210         .id = 0,
 211         .num_resources = ARRAY_SIZE(smc91x_resources),
 212         .resource = smc91x_resources,
 213         .dev    = {
 214                 .platform_data  = &smc91x_info,
 215         },
 216 };
 217 #endif
 218
 219 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 220 static struct resource isp1362_hcd_resources[] = {
 221         {
 222                 .start = 0x20308000,
 223                 .end = 0x20308000,
 224                 .flags = IORESOURCE_MEM,
 225         }, {
 226                 .start = 0x20308004,
 227                 .end = 0x20308004,
 228                 .flags = IORESOURCE_MEM,
 229         }, {
 230                 .start = IRQ_PG15,
 231                 .end = IRQ_PG15,
 232                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 233         },
 234 };
 235
 236 static struct isp1362_platform_data isp1362_priv = {
 237         .sel15Kres = 1,
 238         .clknotstop = 0,
 239         .oc_enable = 0,
 240         .int_act_high = 0,
 241         .int_edge_triggered = 0,
 242         .remote_wakeup_connected = 0,
 243         .no_power_switching = 1,
 244         .power_switching_mode = 0,
 245 };
 246
 247 static struct platform_device isp1362_hcd_device = {
 248         .name = "isp1362-hcd",
 249         .id = 0,
 250         .dev = {
 251                 .platform_data = &isp1362_priv,
 252         },
 253         .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
 254         .resource = isp1362_hcd_resources,
 255 };
 256 #endif
 257
 258 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 259 static struct resource net2272_bfin_resources[] = {
 260         {
 261                 .start = 0x20300000,
 262                 .end = 0x20300000 + 0x100,
 263                 .flags = IORESOURCE_MEM,
 264         }, {
 265                 .start = IRQ_PG13,
 266                 .end = IRQ_PG13,
 267                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 268         },
 269 };
 270
 271 static struct platform_device net2272_bfin_device = {
 272         .name = "net2272",
 273         .id = -1,
 274         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 275         .resource = net2272_bfin_resources,
 276 };
 277 #endif
 278
 279 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 280 static struct mtd_partition cm_partitions[] = {
 281         {
 282                 .name   = "bootloader(nor)",
 283                 .size   = 0x40000,
 284                 .offset = 0,
 285         }, {
 286                 .name   = "linux kernel(nor)",
 287                 .size   = 0x100000,
 288                 .offset = MTDPART_OFS_APPEND,
 289         }, {
 290                 .name   = "file system(nor)",
 291                 .size   = MTDPART_SIZ_FULL,
 292                 .offset = MTDPART_OFS_APPEND,
 293         }
 294 };
 295
 296 static struct physmap_flash_data cm_flash_data = {
 297         .width    = 2,
 298         .parts    = cm_partitions,
 299         .nr_parts = ARRAY_SIZE(cm_partitions),
 300 };
 301
 302 static unsigned cm_flash_gpios[] = { GPIO_PF4 };
 303
 304 static struct resource cm_flash_resource[] = {
 305         {
 306                 .name  = "cfi_probe",
 307                 .start = 0x20000000,
 308                 .end   = 0x201fffff,
 309                 .flags = IORESOURCE_MEM,
 310         }, {
 311                 .start = (unsigned long)cm_flash_gpios,
 312                 .end   = ARRAY_SIZE(cm_flash_gpios),
 313                 .flags = IORESOURCE_IRQ,
 314         }
 315 };
 316
 317 static struct platform_device cm_flash_device = {
 318         .name          = "gpio-addr-flash",
 319         .id            = 0,
 320         .dev = {
 321                 .platform_data = &cm_flash_data,
 322         },
 323         .num_resources = ARRAY_SIZE(cm_flash_resource),
 324         .resource      = cm_flash_resource,
 325 };
 326 #endif
 327
 328 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 329 #ifdef CONFIG_SERIAL_BFIN_UART0
 330 static struct resource bfin_uart0_resources[] = {
 331         {
 332                 .start = UART0_THR,
 333                 .end = UART0_GCTL+2,
 334                 .flags = IORESOURCE_MEM,
 335         },
 336         {
 337                 .start = IRQ_UART0_RX,
 338                 .end = IRQ_UART0_RX+1,
 339                 .flags = IORESOURCE_IRQ,
 340         },
 341         {
 342                 .start = IRQ_UART0_ERROR,
 343                 .end = IRQ_UART0_ERROR,
 344                 .flags = IORESOURCE_IRQ,
 345         },
 346         {
 347                 .start = CH_UART0_TX,
 348                 .end = CH_UART0_TX,
 349                 .flags = IORESOURCE_DMA,
 350         },
 351         {
 352                 .start = CH_UART0_RX,
 353                 .end = CH_UART0_RX,
 354                 .flags = IORESOURCE_DMA,
 355         },
 356 #ifdef CONFIG_BFIN_UART0_CTSRTS
 357         {
 358                 .start = -1,
 359                 .end = -1,
 360                 .flags = IORESOURCE_IO,
 361         },
 362         {
 363                 .start = -1,
 364                 .end = -1,
 365                 .flags = IORESOURCE_IO,
 366         },
 367 #endif
 368 };
 369
 370 unsigned short bfin_uart0_peripherals[] = {
 371         P_UART0_TX, P_UART0_RX, 0
 372 };
 373
 374 static struct platform_device bfin_uart0_device = {
 375         .name = "bfin-uart",
 376         .id = 0,
 377         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 378         .resource = bfin_uart0_resources,
 379         .dev = {
 380                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 381         },
 382 };
 383 #endif
 384 #ifdef CONFIG_SERIAL_BFIN_UART1
 385 static struct resource bfin_uart1_resources[] = {
 386         {
 387                 .start = UART1_THR,
 388                 .end = UART1_GCTL+2,
 389                 .flags = IORESOURCE_MEM,
 390         },
 391         {
 392                 .start = IRQ_UART1_RX,
 393                 .end = IRQ_UART1_RX+1,
 394                 .flags = IORESOURCE_IRQ,
 395         },
 396         {
 397                 .start = IRQ_UART1_ERROR,
 398                 .end = IRQ_UART1_ERROR,
 399                 .flags = IORESOURCE_IRQ,
 400         },
 401         {
 402                 .start = CH_UART1_TX,
 403                 .end = CH_UART1_TX,
 404                 .flags = IORESOURCE_DMA,
 405         },
 406         {
 407                 .start = CH_UART1_RX,
 408                 .end = CH_UART1_RX,
 409                 .flags = IORESOURCE_DMA,
 410         },
 411 #ifdef CONFIG_BFIN_UART1_CTSRTS
 412         {
 413                 .start = -1,
 414                 .end = -1,
 415                 .flags = IORESOURCE_IO,
 416         },
 417         {
 418                 .start = -1,
 419                 .end = -1,
 420                 .flags = IORESOURCE_IO,
 421         },
 422 #endif
 423 };
 424
 425 unsigned short bfin_uart1_peripherals[] = {
 426         P_UART1_TX, P_UART1_RX, 0
 427 };
 428
 429 static struct platform_device bfin_uart1_device = {
 430         .name = "bfin-uart",
 431         .id = 1,
 432         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 433         .resource = bfin_uart1_resources,
 434         .dev = {
 435                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 436         },
 437 };
 438 #endif
 439 #endif
 440
 441 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 442 #ifdef CONFIG_BFIN_SIR0
 443 static struct resource bfin_sir0_resources[] = {
 444         {
 445                 .start = 0xFFC00400,
 446                 .end = 0xFFC004FF,
 447                 .flags = IORESOURCE_MEM,
 448         },
 449         {
 450                 .start = IRQ_UART0_RX,
 451                 .end = IRQ_UART0_RX+1,
 452                 .flags = IORESOURCE_IRQ,
 453         },
 454         {
 455                 .start = CH_UART0_RX,
 456                 .end = CH_UART0_RX+1,
 457                 .flags = IORESOURCE_DMA,
 458         },
 459 };
 460 static struct platform_device bfin_sir0_device = {
 461         .name = "bfin_sir",
 462         .id = 0,
 463         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 464         .resource = bfin_sir0_resources,
 465 };
 466 #endif
 467 #ifdef CONFIG_BFIN_SIR1
 468 static struct resource bfin_sir1_resources[] = {
 469         {
 470                 .start = 0xFFC02000,
 471                 .end = 0xFFC020FF,
 472                 .flags = IORESOURCE_MEM,
 473         },
 474         {
 475                 .start = IRQ_UART1_RX,
 476                 .end = IRQ_UART1_RX+1,
 477                 .flags = IORESOURCE_IRQ,
 478         },
 479         {
 480                 .start = CH_UART1_RX,
 481                 .end = CH_UART1_RX+1,
 482                 .flags = IORESOURCE_DMA,
 483         },
 484 };
 485 static struct platform_device bfin_sir1_device = {
 486         .name = "bfin_sir",
 487         .id = 1,
 488         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 489         .resource = bfin_sir1_resources,
 490 };
 491 #endif
 492 #endif
 493
 494 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 495 static struct resource bfin_twi0_resource[] = {
 496         [0] = {
 497                 .start = TWI0_REGBASE,
 498                 .end   = TWI0_REGBASE,
 499                 .flags = IORESOURCE_MEM,
 500         },
 501         [1] = {
 502                 .start = IRQ_TWI,
 503                 .end   = IRQ_TWI,
 504                 .flags = IORESOURCE_IRQ,
 505         },
 506 };
 507
 508 static struct platform_device i2c_bfin_twi_device = {
 509         .name = "i2c-bfin-twi",
 510         .id = 0,
 511         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 512         .resource = bfin_twi0_resource,
 513 };
 514 #endif
 515
 516 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 517 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 518 static struct resource bfin_sport0_uart_resources[] = {
 519         {
 520                 .start = SPORT0_TCR1,
 521                 .end = SPORT0_MRCS3+4,
 522                 .flags = IORESOURCE_MEM,
 523         },
 524         {
 525                 .start = IRQ_SPORT0_RX,
 526                 .end = IRQ_SPORT0_RX+1,
 527                 .flags = IORESOURCE_IRQ,
 528         },
 529         {
 530                 .start = IRQ_SPORT0_ERROR,
 531                 .end = IRQ_SPORT0_ERROR,
 532                 .flags = IORESOURCE_IRQ,
 533         },
 534 };
 535
 536 unsigned short bfin_sport0_peripherals[] = {
 537         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 538         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 539 };
 540
 541 static struct platform_device bfin_sport0_uart_device = {
 542         .name = "bfin-sport-uart",
 543         .id = 0,
 544         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 545         .resource = bfin_sport0_uart_resources,
 546         .dev = {
 547                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 548         },
 549 };
 550 #endif
 551 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 552 static struct resource bfin_sport1_uart_resources[] = {
 553         {
 554                 .start = SPORT1_TCR1,
 555                 .end = SPORT1_MRCS3+4,
 556                 .flags = IORESOURCE_MEM,
 557         },
 558         {
 559                 .start = IRQ_SPORT1_RX,
 560                 .end = IRQ_SPORT1_RX+1,
 561                 .flags = IORESOURCE_IRQ,
 562         },
 563         {
 564                 .start = IRQ_SPORT1_ERROR,
 565                 .end = IRQ_SPORT1_ERROR,
 566                 .flags = IORESOURCE_IRQ,
 567         },
 568 };
 569
 570 unsigned short bfin_sport1_peripherals[] = {
 571         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 572         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 573 };
 574
 575 static struct platform_device bfin_sport1_uart_device = {
 576         .name = "bfin-sport-uart",
 577         .id = 1,
 578         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 579         .resource = bfin_sport1_uart_resources,
 580         .dev = {
 581                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 582         },
 583 };
 584 #endif
 585 #endif
 586
 587 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 588 static struct platform_device bfin_mii_bus = {
 589         .name = "bfin_mii_bus",
 590 };
 591
 592 static struct platform_device bfin_mac_device = {
 593         .name = "bfin_mac",
 594         .dev.platform_data = &bfin_mii_bus,
 595 };
 596 #endif
 597
 598 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 599 #define PATA_INT        IRQ_PF14
 600
 601 static struct pata_platform_info bfin_pata_platform_data = {
 602         .ioport_shift = 2,
 603         .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
 604 };
 605
 606 static struct resource bfin_pata_resources[] = {
 607         {
 608                 .start = 0x2030C000,
 609                 .end = 0x2030C01F,
 610                 .flags = IORESOURCE_MEM,
 611         },
 612         {
 613                 .start = 0x2030D018,
 614                 .end = 0x2030D01B,
 615                 .flags = IORESOURCE_MEM,
 616         },
 617         {
 618                 .start = PATA_INT,
 619                 .end = PATA_INT,
 620                 .flags = IORESOURCE_IRQ,
 621         },
 622 };
 623
 624 static struct platform_device bfin_pata_device = {
 625         .name = "pata_platform",
 626         .id = -1,
 627         .num_resources = ARRAY_SIZE(bfin_pata_resources),
 628         .resource = bfin_pata_resources,
 629         .dev = {
 630                 .platform_data = &bfin_pata_platform_data,
 631         }
 632 };
 633 #endif
 634
 635 static const unsigned int cclk_vlev_datasheet[] =
 636 {
 637         VRPAIR(VLEV_085, 250000000),
 638         VRPAIR(VLEV_090, 376000000),
 639         VRPAIR(VLEV_095, 426000000),
 640         VRPAIR(VLEV_100, 426000000),
 641         VRPAIR(VLEV_105, 476000000),
 642         VRPAIR(VLEV_110, 476000000),
 643         VRPAIR(VLEV_115, 476000000),
 644         VRPAIR(VLEV_120, 500000000),
 645         VRPAIR(VLEV_125, 533000000),
 646         VRPAIR(VLEV_130, 600000000),
 647 };
 648
 649 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 650         .tuple_tab = cclk_vlev_datasheet,
 651         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 652         .vr_settling_time = 25 /* us */,
 653 };
 654
 655 static struct platform_device bfin_dpmc = {
 656         .name = "bfin dpmc",
 657         .dev = {
 658                 .platform_data = &bfin_dmpc_vreg_data,
 659         },
 660 };
 661
 662 static struct platform_device *cm_bf537e_devices[] __initdata = {
 663
 664         &bfin_dpmc,
 665
 666 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
 667         &hitachi_fb_device,
 668 #endif
 669
 670 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 671         &rtc_device,
 672 #endif
 673
 674 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 675 #ifdef CONFIG_SERIAL_BFIN_UART0
 676         &bfin_uart0_device,
 677 #endif
 678 #ifdef CONFIG_SERIAL_BFIN_UART1
 679         &bfin_uart1_device,
 680 #endif
 681 #endif
 682
 683 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 684 #ifdef CONFIG_BFIN_SIR0
 685         &bfin_sir0_device,
 686 #endif
 687 #ifdef CONFIG_BFIN_SIR1
 688         &bfin_sir1_device,
 689 #endif
 690 #endif
 691
 692 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 693         &i2c_bfin_twi_device,
 694 #endif
 695
 696 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 697 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 698         &bfin_sport0_uart_device,
 699 #endif
 700 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 701         &bfin_sport1_uart_device,
 702 #endif
 703 #endif
 704
 705 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 706         &isp1362_hcd_device,
 707 #endif
 708
 709 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 710         &smc91x_device,
 711 #endif
 712
 713 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 714         &bfin_mii_bus,
 715         &bfin_mac_device,
 716 #endif
 717
 718 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 719         &net2272_bfin_device,
 720 #endif
 721
 722 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 723         &bfin_spi0_device,
 724 #endif
 725
 726 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 727         &bfin_pata_device,
 728 #endif
 729
 730 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 731         &cm_flash_device,
 732 #endif
 733 };
 734
 735 static int __init cm_bf537e_init(void)
 736 {
 737         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 738         platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
 739 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 740         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 741 #endif
 742
 743 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 744         irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
 745 #endif
 746         return 0;
 747 }
 748
 749 arch_initcall(cm_bf537e_init);
 750
 751 static struct platform_device *cm_bf537e_early_devices[] __initdata = {
 752 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 753 #ifdef CONFIG_SERIAL_BFIN_UART0
 754         &bfin_uart0_device,
 755 #endif
 756 #ifdef CONFIG_SERIAL_BFIN_UART1
 757         &bfin_uart1_device,
 758 #endif
 759 #endif
 760
 761 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 762 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 763         &bfin_sport0_uart_device,
 764 #endif
 765 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 766         &bfin_sport1_uart_device,
 767 #endif
 768 #endif
 769 };
 770
 771 void __init native_machine_early_platform_add_devices(void)
 772 {
 773         printk(KERN_INFO "register early platform devices\n");
 774         early_platform_add_devices(cm_bf537e_early_devices,
 775                 ARRAY_SIZE(cm_bf537e_early_devices));
 776 }
 777
 778 void bfin_get_ether_addr(char *addr)
 779 {
 780         random_ether_addr(addr);
 781         printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
 782 }
 783 EXPORT_SYMBOL(bfin_get_ether_addr);