release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/nand.h>
  25 #include <asm/portmux.h>
  26 #include <asm/dpmc.h>
  27 #include <linux/spi/ad7877.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF526-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  39 static struct resource musb_resources[] = {
  40         [0] = {
  41                 .start  = 0xffc03800,
  42                 .end    = 0xffc03cff,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = { /* general IRQ */
  46                 .start  = IRQ_USB_INT0,
  47                 .end    = IRQ_USB_INT0,
  48                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  49         },
  50         [2] = { /* DMA IRQ */
  51                 .start  = IRQ_USB_DMA,
  52                 .end    = IRQ_USB_DMA,
  53                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  54         },
  55 };
  56
  57 static struct musb_hdrc_config musb_config = {
  58         .multipoint     = 0,
  59         .dyn_fifo       = 0,
  60         .soft_con       = 1,
  61         .dma            = 1,
  62         .num_eps        = 8,
  63         .dma_channels   = 8,
  64         .gpio_vrsel     = GPIO_PG13,
  65         /* Some custom boards need to be active low, just set it to "0"
  66          * if it is the case.
  67          */
  68         .gpio_vrsel_active      = 1,
  69 };
  70
  71 static struct musb_hdrc_platform_data musb_plat = {
  72 #if defined(CONFIG_USB_MUSB_OTG)
  73         .mode           = MUSB_OTG,
  74 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  75         .mode           = MUSB_HOST,
  76 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  77         .mode           = MUSB_PERIPHERAL,
  78 #endif
  79         .config         = &musb_config,
  80 };
  81
  82 static u64 musb_dmamask = ~(u32)0;
  83
  84 static struct platform_device musb_device = {
  85         .name           = "musb_hdrc",
  86         .id             = 0,
  87         .dev = {
  88                 .dma_mask               = &musb_dmamask,
  89                 .coherent_dma_mask      = 0xffffffff,
  90                 .platform_data          = &musb_plat,
  91         },
  92         .num_resources  = ARRAY_SIZE(musb_resources),
  93         .resource       = musb_resources,
  94 };
  95 #endif
  96
  97 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  98 static struct mtd_partition ezbrd_partitions[] = {
  99         {
 100                 .name       = "bootloader(nor)",
 101                 .size       = 0x40000,
 102                 .offset     = 0,
 103         }, {
 104                 .name       = "linux kernel(nor)",
 105                 .size       = 0x1C0000,
 106                 .offset     = MTDPART_OFS_APPEND,
 107         }, {
 108                 .name       = "file system(nor)",
 109                 .size       = MTDPART_SIZ_FULL,
 110                 .offset     = MTDPART_OFS_APPEND,
 111         }
 112 };
 113
 114 static struct physmap_flash_data ezbrd_flash_data = {
 115         .width      = 2,
 116         .parts      = ezbrd_partitions,
 117         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
 118 };
 119
 120 static struct resource ezbrd_flash_resource = {
 121         .start = 0x20000000,
 122         .end   = 0x203fffff,
 123         .flags = IORESOURCE_MEM,
 124 };
 125
 126 static struct platform_device ezbrd_flash_device = {
 127         .name          = "physmap-flash",
 128         .id            = 0,
 129         .dev = {
 130                 .platform_data = &ezbrd_flash_data,
 131         },
 132         .num_resources = 1,
 133         .resource      = &ezbrd_flash_resource,
 134 };
 135 #endif
 136
 137 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 138 static struct mtd_partition partition_info[] = {
 139         {
 140                 .name = "linux kernel(nand)",
 141                 .offset = 0,
 142                 .size = 4 * 1024 * 1024,
 143         },
 144         {
 145                 .name = "file system(nand)",
 146                 .offset = MTDPART_OFS_APPEND,
 147                 .size = MTDPART_SIZ_FULL,
 148         },
 149 };
 150
 151 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 152         .data_width = NFC_NWIDTH_8,
 153         .partitions = partition_info,
 154         .nr_partitions = ARRAY_SIZE(partition_info),
 155         .rd_dly = 3,
 156         .wr_dly = 3,
 157 };
 158
 159 static struct resource bf5xx_nand_resources[] = {
 160         {
 161                 .start = NFC_CTL,
 162                 .end = NFC_DATA_RD + 2,
 163                 .flags = IORESOURCE_MEM,
 164         },
 165         {
 166                 .start = CH_NFC,
 167                 .end = CH_NFC,
 168                 .flags = IORESOURCE_IRQ,
 169         },
 170 };
 171
 172 static struct platform_device bf5xx_nand_device = {
 173         .name = "bf5xx-nand",
 174         .id = 0,
 175         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 176         .resource = bf5xx_nand_resources,
 177         .dev = {
 178                 .platform_data = &bf5xx_nand_platform,
 179         },
 180 };
 181 #endif
 182
 183 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 184 static struct platform_device rtc_device = {
 185         .name = "rtc-bfin",
 186         .id   = -1,
 187 };
 188 #endif
 189
 190
 191 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 192 static struct platform_device bfin_mii_bus = {
 193         .name = "bfin_mii_bus",
 194 };
 195
 196 static struct platform_device bfin_mac_device = {
 197         .name = "bfin_mac",
 198         .dev.platform_data = &bfin_mii_bus,
 199 };
 200 #endif
 201
 202 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 203 static struct mtd_partition bfin_spi_flash_partitions[] = {
 204         {
 205                 .name = "bootloader(spi)",
 206                 .size = 0x00040000,
 207                 .offset = 0,
 208                 .mask_flags = MTD_CAP_ROM
 209         }, {
 210                 .name = "linux kernel(spi)",
 211                 .size = MTDPART_SIZ_FULL,
 212                 .offset = MTDPART_OFS_APPEND,
 213         }
 214 };
 215
 216 static struct flash_platform_data bfin_spi_flash_data = {
 217         .name = "m25p80",
 218         .parts = bfin_spi_flash_partitions,
 219         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 220         .type = "sst25wf040",
 221 };
 222
 223 /* SPI flash chip (sst25wf040) */
 224 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 225         .enable_dma = 0,         /* use dma transfer with this chip*/
 226         .bits_per_word = 8,
 227 };
 228 #endif
 229
 230 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 231 /* SPI ADC chip */
 232 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 233         .enable_dma = 1,         /* use dma transfer with this chip*/
 234         .bits_per_word = 16,
 235 };
 236 #endif
 237
 238 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 239 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 240         .enable_dma = 0,
 241         .bits_per_word = 8,
 242 };
 243 #endif
 244
 245 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 246 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 247         .enable_dma = 0,
 248         .bits_per_word = 16,
 249 };
 250
 251 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 252         .model                  = 7877,
 253         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 254         .x_plate_ohms           = 419,
 255         .y_plate_ohms           = 486,
 256         .pressure_max           = 1000,
 257         .pressure_min           = 0,
 258         .stopacq_polarity       = 1,
 259         .first_conversion_delay = 3,
 260         .acquisition_time       = 1,
 261         .averaging              = 1,
 262         .pen_down_acc_interval  = 1,
 263 };
 264 #endif
 265
 266 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 267 #include <linux/spi/ad7879.h>
 268 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 269         .model                  = 7879, /* Model = AD7879 */
 270         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 271         .pressure_max           = 10000,
 272         .pressure_min           = 0,
 273         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 274         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 275         .median                 = 2,    /* do 8 measurements */
 276         .averaging              = 1,    /* take the average of 4 middle samples */
 277         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 278         .gpio_export            = 1,    /* Export GPIO to gpiolib */
 279         .gpio_base              = -1,   /* Dynamic allocation */
 280 };
 281 #endif
 282
 283 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || \
 284         defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 285 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 286         .enable_dma = 0,
 287         .bits_per_word = 16,
 288 };
 289 #endif
 290
 291 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) && \
 292         defined(CONFIG_SND_SOC_WM8731_SPI)
 293 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 294         .enable_dma = 0,
 295         .bits_per_word = 16,
 296 };
 297 #endif
 298
 299 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 300 static struct bfin5xx_spi_chip spidev_chip_info = {
 301         .enable_dma = 0,
 302         .bits_per_word = 8,
 303 };
 304 #endif
 305
 306 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 307 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 308         .enable_dma = 0,
 309         .bits_per_word = 8,
 310 };
 311 #endif
 312
 313 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 314 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 315         {
 316                 /* the modalias must be the same as spi device driver name */
 317                 .modalias = "m25p80", /* Name of spi_driver for this device */
 318                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 319                 .bus_num = 0, /* Framework bus number */
 320                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 321                 .platform_data = &bfin_spi_flash_data,
 322                 .controller_data = &spi_flash_chip_info,
 323                 .mode = SPI_MODE_3,
 324         },
 325 #endif
 326
 327 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 328         {
 329                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 330                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 331                 .bus_num = 0, /* Framework bus number */
 332                 .chip_select = 1, /* Framework chip select. */
 333                 .platform_data = NULL, /* No spi_driver specific config */
 334                 .controller_data = &spi_adc_chip_info,
 335         },
 336 #endif
 337
 338 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 339         {
 340                 .modalias = "mmc_spi",
 341                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 342                 .bus_num = 0,
 343                 .chip_select = 5,
 344                 .controller_data = &mmc_spi_chip_info,
 345                 .mode = SPI_MODE_3,
 346         },
 347 #endif
 348 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 349         {
 350                 .modalias               = "ad7877",
 351                 .platform_data          = &bfin_ad7877_ts_info,
 352                 .irq                    = IRQ_PF8,
 353                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 354                 .bus_num        = 0,
 355                 .chip_select  = 2,
 356                 .controller_data = &spi_ad7877_chip_info,
 357         },
 358 #endif
 359 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || \
 360         defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 361         {
 362                 .modalias = "ad7879",
 363                 .platform_data = &bfin_ad7879_ts_info,
 364                 .irq = IRQ_PG0,
 365                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 366                 .bus_num = 0,
 367                 .chip_select = 5,
 368                 .controller_data = &spi_ad7879_chip_info,
 369                 .mode = SPI_CPHA | SPI_CPOL,
 370         },
 371 #endif
 372 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) && \
 373         defined(CONFIG_SND_SOC_WM8731_SPI)
 374         {
 375                 .modalias       = "wm8731",
 376                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 377                 .bus_num        = 0,
 378                 .chip_select    = 5,
 379                 .controller_data = &spi_wm8731_chip_info,
 380                 .mode = SPI_MODE_0,
 381         },
 382 #endif
 383 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 384         {
 385                 .modalias = "spidev",
 386                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 387                 .bus_num = 0,
 388                 .chip_select = 1,
 389                 .controller_data = &spidev_chip_info,
 390         },
 391 #endif
 392 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 393         {
 394                 .modalias = "bfin-lq035q1-spi",
 395                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 396                 .bus_num = 0,
 397                 .chip_select = 1,
 398                 .controller_data = &lq035q1_spi_chip_info,
 399                 .mode = SPI_CPHA | SPI_CPOL,
 400         },
 401 #endif
 402 };
 403
 404 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 405 /* SPI controller data */
 406 static struct bfin5xx_spi_master bfin_spi0_info = {
 407         .num_chipselect = 8,
 408         .enable_dma = 1,  /* master has the ability to do dma transfer */
 409         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 410 };
 411
 412 /* SPI (0) */
 413 static struct resource bfin_spi0_resource[] = {
 414         [0] = {
 415                 .start = SPI0_REGBASE,
 416                 .end   = SPI0_REGBASE + 0xFF,
 417                 .flags = IORESOURCE_MEM,
 418                 },
 419         [1] = {
 420                 .start = CH_SPI,
 421                 .end   = CH_SPI,
 422                 .flags = IORESOURCE_DMA,
 423         },
 424         [2] = {
 425                 .start = IRQ_SPI,
 426                 .end   = IRQ_SPI,
 427                 .flags = IORESOURCE_IRQ,
 428         },
 429 };
 430
 431 static struct platform_device bfin_spi0_device = {
 432         .name = "bfin-spi",
 433         .id = 0, /* Bus number */
 434         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 435         .resource = bfin_spi0_resource,
 436         .dev = {
 437                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 438         },
 439 };
 440 #endif  /* spi master and devices */
 441
 442 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 443 #ifdef CONFIG_SERIAL_BFIN_UART0
 444 static struct resource bfin_uart0_resources[] = {
 445         {
 446                 .start = UART0_THR,
 447                 .end = UART0_GCTL+2,
 448                 .flags = IORESOURCE_MEM,
 449         },
 450         {
 451                 .start = IRQ_UART0_RX,
 452                 .end = IRQ_UART0_RX+1,
 453                 .flags = IORESOURCE_IRQ,
 454         },
 455         {
 456                 .start = IRQ_UART0_ERROR,
 457                 .end = IRQ_UART0_ERROR,
 458                 .flags = IORESOURCE_IRQ,
 459         },
 460         {
 461                 .start = CH_UART0_TX,
 462                 .end = CH_UART0_TX,
 463                 .flags = IORESOURCE_DMA,
 464         },
 465         {
 466                 .start = CH_UART0_RX,
 467                 .end = CH_UART0_RX,
 468                 .flags = IORESOURCE_DMA,
 469         },
 470 };
 471
 472 unsigned short bfin_uart0_peripherals[] = {
 473         P_UART0_TX, P_UART0_RX, 0
 474 };
 475
 476 static struct platform_device bfin_uart0_device = {
 477         .name = "bfin-uart",
 478         .id = 0,
 479         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 480         .resource = bfin_uart0_resources,
 481         .dev = {
 482                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 483         },
 484 };
 485 #endif
 486 #ifdef CONFIG_SERIAL_BFIN_UART1
 487 static struct resource bfin_uart1_resources[] = {
 488         {
 489                 .start = UART1_THR,
 490                 .end = UART1_GCTL+2,
 491                 .flags = IORESOURCE_MEM,
 492         },
 493         {
 494                 .start = IRQ_UART1_RX,
 495                 .end = IRQ_UART1_RX+1,
 496                 .flags = IORESOURCE_IRQ,
 497         },
 498         {
 499                 .start = IRQ_UART1_ERROR,
 500                 .end = IRQ_UART1_ERROR,
 501                 .flags = IORESOURCE_IRQ,
 502         },
 503         {
 504                 .start = CH_UART1_TX,
 505                 .end = CH_UART1_TX,
 506                 .flags = IORESOURCE_DMA,
 507         },
 508         {
 509                 .start = CH_UART1_RX,
 510                 .end = CH_UART1_RX,
 511                 .flags = IORESOURCE_DMA,
 512         },
 513 #ifdef CONFIG_BFIN_UART1_CTSRTS
 514         {       /* CTS pin */
 515                 .start = GPIO_PG0,
 516                 .end = GPIO_PG0,
 517                 .flags = IORESOURCE_IO,
 518         },
 519         {       /* RTS pin */
 520                 .start = GPIO_PF10,
 521                 .end = GPIO_PF10,
 522                 .flags = IORESOURCE_IO,
 523         },
 524 #endif
 525 };
 526
 527 unsigned short bfin_uart1_peripherals[] = {
 528         P_UART1_TX, P_UART1_RX, 0
 529 };
 530
 531 static struct platform_device bfin_uart1_device = {
 532         .name = "bfin-uart",
 533         .id = 1,
 534         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 535         .resource = bfin_uart1_resources,
 536         .dev = {
 537                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 538         },
 539 };
 540 #endif
 541 #endif
 542
 543 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 544 #ifdef CONFIG_BFIN_SIR0
 545 static struct resource bfin_sir0_resources[] = {
 546         {
 547                 .start = 0xFFC00400,
 548                 .end = 0xFFC004FF,
 549                 .flags = IORESOURCE_MEM,
 550         },
 551         {
 552                 .start = IRQ_UART0_RX,
 553                 .end = IRQ_UART0_RX+1,
 554                 .flags = IORESOURCE_IRQ,
 555         },
 556         {
 557                 .start = CH_UART0_RX,
 558                 .end = CH_UART0_RX+1,
 559                 .flags = IORESOURCE_DMA,
 560         },
 561 };
 562
 563 static struct platform_device bfin_sir0_device = {
 564         .name = "bfin_sir",
 565         .id = 0,
 566         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 567         .resource = bfin_sir0_resources,
 568 };
 569 #endif
 570 #ifdef CONFIG_BFIN_SIR1
 571 static struct resource bfin_sir1_resources[] = {
 572         {
 573                 .start = 0xFFC02000,
 574                 .end = 0xFFC020FF,
 575                 .flags = IORESOURCE_MEM,
 576         },
 577         {
 578                 .start = IRQ_UART1_RX,
 579                 .end = IRQ_UART1_RX+1,
 580                 .flags = IORESOURCE_IRQ,
 581         },
 582         {
 583                 .start = CH_UART1_RX,
 584                 .end = CH_UART1_RX+1,
 585                 .flags = IORESOURCE_DMA,
 586         },
 587 };
 588
 589 static struct platform_device bfin_sir1_device = {
 590         .name = "bfin_sir",
 591         .id = 1,
 592         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 593         .resource = bfin_sir1_resources,
 594 };
 595 #endif
 596 #endif
 597
 598 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 599 static struct resource bfin_twi0_resource[] = {
 600         [0] = {
 601                 .start = TWI0_REGBASE,
 602                 .end   = TWI0_REGBASE,
 603                 .flags = IORESOURCE_MEM,
 604         },
 605         [1] = {
 606                 .start = IRQ_TWI,
 607                 .end   = IRQ_TWI,
 608                 .flags = IORESOURCE_IRQ,
 609         },
 610 };
 611
 612 static struct platform_device i2c_bfin_twi_device = {
 613         .name = "i2c-bfin-twi",
 614         .id = 0,
 615         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 616         .resource = bfin_twi0_resource,
 617 };
 618 #endif
 619
 620 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 621 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 622         {
 623                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 624         },
 625 #endif
 626 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 627         {
 628                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 629                 .irq = IRQ_PF8,
 630         },
 631 #endif
 632 };
 633
 634 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 635 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 636 static struct resource bfin_sport0_uart_resources[] = {
 637         {
 638                 .start = SPORT0_TCR1,
 639                 .end = SPORT0_MRCS3+4,
 640                 .flags = IORESOURCE_MEM,
 641         },
 642         {
 643                 .start = IRQ_SPORT0_RX,
 644                 .end = IRQ_SPORT0_RX+1,
 645                 .flags = IORESOURCE_IRQ,
 646         },
 647         {
 648                 .start = IRQ_SPORT0_ERROR,
 649                 .end = IRQ_SPORT0_ERROR,
 650                 .flags = IORESOURCE_IRQ,
 651         },
 652 };
 653
 654 unsigned short bfin_sport0_peripherals[] = {
 655         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 656         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 657 };
 658
 659 static struct platform_device bfin_sport0_uart_device = {
 660         .name = "bfin-sport-uart",
 661         .id = 0,
 662         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 663         .resource = bfin_sport0_uart_resources,
 664         .dev = {
 665                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 666         },
 667 };
 668 #endif
 669 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 670 static struct resource bfin_sport1_uart_resources[] = {
 671         {
 672                 .start = SPORT1_TCR1,
 673                 .end = SPORT1_MRCS3+4,
 674                 .flags = IORESOURCE_MEM,
 675         },
 676         {
 677                 .start = IRQ_SPORT1_RX,
 678                 .end = IRQ_SPORT1_RX+1,
 679                 .flags = IORESOURCE_IRQ,
 680         },
 681         {
 682                 .start = IRQ_SPORT1_ERROR,
 683                 .end = IRQ_SPORT1_ERROR,
 684                 .flags = IORESOURCE_IRQ,
 685         },
 686 };
 687
 688 unsigned short bfin_sport1_peripherals[] = {
 689         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 690         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 691 };
 692
 693 static struct platform_device bfin_sport1_uart_device = {
 694         .name = "bfin-sport-uart",
 695         .id = 1,
 696         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 697         .resource = bfin_sport1_uart_resources,
 698         .dev = {
 699                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 700         },
 701 };
 702 #endif
 703 #endif
 704
 705 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 706 #include <linux/input.h>
 707 #include <linux/gpio_keys.h>
 708
 709 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 710         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 711         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 712 };
 713
 714 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 715         .buttons        = bfin_gpio_keys_table,
 716         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 717 };
 718
 719 static struct platform_device bfin_device_gpiokeys = {
 720         .name      = "gpio-keys",
 721         .dev = {
 722                 .platform_data = &bfin_gpio_keys_data,
 723         },
 724 };
 725 #endif
 726
 727 static const unsigned int cclk_vlev_datasheet[] =
 728 {
 729         VRPAIR(VLEV_100, 400000000),
 730         VRPAIR(VLEV_105, 426000000),
 731         VRPAIR(VLEV_110, 500000000),
 732         VRPAIR(VLEV_115, 533000000),
 733         VRPAIR(VLEV_120, 600000000),
 734 };
 735
 736 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 737         .tuple_tab = cclk_vlev_datasheet,
 738         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 739         .vr_settling_time = 25 /* us */,
 740 };
 741
 742 static struct platform_device bfin_dpmc = {
 743         .name = "bfin dpmc",
 744         .dev = {
 745                 .platform_data = &bfin_dmpc_vreg_data,
 746         },
 747 };
 748
 749 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 750 #include <asm/bfin-lq035q1.h>
 751
 752 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 753         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 754         .ppi_mode = USE_RGB565_16_BIT_PPI,
 755         .use_bl = 1,
 756         .gpio_bl = GPIO_PG12,
 757 };
 758
 759 static struct resource bfin_lq035q1_resources[] = {
 760         {
 761                 .start = IRQ_PPI_ERROR,
 762                 .end = IRQ_PPI_ERROR,
 763                 .flags = IORESOURCE_IRQ,
 764         },
 765 };
 766
 767 static struct platform_device bfin_lq035q1_device = {
 768         .name           = "bfin-lq035q1",
 769         .id             = -1,
 770         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 771         .resource       = bfin_lq035q1_resources,
 772         .dev            = {
 773                 .platform_data = &bfin_lq035q1_data,
 774         },
 775 };
 776 #endif
 777
 778 static struct platform_device *stamp_devices[] __initdata = {
 779
 780         &bfin_dpmc,
 781
 782 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 783         &bf5xx_nand_device,
 784 #endif
 785
 786 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 787         &rtc_device,
 788 #endif
 789
 790 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 791         &musb_device,
 792 #endif
 793
 794 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 795         &bfin_mii_bus,
 796         &bfin_mac_device,
 797 #endif
 798
 799 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 800         &bfin_spi0_device,
 801 #endif
 802
 803 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 804 #ifdef CONFIG_SERIAL_BFIN_UART0
 805         &bfin_uart0_device,
 806 #endif
 807 #ifdef CONFIG_SERIAL_BFIN_UART1
 808         &bfin_uart1_device,
 809 #endif
 810 #endif
 811
 812 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 813         &bfin_lq035q1_device,
 814 #endif
 815
 816 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 817 #ifdef CONFIG_BFIN_SIR0
 818         &bfin_sir0_device,
 819 #endif
 820 #ifdef CONFIG_BFIN_SIR1
 821         &bfin_sir1_device,
 822 #endif
 823 #endif
 824
 825 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 826         &i2c_bfin_twi_device,
 827 #endif
 828
 829 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 830 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 831         &bfin_sport0_uart_device,
 832 #endif
 833 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 834         &bfin_sport1_uart_device,
 835 #endif
 836 #endif
 837
 838 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 839         &bfin_device_gpiokeys,
 840 #endif
 841
 842 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 843         &ezbrd_flash_device,
 844 #endif
 845 };
 846
 847 static int __init ezbrd_init(void)
 848 {
 849         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 850         i2c_register_board_info(0, bfin_i2c_board_info,
 851                                 ARRAY_SIZE(bfin_i2c_board_info));
 852         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 853         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 854         return 0;
 855 }
 856
 857 arch_initcall(ezbrd_init);
 858
 859 static struct platform_device *ezbrd_early_devices[] __initdata = {
 860 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 861 #ifdef CONFIG_SERIAL_BFIN_UART0
 862         &bfin_uart0_device,
 863 #endif
 864 #ifdef CONFIG_SERIAL_BFIN_UART1
 865         &bfin_uart1_device,
 866 #endif
 867 #endif
 868
 869 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 870 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 871         &bfin_sport0_uart_device,
 872 #endif
 873 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 874         &bfin_sport1_uart_device,
 875 #endif
 876 #endif
 877 };
 878
 879 void __init native_machine_early_platform_add_devices(void)
 880 {
 881         printk(KERN_INFO "register early platform devices\n");
 882         early_platform_add_devices(ezbrd_early_devices,
 883                 ARRAY_SIZE(ezbrd_early_devices));
 884 }
 885
 886 void native_machine_restart(char *cmd)
 887 {
 888         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 889                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 890 }
 891
 892 void bfin_get_ether_addr(char *addr)
 893 {
 894         /* the MAC is stored in OTP memory page 0xDF */
 895         u32 ret;
 896         u64 otp_mac;
 897         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 898
 899         ret = otp_read(0xDF, 0x00, &otp_mac);
 900         if (!(ret & 0x1)) {
 901                 char *otp_mac_p = (char *)&otp_mac;
 902                 for (ret = 0; ret < 6; ++ret)
 903                         addr[ret] = otp_mac_p[5 - ret];
 904         }
 905 }
 906 EXPORT_SYMBOL(bfin_get_ether_addr);