2 * GPIO Abstraction Layer
4 * Copyright 2006-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later
9 #include <linux/delay.h>
10 #include <linux/module.h>
11 #include <linux/err.h>
12 #include <linux/proc_fs.h>
13 #include <asm/blackfin.h>
15 #include <asm/portmux.h>
16 #include <linux/irq.h>
18 #if ANOMALY_05000311 || ANOMALY_05000323
21 AWA_data_clear
= SYSCR
,
24 AWA_maska
= BFIN_UART_SCR
,
25 AWA_maska_clear
= BFIN_UART_SCR
,
26 AWA_maska_set
= BFIN_UART_SCR
,
27 AWA_maska_toggle
= BFIN_UART_SCR
,
28 AWA_maskb
= BFIN_UART_GCTL
,
29 AWA_maskb_clear
= BFIN_UART_GCTL
,
30 AWA_maskb_set
= BFIN_UART_GCTL
,
31 AWA_maskb_toggle
= BFIN_UART_GCTL
,
32 AWA_dir
= SPORT1_STAT
,
33 AWA_polar
= SPORT1_STAT
,
34 AWA_edge
= SPORT1_STAT
,
35 AWA_both
= SPORT1_STAT
,
37 AWA_inen
= TIMER_ENABLE
,
38 #elif ANOMALY_05000323
39 AWA_inen
= DMA1_1_CONFIG
,
42 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
44 #define AWA_DUMMY_READ(...) do { } while (0)
47 static struct gpio_port_t
* const gpio_array
[] = {
48 #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
49 (struct gpio_port_t
*) FIO_FLAG_D
,
50 #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
51 (struct gpio_port_t
*) PORTFIO
,
52 (struct gpio_port_t
*) PORTGIO
,
53 (struct gpio_port_t
*) PORTHIO
,
54 #elif defined(BF561_FAMILY)
55 (struct gpio_port_t
*) FIO0_FLAG_D
,
56 (struct gpio_port_t
*) FIO1_FLAG_D
,
57 (struct gpio_port_t
*) FIO2_FLAG_D
,
58 #elif defined(CONFIG_BF54x)
59 (struct gpio_port_t
*)PORTA_FER
,
60 (struct gpio_port_t
*)PORTB_FER
,
61 (struct gpio_port_t
*)PORTC_FER
,
62 (struct gpio_port_t
*)PORTD_FER
,
63 (struct gpio_port_t
*)PORTE_FER
,
64 (struct gpio_port_t
*)PORTF_FER
,
65 (struct gpio_port_t
*)PORTG_FER
,
66 (struct gpio_port_t
*)PORTH_FER
,
67 (struct gpio_port_t
*)PORTI_FER
,
68 (struct gpio_port_t
*)PORTJ_FER
,
70 # error no gpio arrays defined
74 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
75 static unsigned short * const port_fer
[] = {
76 (unsigned short *) PORTF_FER
,
77 (unsigned short *) PORTG_FER
,
78 (unsigned short *) PORTH_FER
,
81 # if !defined(BF537_FAMILY)
82 static unsigned short * const port_mux
[] = {
83 (unsigned short *) PORTF_MUX
,
84 (unsigned short *) PORTG_MUX
,
85 (unsigned short *) PORTH_MUX
,
89 u8 pmux_offset
[][16] = {
90 # if defined(CONFIG_BF52x)
91 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
92 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
93 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
94 # elif defined(CONFIG_BF51x)
95 { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
96 { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
97 { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
102 #elif defined(BF538_FAMILY)
103 static unsigned short * const port_fer
[] = {
104 (unsigned short *) PORTCIO_FER
,
105 (unsigned short *) PORTDIO_FER
,
106 (unsigned short *) PORTEIO_FER
,
110 #define RESOURCE_LABEL_SIZE 16
112 static struct str_ident
{
113 char name
[RESOURCE_LABEL_SIZE
];
114 } str_ident
[MAX_RESOURCES
];
116 #if defined(CONFIG_PM)
117 static struct gpio_port_s gpio_bank_saved
[GPIO_BANK_NUM
];
120 static void gpio_error(unsigned gpio
)
122 printk(KERN_ERR
"bfin-gpio: GPIO %d wasn't requested!\n", gpio
);
125 static void set_label(unsigned short ident
, const char *label
)
128 strncpy(str_ident
[ident
].name
, label
,
129 RESOURCE_LABEL_SIZE
);
130 str_ident
[ident
].name
[RESOURCE_LABEL_SIZE
- 1] = 0;
134 static char *get_label(unsigned short ident
)
136 return (*str_ident
[ident
].name
? str_ident
[ident
].name
: "UNKNOWN");
139 static int cmp_label(unsigned short ident
, const char *label
)
143 printk(KERN_ERR
"Please provide none-null label\n");
147 return strcmp(str_ident
[ident
].name
, label
);
152 #define map_entry(m, i) reserved_##m##_map[gpio_bank(i)]
153 #define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
154 #define reserve(m, i) (map_entry(m, i) |= gpio_bit(i))
155 #define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i))
156 #define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c]
158 DECLARE_RESERVED_MAP(gpio
, GPIO_BANK_NUM
);
159 DECLARE_RESERVED_MAP(peri
, DIV_ROUND_UP(MAX_RESOURCES
, GPIO_BANKSIZE
));
160 DECLARE_RESERVED_MAP(gpio_irq
, GPIO_BANK_NUM
);
162 inline int check_gpio(unsigned gpio
)
164 #if defined(CONFIG_BF54x)
165 if (gpio
== GPIO_PB15
|| gpio
== GPIO_PC14
|| gpio
== GPIO_PC15
166 || gpio
== GPIO_PH14
|| gpio
== GPIO_PH15
167 || gpio
== GPIO_PJ14
|| gpio
== GPIO_PJ15
)
170 if (gpio
>= MAX_BLACKFIN_GPIOS
)
175 static void port_setup(unsigned gpio
, unsigned short usage
)
177 #if defined(BF538_FAMILY)
179 * BF538/9 Port C,D and E are special.
180 * Inverted PORT_FER polarity on CDE and no PORF_FER on F
181 * Regular PORT F GPIOs are handled here, CDE are exclusively
185 if (gpio
< MAX_BLACKFIN_GPIOS
|| gpio
>= MAX_RESOURCES
)
188 gpio
-= MAX_BLACKFIN_GPIOS
;
190 if (usage
== GPIO_USAGE
)
191 *port_fer
[gpio_bank(gpio
)] |= gpio_bit(gpio
);
193 *port_fer
[gpio_bank(gpio
)] &= ~gpio_bit(gpio
);
198 if (check_gpio(gpio
))
201 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
202 if (usage
== GPIO_USAGE
)
203 *port_fer
[gpio_bank(gpio
)] &= ~gpio_bit(gpio
);
205 *port_fer
[gpio_bank(gpio
)] |= gpio_bit(gpio
);
207 #elif defined(CONFIG_BF54x)
208 if (usage
== GPIO_USAGE
)
209 gpio_array
[gpio_bank(gpio
)]->port_fer
&= ~gpio_bit(gpio
);
211 gpio_array
[gpio_bank(gpio
)]->port_fer
|= gpio_bit(gpio
);
219 unsigned short offset
;
221 {.res
= P_PPI0_D13
, .offset
= 11},
222 {.res
= P_PPI0_D14
, .offset
= 11},
223 {.res
= P_PPI0_D15
, .offset
= 11},
224 {.res
= P_SPORT1_TFS
, .offset
= 11},
225 {.res
= P_SPORT1_TSCLK
, .offset
= 11},
226 {.res
= P_SPORT1_DTPRI
, .offset
= 11},
227 {.res
= P_PPI0_D10
, .offset
= 10},
228 {.res
= P_PPI0_D11
, .offset
= 10},
229 {.res
= P_PPI0_D12
, .offset
= 10},
230 {.res
= P_SPORT1_RSCLK
, .offset
= 10},
231 {.res
= P_SPORT1_RFS
, .offset
= 10},
232 {.res
= P_SPORT1_DRPRI
, .offset
= 10},
233 {.res
= P_PPI0_D8
, .offset
= 9},
234 {.res
= P_PPI0_D9
, .offset
= 9},
235 {.res
= P_SPORT1_DRSEC
, .offset
= 9},
236 {.res
= P_SPORT1_DTSEC
, .offset
= 9},
237 {.res
= P_TMR2
, .offset
= 8},
238 {.res
= P_PPI0_FS3
, .offset
= 8},
239 {.res
= P_TMR3
, .offset
= 7},
240 {.res
= P_SPI0_SSEL4
, .offset
= 7},
241 {.res
= P_TMR4
, .offset
= 6},
242 {.res
= P_SPI0_SSEL5
, .offset
= 6},
243 {.res
= P_TMR5
, .offset
= 5},
244 {.res
= P_SPI0_SSEL6
, .offset
= 5},
245 {.res
= P_UART1_RX
, .offset
= 4},
246 {.res
= P_UART1_TX
, .offset
= 4},
247 {.res
= P_TMR6
, .offset
= 4},
248 {.res
= P_TMR7
, .offset
= 4},
249 {.res
= P_UART0_RX
, .offset
= 3},
250 {.res
= P_UART0_TX
, .offset
= 3},
251 {.res
= P_DMAR0
, .offset
= 3},
252 {.res
= P_DMAR1
, .offset
= 3},
253 {.res
= P_SPORT0_DTSEC
, .offset
= 1},
254 {.res
= P_SPORT0_DRSEC
, .offset
= 1},
255 {.res
= P_CAN0_RX
, .offset
= 1},
256 {.res
= P_CAN0_TX
, .offset
= 1},
257 {.res
= P_SPI0_SSEL7
, .offset
= 1},
258 {.res
= P_SPORT0_TFS
, .offset
= 0},
259 {.res
= P_SPORT0_DTPRI
, .offset
= 0},
260 {.res
= P_SPI0_SSEL2
, .offset
= 0},
261 {.res
= P_SPI0_SSEL3
, .offset
= 0},
264 static void portmux_setup(unsigned short per
)
266 u16 y
, offset
, muxreg
;
267 u16 function
= P_FUNCT2MUX(per
);
269 for (y
= 0; y
< ARRAY_SIZE(port_mux_lut
); y
++) {
270 if (port_mux_lut
[y
].res
== per
) {
272 /* SET PORTMUX REG */
274 offset
= port_mux_lut
[y
].offset
;
275 muxreg
= bfin_read_PORT_MUX();
278 muxreg
&= ~(1 << offset
);
282 muxreg
|= (function
<< offset
);
283 bfin_write_PORT_MUX(muxreg
);
287 #elif defined(CONFIG_BF54x)
288 inline void portmux_setup(unsigned short per
)
291 u16 ident
= P_IDENT(per
);
292 u16 function
= P_FUNCT2MUX(per
);
294 pmux
= gpio_array
[gpio_bank(ident
)]->port_mux
;
296 pmux
&= ~(0x3 << (2 * gpio_sub_n(ident
)));
297 pmux
|= (function
& 0x3) << (2 * gpio_sub_n(ident
));
299 gpio_array
[gpio_bank(ident
)]->port_mux
= pmux
;
302 inline u16
get_portmux(unsigned short per
)
305 u16 ident
= P_IDENT(per
);
307 pmux
= gpio_array
[gpio_bank(ident
)]->port_mux
;
309 return (pmux
>> (2 * gpio_sub_n(ident
)) & 0x3);
311 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
312 inline void portmux_setup(unsigned short per
)
314 u16 pmux
, ident
= P_IDENT(per
), function
= P_FUNCT2MUX(per
);
315 u8 offset
= pmux_offset
[gpio_bank(ident
)][gpio_sub_n(ident
)];
317 pmux
= *port_mux
[gpio_bank(ident
)];
318 pmux
&= ~(3 << offset
);
319 pmux
|= (function
& 3) << offset
;
320 *port_mux
[gpio_bank(ident
)] = pmux
;
324 # define portmux_setup(...) do { } while (0)
328 /***********************************************************
330 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
333 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
336 * DESCRIPTION: These functions abstract direct register access
337 * to Blackfin processor General Purpose
340 * CAUTION: These functions do not belong to the GPIO Driver API
341 *************************************************************
342 * MODIFICATION HISTORY :
343 **************************************************************/
345 /* Set a specific bit */
347 #define SET_GPIO(name) \
348 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
350 unsigned long flags; \
351 local_irq_save_hw(flags); \
353 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
355 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
356 AWA_DUMMY_READ(name); \
357 local_irq_restore_hw(flags); \
359 EXPORT_SYMBOL(set_gpio_ ## name);
361 SET_GPIO(dir
) /* set_gpio_dir() */
362 SET_GPIO(inen
) /* set_gpio_inen() */
363 SET_GPIO(polar
) /* set_gpio_polar() */
364 SET_GPIO(edge
) /* set_gpio_edge() */
365 SET_GPIO(both
) /* set_gpio_both() */
368 #define SET_GPIO_SC(name) \
369 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
371 unsigned long flags; \
372 if (ANOMALY_05000311 || ANOMALY_05000323) \
373 local_irq_save_hw(flags); \
375 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
377 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
378 if (ANOMALY_05000311 || ANOMALY_05000323) { \
379 AWA_DUMMY_READ(name); \
380 local_irq_restore_hw(flags); \
383 EXPORT_SYMBOL(set_gpio_ ## name);
389 void set_gpio_toggle(unsigned gpio
)
392 if (ANOMALY_05000311
|| ANOMALY_05000323
)
393 local_irq_save_hw(flags
);
394 gpio_array
[gpio_bank(gpio
)]->toggle
= gpio_bit(gpio
);
395 if (ANOMALY_05000311
|| ANOMALY_05000323
) {
396 AWA_DUMMY_READ(toggle
);
397 local_irq_restore_hw(flags
);
400 EXPORT_SYMBOL(set_gpio_toggle
);
403 /*Set current PORT date (16-bit word)*/
405 #define SET_GPIO_P(name) \
406 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
408 unsigned long flags; \
409 if (ANOMALY_05000311 || ANOMALY_05000323) \
410 local_irq_save_hw(flags); \
411 gpio_array[gpio_bank(gpio)]->name = arg; \
412 if (ANOMALY_05000311 || ANOMALY_05000323) { \
413 AWA_DUMMY_READ(name); \
414 local_irq_restore_hw(flags); \
417 EXPORT_SYMBOL(set_gpiop_ ## name);
428 /* Get a specific bit */
429 #define GET_GPIO(name) \
430 unsigned short get_gpio_ ## name(unsigned gpio) \
432 unsigned long flags; \
433 unsigned short ret; \
434 if (ANOMALY_05000311 || ANOMALY_05000323) \
435 local_irq_save_hw(flags); \
436 ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
437 if (ANOMALY_05000311 || ANOMALY_05000323) { \
438 AWA_DUMMY_READ(name); \
439 local_irq_restore_hw(flags); \
443 EXPORT_SYMBOL(get_gpio_ ## name);
454 /*Get current PORT date (16-bit word)*/
456 #define GET_GPIO_P(name) \
457 unsigned short get_gpiop_ ## name(unsigned gpio) \
459 unsigned long flags; \
460 unsigned short ret; \
461 if (ANOMALY_05000311 || ANOMALY_05000323) \
462 local_irq_save_hw(flags); \
463 ret = (gpio_array[gpio_bank(gpio)]->name); \
464 if (ANOMALY_05000311 || ANOMALY_05000323) { \
465 AWA_DUMMY_READ(name); \
466 local_irq_restore_hw(flags); \
470 EXPORT_SYMBOL(get_gpiop_ ## name);
483 DECLARE_RESERVED_MAP(wakeup
, GPIO_BANK_NUM
);
485 static const unsigned int sic_iwr_irqs
[] = {
486 #if defined(BF533_FAMILY)
488 #elif defined(BF537_FAMILY)
489 IRQ_PROG_INTB
, IRQ_PORTG_INTB
, IRQ_MAC_TX
490 #elif defined(BF538_FAMILY)
492 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
493 IRQ_PORTF_INTB
, IRQ_PORTG_INTB
, IRQ_PORTH_INTB
494 #elif defined(BF561_FAMILY)
495 IRQ_PROG0_INTB
, IRQ_PROG1_INTB
, IRQ_PROG2_INTB
497 # error no SIC_IWR defined
501 /***********************************************************
503 * FUNCTIONS: Blackfin PM Setup API
506 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
514 * DESCRIPTION: Blackfin PM Driver API
517 *************************************************************
518 * MODIFICATION HISTORY :
519 **************************************************************/
520 int gpio_pm_wakeup_ctrl(unsigned gpio
, unsigned ctrl
)
524 if (check_gpio(gpio
) < 0)
527 local_irq_save_hw(flags
);
529 reserve(wakeup
, gpio
);
531 unreserve(wakeup
, gpio
);
533 set_gpio_maskb(gpio
, ctrl
);
534 local_irq_restore_hw(flags
);
539 int bfin_pm_standby_ctrl(unsigned ctrl
)
543 for (i
= 0; i
< MAX_BLACKFIN_GPIOS
; i
+= GPIO_BANKSIZE
) {
544 mask
= map_entry(wakeup
, i
);
548 bfin_internal_set_wake(sic_iwr_irqs
[bank
], ctrl
);
553 void bfin_gpio_pm_hibernate_suspend(void)
557 for (i
= 0; i
< MAX_BLACKFIN_GPIOS
; i
+= GPIO_BANKSIZE
) {
560 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
561 gpio_bank_saved
[bank
].fer
= *port_fer
[bank
];
562 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
563 gpio_bank_saved
[bank
].mux
= *port_mux
[bank
];
566 gpio_bank_saved
[bank
].mux
= bfin_read_PORT_MUX();
569 gpio_bank_saved
[bank
].data
= gpio_array
[bank
]->data
;
570 gpio_bank_saved
[bank
].inen
= gpio_array
[bank
]->inen
;
571 gpio_bank_saved
[bank
].polar
= gpio_array
[bank
]->polar
;
572 gpio_bank_saved
[bank
].dir
= gpio_array
[bank
]->dir
;
573 gpio_bank_saved
[bank
].edge
= gpio_array
[bank
]->edge
;
574 gpio_bank_saved
[bank
].both
= gpio_array
[bank
]->both
;
575 gpio_bank_saved
[bank
].maska
= gpio_array
[bank
]->maska
;
578 AWA_DUMMY_READ(maska
);
581 void bfin_gpio_pm_hibernate_restore(void)
585 for (i
= 0; i
< MAX_BLACKFIN_GPIOS
; i
+= GPIO_BANKSIZE
) {
588 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
589 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
590 *port_mux
[bank
] = gpio_bank_saved
[bank
].mux
;
593 bfin_write_PORT_MUX(gpio_bank_saved
[bank
].mux
);
595 *port_fer
[bank
] = gpio_bank_saved
[bank
].fer
;
597 gpio_array
[bank
]->inen
= gpio_bank_saved
[bank
].inen
;
598 gpio_array
[bank
]->data_set
= gpio_bank_saved
[bank
].data
599 & gpio_bank_saved
[bank
].dir
;
600 gpio_array
[bank
]->dir
= gpio_bank_saved
[bank
].dir
;
601 gpio_array
[bank
]->polar
= gpio_bank_saved
[bank
].polar
;
602 gpio_array
[bank
]->edge
= gpio_bank_saved
[bank
].edge
;
603 gpio_array
[bank
]->both
= gpio_bank_saved
[bank
].both
;
604 gpio_array
[bank
]->maska
= gpio_bank_saved
[bank
].maska
;
606 AWA_DUMMY_READ(maska
);
611 #else /* CONFIG_BF54x */
614 int bfin_pm_standby_ctrl(unsigned ctrl
)
619 void bfin_gpio_pm_hibernate_suspend(void)
623 for (i
= 0; i
< MAX_BLACKFIN_GPIOS
; i
+= GPIO_BANKSIZE
) {
626 gpio_bank_saved
[bank
].fer
= gpio_array
[bank
]->port_fer
;
627 gpio_bank_saved
[bank
].mux
= gpio_array
[bank
]->port_mux
;
628 gpio_bank_saved
[bank
].data
= gpio_array
[bank
]->data
;
629 gpio_bank_saved
[bank
].inen
= gpio_array
[bank
]->inen
;
630 gpio_bank_saved
[bank
].dir
= gpio_array
[bank
]->dir_set
;
634 void bfin_gpio_pm_hibernate_restore(void)
638 for (i
= 0; i
< MAX_BLACKFIN_GPIOS
; i
+= GPIO_BANKSIZE
) {
641 gpio_array
[bank
]->port_mux
= gpio_bank_saved
[bank
].mux
;
642 gpio_array
[bank
]->port_fer
= gpio_bank_saved
[bank
].fer
;
643 gpio_array
[bank
]->inen
= gpio_bank_saved
[bank
].inen
;
644 gpio_array
[bank
]->dir_set
= gpio_bank_saved
[bank
].dir
;
645 gpio_array
[bank
]->data_set
= gpio_bank_saved
[bank
].data
646 | gpio_bank_saved
[bank
].dir
;
651 unsigned short get_gpio_dir(unsigned gpio
)
653 return (0x01 & (gpio_array
[gpio_bank(gpio
)]->dir_clear
>> gpio_sub_n(gpio
)));
655 EXPORT_SYMBOL(get_gpio_dir
);
657 #endif /* CONFIG_BF54x */
659 /***********************************************************
661 * FUNCTIONS: Blackfin Peripheral Resource Allocation
665 * per Peripheral Identifier
668 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
671 *************************************************************
672 * MODIFICATION HISTORY :
673 **************************************************************/
675 int peripheral_request(unsigned short per
, const char *label
)
678 unsigned short ident
= P_IDENT(per
);
681 * Don't cares are pins with only one dedicated function
684 if (per
& P_DONTCARE
)
687 if (!(per
& P_DEFINED
))
690 BUG_ON(ident
>= MAX_RESOURCES
);
692 local_irq_save_hw(flags
);
694 /* If a pin can be muxed as either GPIO or peripheral, make
695 * sure it is not already a GPIO pin when we request it.
697 if (unlikely(!check_gpio(ident
) && is_reserved(gpio
, ident
, 1))) {
698 if (system_state
== SYSTEM_BOOTING
)
701 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
702 __func__
, ident
, get_label(ident
));
703 local_irq_restore_hw(flags
);
707 if (unlikely(is_reserved(peri
, ident
, 1))) {
710 * Pin functions like AMC address strobes my
711 * be requested and used by several drivers
715 if (!((per
& P_MAYSHARE
) && get_portmux(per
) == P_FUNCT2MUX(per
))) {
717 if (!(per
& P_MAYSHARE
)) {
720 * Allow that the identical pin function can
721 * be requested from the same driver twice
724 if (cmp_label(ident
, label
) == 0)
727 if (system_state
== SYSTEM_BOOTING
)
730 "%s: Peripheral %d function %d is already reserved by %s !\n",
731 __func__
, ident
, P_FUNCT2MUX(per
), get_label(ident
));
732 local_irq_restore_hw(flags
);
738 reserve(peri
, ident
);
741 port_setup(ident
, PERIPHERAL_USAGE
);
743 local_irq_restore_hw(flags
);
744 set_label(ident
, label
);
748 EXPORT_SYMBOL(peripheral_request
);
750 int peripheral_request_list(const unsigned short per
[], const char *label
)
755 for (cnt
= 0; per
[cnt
] != 0; cnt
++) {
757 ret
= peripheral_request(per
[cnt
], label
);
760 for ( ; cnt
> 0; cnt
--)
761 peripheral_free(per
[cnt
- 1]);
769 EXPORT_SYMBOL(peripheral_request_list
);
771 void peripheral_free(unsigned short per
)
774 unsigned short ident
= P_IDENT(per
);
776 if (per
& P_DONTCARE
)
779 if (!(per
& P_DEFINED
))
782 local_irq_save_hw(flags
);
784 if (unlikely(!is_reserved(peri
, ident
, 0))) {
785 local_irq_restore_hw(flags
);
789 if (!(per
& P_MAYSHARE
))
790 port_setup(ident
, GPIO_USAGE
);
792 unreserve(peri
, ident
);
794 set_label(ident
, "free");
796 local_irq_restore_hw(flags
);
798 EXPORT_SYMBOL(peripheral_free
);
800 void peripheral_free_list(const unsigned short per
[])
803 for (cnt
= 0; per
[cnt
] != 0; cnt
++)
804 peripheral_free(per
[cnt
]);
806 EXPORT_SYMBOL(peripheral_free_list
);
808 /***********************************************************
810 * FUNCTIONS: Blackfin GPIO Driver
813 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
816 * DESCRIPTION: Blackfin GPIO Driver API
819 *************************************************************
820 * MODIFICATION HISTORY :
821 **************************************************************/
823 int bfin_gpio_request(unsigned gpio
, const char *label
)
827 if (check_gpio(gpio
) < 0)
830 local_irq_save_hw(flags
);
833 * Allow that the identical GPIO can
834 * be requested from the same driver twice
835 * Do nothing and return -
838 if (cmp_label(gpio
, label
) == 0) {
839 local_irq_restore_hw(flags
);
843 if (unlikely(is_reserved(gpio
, gpio
, 1))) {
844 if (system_state
== SYSTEM_BOOTING
)
846 printk(KERN_ERR
"bfin-gpio: GPIO %d is already reserved by %s !\n",
847 gpio
, get_label(gpio
));
848 local_irq_restore_hw(flags
);
851 if (unlikely(is_reserved(peri
, gpio
, 1))) {
852 if (system_state
== SYSTEM_BOOTING
)
855 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
856 gpio
, get_label(gpio
));
857 local_irq_restore_hw(flags
);
860 if (unlikely(is_reserved(gpio_irq
, gpio
, 1))) {
861 printk(KERN_NOTICE
"bfin-gpio: GPIO %d is already reserved as gpio-irq!"
862 " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio
);
865 else { /* Reset POLAR setting when acquiring a gpio for the first time */
866 set_gpio_polar(gpio
, 0);
871 set_label(gpio
, label
);
873 local_irq_restore_hw(flags
);
875 port_setup(gpio
, GPIO_USAGE
);
879 EXPORT_SYMBOL(bfin_gpio_request
);
881 void bfin_gpio_free(unsigned gpio
)
885 if (check_gpio(gpio
) < 0)
890 local_irq_save_hw(flags
);
892 if (unlikely(!is_reserved(gpio
, gpio
, 0))) {
893 if (system_state
== SYSTEM_BOOTING
)
896 local_irq_restore_hw(flags
);
900 unreserve(gpio
, gpio
);
902 set_label(gpio
, "free");
904 local_irq_restore_hw(flags
);
906 EXPORT_SYMBOL(bfin_gpio_free
);
908 #ifdef BFIN_SPECIAL_GPIO_BANKS
909 DECLARE_RESERVED_MAP(special_gpio
, gpio_bank(MAX_RESOURCES
));
911 int bfin_special_gpio_request(unsigned gpio
, const char *label
)
915 local_irq_save_hw(flags
);
918 * Allow that the identical GPIO can
919 * be requested from the same driver twice
920 * Do nothing and return -
923 if (cmp_label(gpio
, label
) == 0) {
924 local_irq_restore_hw(flags
);
928 if (unlikely(is_reserved(special_gpio
, gpio
, 1))) {
929 local_irq_restore_hw(flags
);
930 printk(KERN_ERR
"bfin-gpio: GPIO %d is already reserved by %s !\n",
931 gpio
, get_label(gpio
));
935 if (unlikely(is_reserved(peri
, gpio
, 1))) {
936 local_irq_restore_hw(flags
);
938 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
939 gpio
, get_label(gpio
));
944 reserve(special_gpio
, gpio
);
947 set_label(gpio
, label
);
948 local_irq_restore_hw(flags
);
949 port_setup(gpio
, GPIO_USAGE
);
953 EXPORT_SYMBOL(bfin_special_gpio_request
);
955 void bfin_special_gpio_free(unsigned gpio
)
961 local_irq_save_hw(flags
);
963 if (unlikely(!is_reserved(special_gpio
, gpio
, 0))) {
965 local_irq_restore_hw(flags
);
969 unreserve(special_gpio
, gpio
);
970 unreserve(peri
, gpio
);
971 set_label(gpio
, "free");
972 local_irq_restore_hw(flags
);
974 EXPORT_SYMBOL(bfin_special_gpio_free
);
978 int bfin_gpio_irq_request(unsigned gpio
, const char *label
)
982 if (check_gpio(gpio
) < 0)
985 local_irq_save_hw(flags
);
987 if (unlikely(is_reserved(peri
, gpio
, 1))) {
988 if (system_state
== SYSTEM_BOOTING
)
991 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
992 gpio
, get_label(gpio
));
993 local_irq_restore_hw(flags
);
996 if (unlikely(is_reserved(gpio
, gpio
, 1)))
997 printk(KERN_NOTICE
"bfin-gpio: GPIO %d is already reserved by %s! "
998 "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
999 gpio
, get_label(gpio
));
1001 reserve(gpio_irq
, gpio
);
1002 set_label(gpio
, label
);
1004 local_irq_restore_hw(flags
);
1006 port_setup(gpio
, GPIO_USAGE
);
1011 void bfin_gpio_irq_free(unsigned gpio
)
1013 unsigned long flags
;
1015 if (check_gpio(gpio
) < 0)
1018 local_irq_save_hw(flags
);
1020 if (unlikely(!is_reserved(gpio_irq
, gpio
, 0))) {
1021 if (system_state
== SYSTEM_BOOTING
)
1024 local_irq_restore_hw(flags
);
1028 unreserve(gpio_irq
, gpio
);
1030 set_label(gpio
, "free");
1032 local_irq_restore_hw(flags
);
1035 static inline void __bfin_gpio_direction_input(unsigned gpio
)
1038 gpio_array
[gpio_bank(gpio
)]->dir_clear
= gpio_bit(gpio
);
1040 gpio_array
[gpio_bank(gpio
)]->dir
&= ~gpio_bit(gpio
);
1042 gpio_array
[gpio_bank(gpio
)]->inen
|= gpio_bit(gpio
);
1045 int bfin_gpio_direction_input(unsigned gpio
)
1047 unsigned long flags
;
1049 if (unlikely(!is_reserved(gpio
, gpio
, 0))) {
1054 local_irq_save_hw(flags
);
1055 __bfin_gpio_direction_input(gpio
);
1056 AWA_DUMMY_READ(inen
);
1057 local_irq_restore_hw(flags
);
1061 EXPORT_SYMBOL(bfin_gpio_direction_input
);
1063 void bfin_gpio_irq_prepare(unsigned gpio
)
1066 unsigned long flags
;
1069 port_setup(gpio
, GPIO_USAGE
);
1072 local_irq_save_hw(flags
);
1073 __bfin_gpio_direction_input(gpio
);
1074 local_irq_restore_hw(flags
);
1078 void bfin_gpio_set_value(unsigned gpio
, int arg
)
1081 gpio_array
[gpio_bank(gpio
)]->data_set
= gpio_bit(gpio
);
1083 gpio_array
[gpio_bank(gpio
)]->data_clear
= gpio_bit(gpio
);
1085 EXPORT_SYMBOL(bfin_gpio_set_value
);
1087 int bfin_gpio_direction_output(unsigned gpio
, int value
)
1089 unsigned long flags
;
1091 if (unlikely(!is_reserved(gpio
, gpio
, 0))) {
1096 local_irq_save_hw(flags
);
1098 gpio_array
[gpio_bank(gpio
)]->inen
&= ~gpio_bit(gpio
);
1099 gpio_set_value(gpio
, value
);
1101 gpio_array
[gpio_bank(gpio
)]->dir_set
= gpio_bit(gpio
);
1103 gpio_array
[gpio_bank(gpio
)]->dir
|= gpio_bit(gpio
);
1106 AWA_DUMMY_READ(dir
);
1107 local_irq_restore_hw(flags
);
1111 EXPORT_SYMBOL(bfin_gpio_direction_output
);
1113 int bfin_gpio_get_value(unsigned gpio
)
1116 return (1 & (gpio_array
[gpio_bank(gpio
)]->data
>> gpio_sub_n(gpio
)));
1118 unsigned long flags
;
1120 if (unlikely(get_gpio_edge(gpio
))) {
1122 local_irq_save_hw(flags
);
1123 set_gpio_edge(gpio
, 0);
1124 ret
= get_gpio_data(gpio
);
1125 set_gpio_edge(gpio
, 1);
1126 local_irq_restore_hw(flags
);
1129 return get_gpio_data(gpio
);
1132 EXPORT_SYMBOL(bfin_gpio_get_value
);
1134 void bfin_reset_boot_spi_cs(unsigned short pin
)
1136 unsigned short gpio
= P_IDENT(pin
);
1137 port_setup(gpio
, GPIO_USAGE
);
1138 gpio_array
[gpio_bank(gpio
)]->data_set
= gpio_bit(gpio
);
1139 AWA_DUMMY_READ(data_set
);
1143 #if defined(CONFIG_PROC_FS)
1144 static int gpio_proc_read(char *buf
, char **start
, off_t offset
,
1145 int len
, int *unused_i
, void *unused_v
)
1147 int c
, irq
, gpio
, outlen
= 0;
1149 for (c
= 0; c
< MAX_RESOURCES
; c
++) {
1150 irq
= is_reserved(gpio_irq
, c
, 1);
1151 gpio
= is_reserved(gpio
, c
, 1);
1152 if (!check_gpio(c
) && (gpio
|| irq
))
1153 len
= sprintf(buf
, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c
,
1154 get_label(c
), (gpio
&& irq
) ? " *" : "",
1155 get_gpio_dir(c
) ? "OUTPUT" : "INPUT");
1156 else if (is_reserved(peri
, c
, 1))
1157 len
= sprintf(buf
, "GPIO_%d: \t%s \t\tPeripheral\n", c
, get_label(c
));
1166 static __init
int gpio_register_proc(void)
1168 struct proc_dir_entry
*proc_gpio
;
1170 proc_gpio
= create_proc_entry("gpio", S_IRUGO
, NULL
);
1172 proc_gpio
->read_proc
= gpio_proc_read
;
1173 return proc_gpio
!= NULL
;
1175 __initcall(gpio_register_proc
);
1178 #ifdef CONFIG_GPIOLIB
1179 static int bfin_gpiolib_direction_input(struct gpio_chip
*chip
, unsigned gpio
)
1181 return bfin_gpio_direction_input(gpio
);
1184 static int bfin_gpiolib_direction_output(struct gpio_chip
*chip
, unsigned gpio
, int level
)
1186 return bfin_gpio_direction_output(gpio
, level
);
1189 static int bfin_gpiolib_get_value(struct gpio_chip
*chip
, unsigned gpio
)
1191 return bfin_gpio_get_value(gpio
);
1194 static void bfin_gpiolib_set_value(struct gpio_chip
*chip
, unsigned gpio
, int value
)
1196 return bfin_gpio_set_value(gpio
, value
);
1199 static int bfin_gpiolib_gpio_request(struct gpio_chip
*chip
, unsigned gpio
)
1201 return bfin_gpio_request(gpio
, chip
->label
);
1204 static void bfin_gpiolib_gpio_free(struct gpio_chip
*chip
, unsigned gpio
)
1206 return bfin_gpio_free(gpio
);
1209 static int bfin_gpiolib_gpio_to_irq(struct gpio_chip
*chip
, unsigned gpio
)
1211 return gpio
+ GPIO_IRQ_BASE
;
1214 static struct gpio_chip bfin_chip
= {
1215 .label
= "BFIN-GPIO",
1216 .direction_input
= bfin_gpiolib_direction_input
,
1217 .get
= bfin_gpiolib_get_value
,
1218 .direction_output
= bfin_gpiolib_direction_output
,
1219 .set
= bfin_gpiolib_set_value
,
1220 .request
= bfin_gpiolib_gpio_request
,
1221 .free
= bfin_gpiolib_gpio_free
,
1222 .to_irq
= bfin_gpiolib_gpio_to_irq
,
1224 .ngpio
= MAX_BLACKFIN_GPIOS
,
1227 static int __init
bfin_gpiolib_setup(void)
1229 return gpiochip_add(&bfin_chip
);
1231 arch_initcall(bfin_gpiolib_setup
);