| blob | 532a3732c214c1bb5fbe31e71786730d7362105b |
1 /*
2 * Register definitions for the Power Manager (PM)
3 */
4 #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
5 #define __ARCH_AVR32_MACH_AT32AP_PM_H__
7 /* PM register offsets */
8 #define PM_MCCTRL 0x0000
9 #define PM_CKSEL 0x0004
10 #define PM_CPU_MASK 0x0008
11 #define PM_HSB_MASK 0x000c
12 #define PM_PBA_MASK 0x0010
13 #define PM_PBB_MASK 0x0014
14 #define PM_PLL0 0x0020
15 #define PM_PLL1 0x0024
16 #define PM_IER 0x0040
17 #define PM_IDR 0x0044
18 #define PM_IMR 0x0048
19 #define PM_ISR 0x004c
20 #define PM_ICR 0x0050
21 #define PM_GCCTRL(x) (0x0060 + 4 * (x))
22 #define PM_RCAUSE 0x00c0
24 /* Bitfields in CKSEL */
25 #define PM_CPUSEL_OFFSET 0
26 #define PM_CPUSEL_SIZE 3
27 #define PM_CPUDIV_OFFSET 7
28 #define PM_CPUDIV_SIZE 1
29 #define PM_HSBSEL_OFFSET 8
30 #define PM_HSBSEL_SIZE 3
31 #define PM_HSBDIV_OFFSET 15
32 #define PM_HSBDIV_SIZE 1
33 #define PM_PBASEL_OFFSET 16
34 #define PM_PBASEL_SIZE 3
35 #define PM_PBADIV_OFFSET 23
36 #define PM_PBADIV_SIZE 1
37 #define PM_PBBSEL_OFFSET 24
38 #define PM_PBBSEL_SIZE 3
39 #define PM_PBBDIV_OFFSET 31
40 #define PM_PBBDIV_SIZE 1
42 /* Bitfields in PLL0 */
43 #define PM_PLLEN_OFFSET 0
44 #define PM_PLLEN_SIZE 1
45 #define PM_PLLOSC_OFFSET 1
46 #define PM_PLLOSC_SIZE 1
47 #define PM_PLLOPT_OFFSET 2
48 #define PM_PLLOPT_SIZE 3
49 #define PM_PLLDIV_OFFSET 8
50 #define PM_PLLDIV_SIZE 8
51 #define PM_PLLMUL_OFFSET 16
52 #define PM_PLLMUL_SIZE 8
53 #define PM_PLLCOUNT_OFFSET 24
54 #define PM_PLLCOUNT_SIZE 6
55 #define PM_PLLTEST_OFFSET 31
56 #define PM_PLLTEST_SIZE 1
58 /* Bitfields in ICR */
59 #define PM_LOCK0_OFFSET 0
60 #define PM_LOCK0_SIZE 1
61 #define PM_LOCK1_OFFSET 1
62 #define PM_LOCK1_SIZE 1
63 #define PM_WAKE_OFFSET 2
64 #define PM_WAKE_SIZE 1
65 #define PM_CKRDY_OFFSET 5
66 #define PM_CKRDY_SIZE 1
67 #define PM_MSKRDY_OFFSET 6
68 #define PM_MSKRDY_SIZE 1
70 /* Bitfields in GCCTRL0 */
71 #define PM_OSCSEL_OFFSET 0
72 #define PM_OSCSEL_SIZE 1
73 #define PM_PLLSEL_OFFSET 1
74 #define PM_PLLSEL_SIZE 1
75 #define PM_CEN_OFFSET 2
76 #define PM_CEN_SIZE 1
77 #define PM_DIVEN_OFFSET 4
78 #define PM_DIVEN_SIZE 1
79 #define PM_DIV_OFFSET 8
80 #define PM_DIV_SIZE 8
82 /* Bitfields in RCAUSE */
83 #define PM_POR_OFFSET 0
84 #define PM_POR_SIZE 1
85 #define PM_EXT_OFFSET 2
86 #define PM_EXT_SIZE 1
87 #define PM_WDT_OFFSET 3
88 #define PM_WDT_SIZE 1
89 #define PM_NTAE_OFFSET 4
90 #define PM_NTAE_SIZE 1
92 /* Bit manipulation macros */
93 #define PM_BIT(name) \
94 (1 << PM_##name##_OFFSET)
95 #define PM_BF(name,value) \
96 (((value) & ((1 << PM_##name##_SIZE) - 1)) \
97 << PM_##name##_OFFSET)
98 #define PM_BFEXT(name,value) \
99 (((value) >> PM_##name##_OFFSET) \
100 & ((1 << PM_##name##_SIZE) - 1))
101 #define PM_BFINS(name,value,old)\
102 (((old) & ~(((1 << PM_##name##_SIZE) - 1) \
103 << PM_##name##_OFFSET)) \
104 | PM_BF(name,value))
106 /* Register access macros */
107 #define pm_readl(reg) \
108 __raw_readl((void __iomem __force *)PM_BASE + PM_##reg)
109 #define pm_writel(reg,value) \
110 __raw_writel((value), (void __iomem __force *)PM_BASE + PM_##reg)