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[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / arm / plat-s5p / include / plat / irqs.h
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1 /* linux/arch/arm/plat-s5p/include/plat/irqs.h
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * S5P Common IRQ support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __ASM_PLAT_S5P_IRQS_H
14 #define __ASM_PLAT_S5P_IRQS_H __FILE__
16 /* we keep the first set of CPU IRQs out of the range of
17 * the ISA space, so that the PC104 has them to itself
18 * and we don't end up having to do horrible things to the
19 * standard ISA drivers....
21 * note, since we're using the VICs, our start must be a
22 * mulitple of 32 to allow the common code to work
25 #define S5P_IRQ_OFFSET (32)
27 #define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET)
29 #define S5P_VIC0_BASE S5P_IRQ(0)
30 #define S5P_VIC1_BASE S5P_IRQ(32)
31 #define S5P_VIC2_BASE S5P_IRQ(64)
32 #define S5P_VIC3_BASE S5P_IRQ(96)
34 #define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
36 #define IRQ_VIC0_BASE S5P_VIC0_BASE
37 #define IRQ_VIC1_BASE S5P_VIC1_BASE
38 #define IRQ_VIC2_BASE S5P_VIC2_BASE
40 /* UART interrupts, each UART has 4 intterupts per channel so
41 * use the space between the ISA and S3C main interrupts. Note, these
42 * are not in the same order as the S3C24XX series! */
44 #define IRQ_S5P_UART_BASE0 (16)
45 #define IRQ_S5P_UART_BASE1 (20)
46 #define IRQ_S5P_UART_BASE2 (24)
47 #define IRQ_S5P_UART_BASE3 (28)
49 #define UART_IRQ_RXD (0)
50 #define UART_IRQ_ERR (1)
51 #define UART_IRQ_TXD (2)
53 #define IRQ_S5P_UART_RX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD)
54 #define IRQ_S5P_UART_TX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD)
55 #define IRQ_S5P_UART_ERR0 (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR)
57 #define IRQ_S5P_UART_RX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD)
58 #define IRQ_S5P_UART_TX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD)
59 #define IRQ_S5P_UART_ERR1 (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR)
61 #define IRQ_S5P_UART_RX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD)
62 #define IRQ_S5P_UART_TX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD)
63 #define IRQ_S5P_UART_ERR2 (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR)
65 #define IRQ_S5P_UART_RX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD)
66 #define IRQ_S5P_UART_TX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD)
67 #define IRQ_S5P_UART_ERR3 (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR)
69 /* S3C compatibilty defines */
70 #define IRQ_S3CUART_RX0 IRQ_S5P_UART_RX0
71 #define IRQ_S3CUART_RX1 IRQ_S5P_UART_RX1
72 #define IRQ_S3CUART_RX2 IRQ_S5P_UART_RX2
73 #define IRQ_S3CUART_RX3 IRQ_S5P_UART_RX3
75 /* VIC based IRQs */
77 #define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
78 #define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x))
79 #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
80 #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
82 #define S5P_TIMER_IRQ(x) (11 + (x))
84 #define IRQ_TIMER0 S5P_TIMER_IRQ(0)
85 #define IRQ_TIMER1 S5P_TIMER_IRQ(1)
86 #define IRQ_TIMER2 S5P_TIMER_IRQ(2)
87 #define IRQ_TIMER3 S5P_TIMER_IRQ(3)
88 #define IRQ_TIMER4 S5P_TIMER_IRQ(4)
90 #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
91 : ((x) - 16 + S5P_EINT_BASE2))
93 #define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \
94 ((irq) - S5P_EINT_BASE1) : \
95 ((irq) + 16 - S5P_EINT_BASE2))
97 #endif /* __ASM_PLAT_S5P_IRQS_H */