release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-s3c24xx/gpiolib.c

   1 /* linux/arch/arm/plat-s3c24xx/gpiolib.c
   2  *
   3  * Copyright (c) 2008-2010 Simtec Electronics
   4  *      http://armlinux.simtec.co.uk/
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * S3C24XX GPIOlib support
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License.
  12 */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/ioport.h>
  20 #include <linux/io.h>
  21 #include <linux/gpio.h>
  22
  23 #include <plat/gpio-core.h>
  24 #include <plat/gpio-cfg.h>
  25 #include <plat/gpio-cfg-helpers.h>
  26 #include <mach/hardware.h>
  27 #include <asm/irq.h>
  28 #include <plat/pm.h>
  29
  30 #include <mach/regs-gpio.h>
  31
  32 static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
  33 {
  34         return -EINVAL;
  35 }
  36
  37 static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
  38                                         unsigned offset, int value)
  39 {
  40         struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
  41         void __iomem *base = ourchip->base;
  42         unsigned long flags;
  43         unsigned long dat;
  44         unsigned long con;
  45
  46         local_irq_save(flags);
  47
  48         con = __raw_readl(base + 0x00);
  49         dat = __raw_readl(base + 0x04);
  50
  51         dat &= ~(1 << offset);
  52         if (value)
  53                 dat |= 1 << offset;
  54
  55         __raw_writel(dat, base + 0x04);
  56
  57         con &= ~(1 << offset);
  58
  59         __raw_writel(con, base + 0x00);
  60         __raw_writel(dat, base + 0x04);
  61
  62         local_irq_restore(flags);
  63         return 0;
  64 }
  65
  66 static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset)
  67 {
  68         if (offset < 4)
  69                 return IRQ_EINT0 + offset;
  70
  71         if (offset < 8)
  72                 return IRQ_EINT4 + offset - 4;
  73
  74         return -EINVAL;
  75 }
  76
  77 static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
  78 {
  79         return IRQ_EINT8 + offset;
  80 }
  81
  82 static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
  83         .set_config     = s3c_gpio_setcfg_s3c24xx_a,
  84         .get_config     = s3c_gpio_getcfg_s3c24xx_a,
  85 };
  86
  87 struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
  88         .set_config     = s3c_gpio_setcfg_s3c24xx,
  89         .get_config     = s3c_gpio_getcfg_s3c24xx,
  90 };
  91
  92 struct s3c_gpio_chip s3c24xx_gpios[] = {
  93         [0] = {
  94                 .base   = S3C2410_GPACON,
  95                 .pm     = __gpio_pm(&s3c_gpio_pm_1bit),
  96                 .config = &s3c24xx_gpiocfg_banka,
  97                 .chip   = {
  98                         .base                   = S3C2410_GPA(0),
  99                         .owner                  = THIS_MODULE,
 100                         .label                  = "GPIOA",
 101                         .ngpio                  = 24,
 102                         .direction_input        = s3c24xx_gpiolib_banka_input,
 103                         .direction_output       = s3c24xx_gpiolib_banka_output,
 104                 },
 105         },
 106         [1] = {
 107                 .base   = S3C2410_GPBCON,
 108                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 109                 .chip   = {
 110                         .base                   = S3C2410_GPB(0),
 111                         .owner                  = THIS_MODULE,
 112                         .label                  = "GPIOB",
 113                         .ngpio                  = 16,
 114                 },
 115         },
 116         [2] = {
 117                 .base   = S3C2410_GPCCON,
 118                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 119                 .chip   = {
 120                         .base                   = S3C2410_GPC(0),
 121                         .owner                  = THIS_MODULE,
 122                         .label                  = "GPIOC",
 123                         .ngpio                  = 16,
 124                 },
 125         },
 126         [3] = {
 127                 .base   = S3C2410_GPDCON,
 128                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 129                 .chip   = {
 130                         .base                   = S3C2410_GPD(0),
 131                         .owner                  = THIS_MODULE,
 132                         .label                  = "GPIOD",
 133                         .ngpio                  = 16,
 134                 },
 135         },
 136         [4] = {
 137                 .base   = S3C2410_GPECON,
 138                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 139                 .chip   = {
 140                         .base                   = S3C2410_GPE(0),
 141                         .label                  = "GPIOE",
 142                         .owner                  = THIS_MODULE,
 143                         .ngpio                  = 16,
 144                 },
 145         },
 146         [5] = {
 147                 .base   = S3C2410_GPFCON,
 148                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 149                 .chip   = {
 150                         .base                   = S3C2410_GPF(0),
 151                         .owner                  = THIS_MODULE,
 152                         .label                  = "GPIOF",
 153                         .ngpio                  = 8,
 154                         .to_irq                 = s3c24xx_gpiolib_bankf_toirq,
 155                 },
 156         },
 157         [6] = {
 158                 .base   = S3C2410_GPGCON,
 159                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 160                 .chip   = {
 161                         .base                   = S3C2410_GPG(0),
 162                         .owner                  = THIS_MODULE,
 163                         .label                  = "GPIOG",
 164                         .ngpio                  = 16,
 165                         .to_irq                 = s3c24xx_gpiolib_bankg_toirq,
 166                 },
 167         }, {
 168                 .base   = S3C2410_GPHCON,
 169                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 170                 .chip   = {
 171                         .base                   = S3C2410_GPH(0),
 172                         .owner                  = THIS_MODULE,
 173                         .label                  = "GPIOH",
 174                         .ngpio                  = 11,
 175                 },
 176         },
 177                 /* GPIOS for the S3C2443 and later devices. */
 178         {
 179                 .base   = S3C2440_GPJCON,
 180                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 181                 .chip   = {
 182                         .base                   = S3C2410_GPJ(0),
 183                         .owner                  = THIS_MODULE,
 184                         .label                  = "GPIOJ",
 185                         .ngpio                  = 16,
 186                 },
 187         }, {
 188                 .base   = S3C2443_GPKCON,
 189                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 190                 .chip   = {
 191                         .base                   = S3C2410_GPK(0),
 192                         .owner                  = THIS_MODULE,
 193                         .label                  = "GPIOK",
 194                         .ngpio                  = 16,
 195                 },
 196         }, {
 197                 .base   = S3C2443_GPLCON,
 198                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 199                 .chip   = {
 200                         .base                   = S3C2410_GPL(0),
 201                         .owner                  = THIS_MODULE,
 202                         .label                  = "GPIOL",
 203                         .ngpio                  = 15,
 204                 },
 205         }, {
 206                 .base   = S3C2443_GPMCON,
 207                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 208                 .chip   = {
 209                         .base                   = S3C2410_GPM(0),
 210                         .owner                  = THIS_MODULE,
 211                         .label                  = "GPIOM",
 212                         .ngpio                  = 2,
 213                 },
 214         },
 215 };
 216
 217
 218 static __init int s3c24xx_gpiolib_init(void)
 219 {
 220         struct s3c_gpio_chip *chip = s3c24xx_gpios;
 221         int gpn;
 222
 223         for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) {
 224                 if (!chip->config)
 225                         chip->config = &s3c24xx_gpiocfg_default;
 226
 227                 s3c_gpiolib_add(chip);
 228         }
 229
 230         return 0;
 231 }
 232
 233 core_initcall(s3c24xx_gpiolib_init);