release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6442/mach-smdk6442.c

   1 /* linux/arch/arm/mach-s5p6442/mach-smdk6442.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/types.h>
  13 #include <linux/init.h>
  14 #include <linux/serial_core.h>
  15
  16 #include <asm/mach/arch.h>
  17 #include <asm/mach/map.h>
  18 #include <asm/setup.h>
  19 #include <asm/mach-types.h>
  20
  21 #include <mach/map.h>
  22 #include <mach/regs-clock.h>
  23
  24 #include <plat/regs-serial.h>
  25 #include <plat/s5p6442.h>
  26 #include <plat/devs.h>
  27 #include <plat/cpu.h>
  28
  29 /* Following are default values for UCON, ULCON and UFCON UART registers */
  30 #define SMDK6442_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  31                                  S3C2410_UCON_RXILEVEL |        \
  32                                  S3C2410_UCON_TXIRQMODE |       \
  33                                  S3C2410_UCON_RXIRQMODE |       \
  34                                  S3C2410_UCON_RXFIFO_TOI |      \
  35                                  S3C2443_UCON_RXERR_IRQEN)
  36
  37 #define SMDK6442_ULCON_DEFAULT  S3C2410_LCON_CS8
  38
  39 #define SMDK6442_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  40                                  S5PV210_UFCON_TXTRIG4 |        \
  41                                  S5PV210_UFCON_RXTRIG4)
  42
  43 static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
  44         [0] = {
  45                 .hwport         = 0,
  46                 .flags          = 0,
  47                 .ucon           = SMDK6442_UCON_DEFAULT,
  48                 .ulcon          = SMDK6442_ULCON_DEFAULT,
  49                 .ufcon          = SMDK6442_UFCON_DEFAULT,
  50         },
  51         [1] = {
  52                 .hwport         = 1,
  53                 .flags          = 0,
  54                 .ucon           = SMDK6442_UCON_DEFAULT,
  55                 .ulcon          = SMDK6442_ULCON_DEFAULT,
  56                 .ufcon          = SMDK6442_UFCON_DEFAULT,
  57         },
  58         [2] = {
  59                 .hwport         = 2,
  60                 .flags          = 0,
  61                 .ucon           = SMDK6442_UCON_DEFAULT,
  62                 .ulcon          = SMDK6442_ULCON_DEFAULT,
  63                 .ufcon          = SMDK6442_UFCON_DEFAULT,
  64         },
  65 };
  66
  67 static struct platform_device *smdk6442_devices[] __initdata = {
  68         &s5p6442_device_iis0,
  69         &s3c_device_wdt,
  70 };
  71
  72 static void __init smdk6442_map_io(void)
  73 {
  74         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  75         s3c24xx_init_clocks(12000000);
  76         s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs));
  77 }
  78
  79 static void __init smdk6442_machine_init(void)
  80 {
  81         platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices));
  82 }
  83
  84 MACHINE_START(SMDK6442, "SMDK6442")
  85         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  86         .phys_io        = S3C_PA_UART & 0xfff00000,
  87         .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
  88         .boot_params    = S5P_PA_SDRAM + 0x100,
  89         .init_irq       = s5p6442_init_irq,
  90         .map_io         = smdk6442_map_io,
  91         .init_machine   = smdk6442_machine_init,
  92         .timer          = &s3c24xx_timer,
  93 MACHINE_END