release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s3c64xx/mach-smdk6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12 */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/types.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/list.h>
  18 #include <linux/timer.h>
  19 #include <linux/init.h>
  20 #include <linux/input.h>
  21 #include <linux/serial_core.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/io.h>
  24 #include <linux/i2c.h>
  25 #include <linux/leds.h>
  26 #include <linux/fb.h>
  27 #include <linux/gpio.h>
  28 #include <linux/delay.h>
  29 #include <linux/smsc911x.h>
  30 #include <linux/regulator/fixed.h>
  31
  32 #ifdef CONFIG_SMDK6410_WM1190_EV1
  33 #include <linux/mfd/wm8350/core.h>
  34 #include <linux/mfd/wm8350/pmic.h>
  35 #endif
  36
  37 #ifdef CONFIG_SMDK6410_WM1192_EV1
  38 #include <linux/mfd/wm831x/core.h>
  39 #include <linux/mfd/wm831x/pdata.h>
  40 #endif
  41
  42 #include <video/platform_lcd.h>
  43
  44 #include <asm/mach/arch.h>
  45 #include <asm/mach/map.h>
  46 #include <asm/mach/irq.h>
  47
  48 #include <mach/hardware.h>
  49 #include <mach/regs-fb.h>
  50 #include <mach/map.h>
  51
  52 #include <asm/irq.h>
  53 #include <asm/mach-types.h>
  54
  55 #include <plat/regs-serial.h>
  56 #include <mach/regs-modem.h>
  57 #include <mach/regs-gpio.h>
  58 #include <mach/regs-sys.h>
  59 #include <mach/regs-srom.h>
  60 #include <plat/ata.h>
  61 #include <plat/iic.h>
  62 #include <plat/fb.h>
  63 #include <plat/gpio-cfg.h>
  64
  65 #include <mach/s3c6410.h>
  66 #include <plat/clock.h>
  67 #include <plat/devs.h>
  68 #include <plat/cpu.h>
  69 #include <plat/adc.h>
  70 #include <plat/ts.h>
  71 #include <plat/keypad.h>
  72
  73 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  74 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  75 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  76
  77 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  78         [0] = {
  79                 .hwport      = 0,
  80                 .flags       = 0,
  81                 .ucon        = UCON,
  82                 .ulcon       = ULCON,
  83                 .ufcon       = UFCON,
  84         },
  85         [1] = {
  86                 .hwport      = 1,
  87                 .flags       = 0,
  88                 .ucon        = UCON,
  89                 .ulcon       = ULCON,
  90                 .ufcon       = UFCON,
  91         },
  92         [2] = {
  93                 .hwport      = 2,
  94                 .flags       = 0,
  95                 .ucon        = UCON,
  96                 .ulcon       = ULCON,
  97                 .ufcon       = UFCON,
  98         },
  99         [3] = {
 100                 .hwport      = 3,
 101                 .flags       = 0,
 102                 .ucon        = UCON,
 103                 .ulcon       = ULCON,
 104                 .ufcon       = UFCON,
 105         },
 106 };
 107
 108 /* framebuffer and LCD setup. */
 109
 110 /* GPF15 = LCD backlight control
 111  * GPF13 => Panel power
 112  * GPN5 = LCD nRESET signal
 113  * PWM_TOUT1 => backlight brightness
 114  */
 115
 116 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
 117                                    unsigned int power)
 118 {
 119         if (power) {
 120                 gpio_direction_output(S3C64XX_GPF(13), 1);
 121                 gpio_direction_output(S3C64XX_GPF(15), 1);
 122
 123                 /* fire nRESET on power up */
 124                 gpio_direction_output(S3C64XX_GPN(5), 0);
 125                 msleep(10);
 126                 gpio_direction_output(S3C64XX_GPN(5), 1);
 127                 msleep(1);
 128         } else {
 129                 gpio_direction_output(S3C64XX_GPF(15), 0);
 130                 gpio_direction_output(S3C64XX_GPF(13), 0);
 131         }
 132 }
 133
 134 static struct plat_lcd_data smdk6410_lcd_power_data = {
 135         .set_power      = smdk6410_lcd_power_set,
 136 };
 137
 138 static struct platform_device smdk6410_lcd_powerdev = {
 139         .name                   = "platform-lcd",
 140         .dev.parent             = &s3c_device_fb.dev,
 141         .dev.platform_data      = &smdk6410_lcd_power_data,
 142 };
 143
 144 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
 145         /* this is to ensure we use win0 */
 146         .win_mode       = {
 147                 .left_margin    = 8,
 148                 .right_margin   = 13,
 149                 .upper_margin   = 7,
 150                 .lower_margin   = 5,
 151                 .hsync_len      = 3,
 152                 .vsync_len      = 1,
 153                 .xres           = 800,
 154                 .yres           = 480,
 155         },
 156         .max_bpp        = 32,
 157         .default_bpp    = 16,
 158         .virtual_y      = 480 * 2,
 159         .virtual_x      = 800,
 160 };
 161
 162 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
 163 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
 164         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 165         .win[0]         = &smdk6410_fb_win0,
 166         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 167         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 168 };
 169
 170 /*
 171  * Configuring Ethernet on SMDK6410
 172  *
 173  * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
 174  * The constant address below corresponds to nCS1
 175  *
 176  *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
 177  *  2) CFG6 needs to be switched to "LAN9115" side
 178  */
 179
 180 static struct resource smdk6410_smsc911x_resources[] = {
 181         [0] = {
 182                 .start = S3C64XX_PA_XM0CSN1,
 183                 .end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
 184                 .flags = IORESOURCE_MEM,
 185         },
 186         [1] = {
 187                 .start = S3C_EINT(10),
 188                 .end   = S3C_EINT(10),
 189                 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
 190         },
 191 };
 192
 193 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
 194         .irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 195         .irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 196         .flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
 197         .phy_interface = PHY_INTERFACE_MODE_MII,
 198 };
 199
 200
 201 static struct platform_device smdk6410_smsc911x = {
 202         .name          = "smsc911x",
 203         .id            = -1,
 204         .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
 205         .resource      = &smdk6410_smsc911x_resources[0],
 206         .dev = {
 207                 .platform_data = &smdk6410_smsc911x_pdata,
 208         },
 209 };
 210
 211 #ifdef CONFIG_REGULATOR
 212 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
 213         {
 214                 /* WM8580 */
 215                 .supply = "PVDD",
 216                 .dev_name = "0-001b",
 217         },
 218         {
 219                 /* WM8580 */
 220                 .supply = "AVDD",
 221                 .dev_name = "0-001b",
 222         },
 223 };
 224
 225 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
 226         .constraints = {
 227                 .always_on = 1,
 228         },
 229         .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
 230         .consumer_supplies = smdk6410_b_pwr_5v_consumers,
 231 };
 232
 233 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
 234         .supply_name = "B_PWR_5V",
 235         .microvolts = 5000000,
 236         .init_data = &smdk6410_b_pwr_5v_data,
 237         .gpio = -EINVAL,
 238 };
 239
 240 static struct platform_device smdk6410_b_pwr_5v = {
 241         .name          = "reg-fixed-voltage",
 242         .id            = -1,
 243         .dev = {
 244                 .platform_data = &smdk6410_b_pwr_5v_pdata,
 245         },
 246 };
 247 #endif
 248
 249 static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
 250         .setup_gpio     = s3c64xx_ide_setup_gpio,
 251 };
 252
 253 static uint32_t smdk6410_keymap[] __initdata = {
 254         /* KEY(row, col, keycode) */
 255         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 256         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 257         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 258         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 259 };
 260
 261 static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
 262         .keymap         = smdk6410_keymap,
 263         .keymap_size    = ARRAY_SIZE(smdk6410_keymap),
 264 };
 265
 266 static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
 267         .keymap_data    = &smdk6410_keymap_data,
 268         .rows           = 2,
 269         .cols           = 8,
 270 };
 271
 272 static struct map_desc smdk6410_iodesc[] = {};
 273
 274 static struct platform_device *smdk6410_devices[] __initdata = {
 275 #ifdef CONFIG_SMDK6410_SD_CH0
 276         &s3c_device_hsmmc0,
 277 #endif
 278 #ifdef CONFIG_SMDK6410_SD_CH1
 279         &s3c_device_hsmmc1,
 280 #endif
 281         &s3c_device_i2c0,
 282         &s3c_device_i2c1,
 283         &s3c_device_fb,
 284         &s3c_device_ohci,
 285         &s3c_device_usb_hsotg,
 286         &s3c64xx_device_iisv4,
 287         &samsung_device_keypad,
 288
 289 #ifdef CONFIG_REGULATOR
 290         &smdk6410_b_pwr_5v,
 291 #endif
 292         &smdk6410_lcd_powerdev,
 293
 294         &smdk6410_smsc911x,
 295         &s3c_device_adc,
 296         &s3c_device_cfcon,
 297         &s3c_device_rtc,
 298         &s3c_device_ts,
 299         &s3c_device_wdt,
 300 };
 301
 302 #ifdef CONFIG_REGULATOR
 303 /* ARM core */
 304 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
 305         {
 306                 .supply = "vddarm",
 307         }
 308 };
 309
 310 /* VDDARM, BUCK1 on J5 */
 311 static struct regulator_init_data smdk6410_vddarm = {
 312         .constraints = {
 313                 .name = "PVDD_ARM",
 314                 .min_uV = 1000000,
 315                 .max_uV = 1300000,
 316                 .always_on = 1,
 317                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 318         },
 319         .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
 320         .consumer_supplies = smdk6410_vddarm_consumers,
 321 };
 322
 323 /* VDD_INT, BUCK2 on J5 */
 324 static struct regulator_init_data smdk6410_vddint = {
 325         .constraints = {
 326                 .name = "PVDD_INT",
 327                 .min_uV = 1000000,
 328                 .max_uV = 1200000,
 329                 .always_on = 1,
 330                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 331         },
 332 };
 333
 334 /* VDD_HI, LDO3 on J5 */
 335 static struct regulator_init_data smdk6410_vddhi = {
 336         .constraints = {
 337                 .name = "PVDD_HI",
 338                 .always_on = 1,
 339         },
 340 };
 341
 342 /* VDD_PLL, LDO2 on J5 */
 343 static struct regulator_init_data smdk6410_vddpll = {
 344         .constraints = {
 345                 .name = "PVDD_PLL",
 346                 .always_on = 1,
 347         },
 348 };
 349
 350 /* VDD_UH_MMC, LDO5 on J5 */
 351 static struct regulator_init_data smdk6410_vdduh_mmc = {
 352         .constraints = {
 353                 .name = "PVDD_UH/PVDD_MMC",
 354                 .always_on = 1,
 355         },
 356 };
 357
 358 /* VCCM3BT, LDO8 on J5 */
 359 static struct regulator_init_data smdk6410_vccmc3bt = {
 360         .constraints = {
 361                 .name = "PVCCM3BT",
 362                 .always_on = 1,
 363         },
 364 };
 365
 366 /* VCCM2MTV, LDO11 on J5 */
 367 static struct regulator_init_data smdk6410_vccm2mtv = {
 368         .constraints = {
 369                 .name = "PVCCM2MTV",
 370                 .always_on = 1,
 371         },
 372 };
 373
 374 /* VDD_LCD, LDO12 on J5 */
 375 static struct regulator_init_data smdk6410_vddlcd = {
 376         .constraints = {
 377                 .name = "PVDD_LCD",
 378                 .always_on = 1,
 379         },
 380 };
 381
 382 /* VDD_OTGI, LDO9 on J5 */
 383 static struct regulator_init_data smdk6410_vddotgi = {
 384         .constraints = {
 385                 .name = "PVDD_OTGI",
 386                 .always_on = 1,
 387         },
 388 };
 389
 390 /* VDD_OTG, LDO14 on J5 */
 391 static struct regulator_init_data smdk6410_vddotg = {
 392         .constraints = {
 393                 .name = "PVDD_OTG",
 394                 .always_on = 1,
 395         },
 396 };
 397
 398 /* VDD_ALIVE, LDO15 on J5 */
 399 static struct regulator_init_data smdk6410_vddalive = {
 400         .constraints = {
 401                 .name = "PVDD_ALIVE",
 402                 .always_on = 1,
 403         },
 404 };
 405
 406 /* VDD_AUDIO, VLDO_AUDIO on J5 */
 407 static struct regulator_init_data smdk6410_vddaudio = {
 408         .constraints = {
 409                 .name = "PVDD_AUDIO",
 410                 .always_on = 1,
 411         },
 412 };
 413 #endif
 414
 415 #ifdef CONFIG_SMDK6410_WM1190_EV1
 416 /* S3C64xx internal logic & PLL */
 417 static struct regulator_init_data wm8350_dcdc1_data = {
 418         .constraints = {
 419                 .name = "PVDD_INT/PVDD_PLL",
 420                 .min_uV = 1200000,
 421                 .max_uV = 1200000,
 422                 .always_on = 1,
 423                 .apply_uV = 1,
 424         },
 425 };
 426
 427 /* Memory */
 428 static struct regulator_init_data wm8350_dcdc3_data = {
 429         .constraints = {
 430                 .name = "PVDD_MEM",
 431                 .min_uV = 1800000,
 432                 .max_uV = 1800000,
 433                 .always_on = 1,
 434                 .state_mem = {
 435                          .uV = 1800000,
 436                          .mode = REGULATOR_MODE_NORMAL,
 437                          .enabled = 1,
 438                 },
 439                 .initial_state = PM_SUSPEND_MEM,
 440         },
 441 };
 442
 443 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
 444 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
 445         {
 446                 /* WM8580 */
 447                 .supply = "DVDD",
 448                 .dev_name = "0-001b",
 449         },
 450 };
 451
 452 static struct regulator_init_data wm8350_dcdc4_data = {
 453         .constraints = {
 454                 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
 455                 .min_uV = 3000000,
 456                 .max_uV = 3000000,
 457                 .always_on = 1,
 458         },
 459         .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
 460         .consumer_supplies = wm8350_dcdc4_consumers,
 461 };
 462
 463 /* OTGi/1190-EV1 HPVDD & AVDD */
 464 static struct regulator_init_data wm8350_ldo4_data = {
 465         .constraints = {
 466                 .name = "PVDD_OTGI/HPVDD/AVDD",
 467                 .min_uV = 1200000,
 468                 .max_uV = 1200000,
 469                 .apply_uV = 1,
 470                 .always_on = 1,
 471         },
 472 };
 473
 474 static struct {
 475         int regulator;
 476         struct regulator_init_data *initdata;
 477 } wm1190_regulators[] = {
 478         { WM8350_DCDC_1, &wm8350_dcdc1_data },
 479         { WM8350_DCDC_3, &wm8350_dcdc3_data },
 480         { WM8350_DCDC_4, &wm8350_dcdc4_data },
 481         { WM8350_DCDC_6, &smdk6410_vddarm },
 482         { WM8350_LDO_1, &smdk6410_vddalive },
 483         { WM8350_LDO_2, &smdk6410_vddotg },
 484         { WM8350_LDO_3, &smdk6410_vddlcd },
 485         { WM8350_LDO_4, &wm8350_ldo4_data },
 486 };
 487
 488 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
 489 {
 490         int i;
 491
 492         /* Configure the IRQ line */
 493         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 494
 495         /* Instantiate the regulators */
 496         for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
 497                 wm8350_register_regulator(wm8350,
 498                                           wm1190_regulators[i].regulator,
 499                                           wm1190_regulators[i].initdata);
 500
 501         return 0;
 502 }
 503
 504 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
 505         .init = smdk6410_wm8350_init,
 506         .irq_high = 1,
 507         .irq_base = IRQ_BOARD_START,
 508 };
 509 #endif
 510
 511 #ifdef CONFIG_SMDK6410_WM1192_EV1
 512 static struct gpio_led wm1192_pmic_leds[] = {
 513         {
 514                 .name = "PMIC:red:power",
 515                 .gpio = GPIO_BOARD_START + 3,
 516                 .default_state = LEDS_GPIO_DEFSTATE_ON,
 517         },
 518 };
 519
 520 static struct gpio_led_platform_data wm1192_pmic_led = {
 521         .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
 522         .leds = wm1192_pmic_leds,
 523 };
 524
 525 static struct platform_device wm1192_pmic_led_dev = {
 526         .name          = "leds-gpio",
 527         .id            = -1,
 528         .dev = {
 529                 .platform_data = &wm1192_pmic_led,
 530         },
 531 };
 532
 533 static int wm1192_pre_init(struct wm831x *wm831x)
 534 {
 535         int ret;
 536
 537         /* Configure the IRQ line */
 538         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 539
 540         ret = platform_device_register(&wm1192_pmic_led_dev);
 541         if (ret != 0)
 542                 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
 543
 544         return 0;
 545 }
 546
 547 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
 548         .isink = 1,
 549         .max_uA = 27554,
 550 };
 551
 552 static struct regulator_init_data wm1192_dcdc3 = {
 553         .constraints = {
 554                 .name = "PVDD_MEM/PVDD_GPS",
 555                 .always_on = 1,
 556         },
 557 };
 558
 559 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
 560         { .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
 561 };
 562
 563 static struct regulator_init_data wm1192_ldo1 = {
 564         .constraints = {
 565                 .name = "PVDD_LCD/PVDD_EXT",
 566                 .always_on = 1,
 567         },
 568         .consumer_supplies = wm1192_ldo1_consumers,
 569         .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
 570 };
 571
 572 static struct wm831x_status_pdata wm1192_led7_pdata = {
 573         .name = "LED7:green:",
 574 };
 575
 576 static struct wm831x_status_pdata wm1192_led8_pdata = {
 577         .name = "LED8:green:",
 578 };
 579
 580 static struct wm831x_pdata smdk6410_wm1192_pdata = {
 581         .pre_init = wm1192_pre_init,
 582         .irq_base = IRQ_BOARD_START,
 583
 584         .backlight = &wm1192_backlight_pdata,
 585         .dcdc = {
 586                 &smdk6410_vddarm,  /* DCDC1 */
 587                 &smdk6410_vddint,  /* DCDC2 */
 588                 &wm1192_dcdc3,
 589         },
 590         .gpio_base = GPIO_BOARD_START,
 591         .ldo = {
 592                  &wm1192_ldo1,        /* LDO1 */
 593                  &smdk6410_vdduh_mmc, /* LDO2 */
 594                  NULL,                /* LDO3 NC */
 595                  &smdk6410_vddotgi,   /* LDO4 */
 596                  &smdk6410_vddotg,    /* LDO5 */
 597                  &smdk6410_vddhi,     /* LDO6 */
 598                  &smdk6410_vddaudio,  /* LDO7 */
 599                  &smdk6410_vccm2mtv,  /* LDO8 */
 600                  &smdk6410_vddpll,    /* LDO9 */
 601                  &smdk6410_vccmc3bt,  /* LDO10 */
 602                  &smdk6410_vddalive,  /* LDO11 */
 603         },
 604         .status = {
 605                 &wm1192_led7_pdata,
 606                 &wm1192_led8_pdata,
 607         },
 608 };
 609 #endif
 610
 611 static struct i2c_board_info i2c_devs0[] __initdata = {
 612         { I2C_BOARD_INFO("24c08", 0x50), },
 613         { I2C_BOARD_INFO("wm8580", 0x1b), },
 614
 615 #ifdef CONFIG_SMDK6410_WM1192_EV1
 616         { I2C_BOARD_INFO("wm8312", 0x34),
 617           .platform_data = &smdk6410_wm1192_pdata,
 618           .irq = S3C_EINT(12),
 619         },
 620 #endif
 621
 622 #ifdef CONFIG_SMDK6410_WM1190_EV1
 623         { I2C_BOARD_INFO("wm8350", 0x1a),
 624           .platform_data = &smdk6410_wm8350_pdata,
 625           .irq = S3C_EINT(12),
 626         },
 627 #endif
 628 };
 629
 630 static struct i2c_board_info i2c_devs1[] __initdata = {
 631         { I2C_BOARD_INFO("24c128", 0x57), },    /* Samsung S524AD0XD1 */
 632 };
 633
 634 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
 635         .delay                  = 10000,
 636         .presc                  = 49,
 637         .oversampling_shift     = 2,
 638 };
 639
 640 static void __init smdk6410_map_io(void)
 641 {
 642         u32 tmp;
 643
 644         s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
 645         s3c24xx_init_clocks(12000000);
 646         s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
 647
 648         /* set the LCD type */
 649
 650         tmp = __raw_readl(S3C64XX_SPCON);
 651         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 652         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 653         __raw_writel(tmp, S3C64XX_SPCON);
 654
 655         /* remove the lcd bypass */
 656         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 657         tmp &= ~MIFPCON_LCD_BYPASS;
 658         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 659 }
 660
 661 static void __init smdk6410_machine_init(void)
 662 {
 663         u32 cs1;
 664
 665         s3c_i2c0_set_platdata(NULL);
 666         s3c_i2c1_set_platdata(NULL);
 667         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 668
 669         samsung_keypad_set_platdata(&smdk6410_keypad_data);
 670
 671         s3c24xx_ts_set_platdata(&s3c_ts_platform);
 672
 673         /* configure nCS1 width to 16 bits */
 674
 675         cs1 = __raw_readl(S3C64XX_SROM_BW) &
 676                     ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 677         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 678                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 679                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 680                                                    S3C64XX_SROM_BW__NCS1__SHIFT;
 681         __raw_writel(cs1, S3C64XX_SROM_BW);
 682
 683         /* set timing for nCS1 suitable for ethernet chip */
 684
 685         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 686                      (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 687                      (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 688                      (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 689                      (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
 690                      (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 691                      (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 692
 693         gpio_request(S3C64XX_GPN(5), "LCD power");
 694         gpio_request(S3C64XX_GPF(13), "LCD power");
 695         gpio_request(S3C64XX_GPF(15), "LCD power");
 696
 697         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
 698         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 699
 700         s3c_ide_set_platdata(&smdk6410_ide_pdata);
 701
 702         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
 703 }
 704
 705 MACHINE_START(SMDK6410, "SMDK6410")
 706         /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
 707         .phys_io        = S3C_PA_UART & 0xfff00000,
 708         .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
 709         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
 710
 711         .init_irq       = s3c6410_init_irq,
 712         .map_io         = smdk6410_map_io,
 713         .init_machine   = smdk6410_machine_init,
 714         .timer          = &s3c24xx_timer,
 715 MACHINE_END