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GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / arm / mach-pxa / zeus.c
blobf51236f710249f21a001bcd96bb507bb1d7f9784
1 /*
2 * Support for the Arcom ZEUS.
3 *
4 * Copyright (C) 2006 Arcom Control Systems Ltd.
5 *
6 * Loosely based on Arcom's 2.6.16.28.
7 * Maintained by Marc Zyngier <maz@misterjones.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/cpufreq.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/pm.h>
18 #include <linux/gpio.h>
19 #include <linux/serial_8250.h>
20 #include <linux/dm9000.h>
21 #include <linux/mmc/host.h>
22 #include <linux/spi/spi.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
25 #include <linux/mtd/physmap.h>
26 #include <linux/i2c.h>
27 #include <linux/i2c/pca953x.h>
28 #include <linux/apm-emulation.h>
29 #include <linux/can/platform/mcp251x.h>
30
31 #include <asm/mach-types.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/map.h>
34
35 #include <plat/i2c.h>
36
37 #include <mach/pxa2xx-regs.h>
38 #include <mach/regs-uart.h>
39 #include <mach/ohci.h>
40 #include <mach/mmc.h>
41 #include <mach/pxa27x-udc.h>
42 #include <mach/udc.h>
43 #include <mach/pxafb.h>
44 #include <mach/pxa2xx_spi.h>
45 #include <mach/mfp-pxa27x.h>
46 #include <mach/pm.h>
47 #include <mach/audio.h>
48 #include <mach/arcom-pcmcia.h>
49 #include <mach/zeus.h>
50
51 #include "generic.h"
52
53 /*
54 * Interrupt handling
55 */
56
57 static unsigned long zeus_irq_enabled_mask;
58 static const int zeus_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, };
59 static const int zeus_isa_irq_map[] = {
60 0, /* ISA irq #0, invalid */
61 0, /* ISA irq #1, invalid */
62 0, /* ISA irq #2, invalid */
63 1 << 0, /* ISA irq #3 */
64 1 << 1, /* ISA irq #4 */
65 1 << 2, /* ISA irq #5 */
66 1 << 3, /* ISA irq #6 */
67 1 << 4, /* ISA irq #7 */
68 0, /* ISA irq #8, invalid */
69 0, /* ISA irq #9, invalid */
70 1 << 5, /* ISA irq #10 */
71 1 << 6, /* ISA irq #11 */
72 1 << 7, /* ISA irq #12 */
73 };
74
75 static inline int zeus_irq_to_bitmask(unsigned int irq)
76 {
77 return zeus_isa_irq_map[irq - PXA_ISA_IRQ(0)];
78 }
79
80 static inline int zeus_bit_to_irq(int bit)
81 {
82 return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
83 }
84
85 static void zeus_ack_irq(unsigned int irq)
86 {
87 __raw_writew(zeus_irq_to_bitmask(irq), ZEUS_CPLD_ISA_IRQ);
88 }
89
90 static void zeus_mask_irq(unsigned int irq)
91 {
92 zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(irq));
93 }
94
95 static void zeus_unmask_irq(unsigned int irq)
96 {
97 zeus_irq_enabled_mask |= zeus_irq_to_bitmask(irq);
98 }
99
100 static inline unsigned long zeus_irq_pending(void)
101 {
102 return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask;
103 }
104
105 static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
106 {
107 unsigned long pending;
108
109 pending = zeus_irq_pending();
110 do {
111 /* we're in a chained irq handler,
112 * so ack the interrupt by hand */
113 desc->chip->ack(gpio_to_irq(ZEUS_ISA_GPIO));
114
115 if (likely(pending)) {
116 irq = zeus_bit_to_irq(__ffs(pending));
117 generic_handle_irq(irq);
118 }
119 pending = zeus_irq_pending();
120 } while (pending);
121 }
122
123 static struct irq_chip zeus_irq_chip = {
124 .name = "ISA",
125 .ack = zeus_ack_irq,
126 .mask = zeus_mask_irq,
127 .unmask = zeus_unmask_irq,
128 };
129
130 static void __init zeus_init_irq(void)
131 {
132 int level;
133 int isa_irq;
134
135 pxa27x_init_irq();
136
137 /* Peripheral IRQs. It would be nice to move those inside driver
138 configuration, but it is not supported at the moment. */
139 set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
140 set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
141 set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
142 set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO), IRQ_TYPE_EDGE_FALLING);
143 set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
144
145 /* Setup ISA IRQs */
146 for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) {
147 isa_irq = zeus_bit_to_irq(level);
148 set_irq_chip(isa_irq, &zeus_irq_chip);
149 set_irq_handler(isa_irq, handle_edge_irq);
150 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
151 }
152
153 set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
154 set_irq_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
155 }
156
157
158 /*
159 * Platform devices
160 */
161
162 /* Flash */
163 static struct resource zeus_mtd_resources[] = {
164 [0] = { /* NOR Flash (up to 64MB) */
165 .start = ZEUS_FLASH_PHYS,
166 .end = ZEUS_FLASH_PHYS + SZ_64M - 1,
167 .flags = IORESOURCE_MEM,
168 },
169 [1] = { /* SRAM */
170 .start = ZEUS_SRAM_PHYS,
171 .end = ZEUS_SRAM_PHYS + SZ_512K - 1,
172 .flags = IORESOURCE_MEM,
173 },
174 };
175
176 static struct physmap_flash_data zeus_flash_data[] = {
177 [0] = {
178 .width = 2,
179 .parts = NULL,
180 .nr_parts = 0,
181 },
182 };
183
184 static struct platform_device zeus_mtd_devices[] = {
185 [0] = {
186 .name = "physmap-flash",
187 .id = 0,
188 .dev = {
189 .platform_data = &zeus_flash_data[0],
190 },
191 .resource = &zeus_mtd_resources[0],
192 .num_resources = 1,
193 },
194 };
195
196 /* Serial */
197 static struct resource zeus_serial_resources[] = {
198 {
199 .start = 0x10000000,
200 .end = 0x1000000f,
201 .flags = IORESOURCE_MEM,
202 },
203 {
204 .start = 0x10800000,
205 .end = 0x1080000f,
206 .flags = IORESOURCE_MEM,
207 },
208 {
209 .start = 0x11000000,
210 .end = 0x1100000f,
211 .flags = IORESOURCE_MEM,
212 },
213 {
214 .start = 0x40100000,
215 .end = 0x4010001f,
216 .flags = IORESOURCE_MEM,
217 },
218 {
219 .start = 0x40200000,
220 .end = 0x4020001f,
221 .flags = IORESOURCE_MEM,
222 },
223 {
224 .start = 0x40700000,
225 .end = 0x4070001f,
226 .flags = IORESOURCE_MEM,
227 },
228 };
229
230 static struct plat_serial8250_port serial_platform_data[] = {
231 /* External UARTs */
232 { /* COM1 */
233 .mapbase = 0x10000000,
234 .irq = gpio_to_irq(ZEUS_UARTA_GPIO),
235 .irqflags = IRQF_TRIGGER_RISING,
236 .uartclk = 14745600,
237 .regshift = 1,
238 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
239 .iotype = UPIO_MEM,
240 },
241 { /* COM2 */
242 .mapbase = 0x10800000,
243 .irq = gpio_to_irq(ZEUS_UARTB_GPIO),
244 .irqflags = IRQF_TRIGGER_RISING,
245 .uartclk = 14745600,
246 .regshift = 1,
247 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
248 .iotype = UPIO_MEM,
249 },
250 { /* COM3 */
251 .mapbase = 0x11000000,
252 .irq = gpio_to_irq(ZEUS_UARTC_GPIO),
253 .irqflags = IRQF_TRIGGER_RISING,
254 .uartclk = 14745600,
255 .regshift = 1,
256 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
257 .iotype = UPIO_MEM,
258 },
259 { /* COM4 */
260 .mapbase = 0x11800000,
261 .irq = gpio_to_irq(ZEUS_UARTD_GPIO),
262 .irqflags = IRQF_TRIGGER_RISING,
263 .uartclk = 14745600,
264 .regshift = 1,
265 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
266 .iotype = UPIO_MEM,
267 },
268 /* Internal UARTs */
269 { /* FFUART */
270 .membase = (void *)&FFUART,
271 .mapbase = __PREG(FFUART),
272 .irq = IRQ_FFUART,
273 .uartclk = 921600 * 16,
274 .regshift = 2,
275 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
276 .iotype = UPIO_MEM,
277 },
278 { /* BTUART */
279 .membase = (void *)&BTUART,
280 .mapbase = __PREG(BTUART),
281 .irq = IRQ_BTUART,
282 .uartclk = 921600 * 16,
283 .regshift = 2,
284 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
285 .iotype = UPIO_MEM,
286 },
287 { /* STUART */
288 .membase = (void *)&STUART,
289 .mapbase = __PREG(STUART),
290 .irq = IRQ_STUART,
291 .uartclk = 921600 * 16,
292 .regshift = 2,
293 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
294 .iotype = UPIO_MEM,
295 },
296 { },
297 };
298
299 static struct platform_device zeus_serial_device = {
300 .name = "serial8250",
301 .id = PLAT8250_DEV_PLATFORM,
302 .dev = {
303 .platform_data = serial_platform_data,
304 },
305 .num_resources = ARRAY_SIZE(zeus_serial_resources),
306 .resource = zeus_serial_resources,
307 };
308
309 /* Ethernet */
310 static struct resource zeus_dm9k0_resource[] = {
311 [0] = {
312 .start = ZEUS_ETH0_PHYS,
313 .end = ZEUS_ETH0_PHYS + 1,
314 .flags = IORESOURCE_MEM
315 },
316 [1] = {
317 .start = ZEUS_ETH0_PHYS + 2,
318 .end = ZEUS_ETH0_PHYS + 3,
319 .flags = IORESOURCE_MEM
320 },
321 [2] = {
322 .start = gpio_to_irq(ZEUS_ETH0_GPIO),
323 .end = gpio_to_irq(ZEUS_ETH0_GPIO),
324 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
325 },
326 };
327
328 static struct resource zeus_dm9k1_resource[] = {
329 [0] = {
330 .start = ZEUS_ETH1_PHYS,
331 .end = ZEUS_ETH1_PHYS + 1,
332 .flags = IORESOURCE_MEM
333 },
334 [1] = {
335 .start = ZEUS_ETH1_PHYS + 2,
336 .end = ZEUS_ETH1_PHYS + 3,
337 .flags = IORESOURCE_MEM,
338 },
339 [2] = {
340 .start = gpio_to_irq(ZEUS_ETH1_GPIO),
341 .end = gpio_to_irq(ZEUS_ETH1_GPIO),
342 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
343 },
344 };
345
346 static struct dm9000_plat_data zeus_dm9k_platdata = {
347 .flags = DM9000_PLATF_16BITONLY,
348 };
349
350 static struct platform_device zeus_dm9k0_device = {
351 .name = "dm9000",
352 .id = 0,
353 .num_resources = ARRAY_SIZE(zeus_dm9k0_resource),
354 .resource = zeus_dm9k0_resource,
355 .dev = {
356 .platform_data = &zeus_dm9k_platdata,
357 }
358 };
359
360 static struct platform_device zeus_dm9k1_device = {
361 .name = "dm9000",
362 .id = 1,
363 .num_resources = ARRAY_SIZE(zeus_dm9k1_resource),
364 .resource = zeus_dm9k1_resource,
365 .dev = {
366 .platform_data = &zeus_dm9k_platdata,
367 }
368 };
369
370 /* External SRAM */
371 static struct resource zeus_sram_resource = {
372 .start = ZEUS_SRAM_PHYS,
373 .end = ZEUS_SRAM_PHYS + ZEUS_SRAM_SIZE * 2 - 1,
374 .flags = IORESOURCE_MEM,
375 };
376
377 static struct platform_device zeus_sram_device = {
378 .name = "pxa2xx-8bit-sram",
379 .id = 0,
380 .num_resources = 1,
381 .resource = &zeus_sram_resource,
382 };
383
384 /* SPI interface on SSP3 */
385 static struct pxa2xx_spi_master pxa2xx_spi_ssp3_master_info = {
386 .num_chipselect = 1,
387 .enable_dma = 1,
388 };
389
390 /* CAN bus on SPI */
391 static int zeus_mcp2515_setup(struct spi_device *sdev)
392 {
393 int err;
394
395 err = gpio_request(ZEUS_CAN_SHDN_GPIO, "CAN shutdown");
396 if (err)
397 return err;
398
399 err = gpio_direction_output(ZEUS_CAN_SHDN_GPIO, 1);
400 if (err) {
401 gpio_free(ZEUS_CAN_SHDN_GPIO);
402 return err;
403 }
404
405 return 0;
406 }
407
408 static int zeus_mcp2515_transceiver_enable(int enable)
409 {
410 gpio_set_value(ZEUS_CAN_SHDN_GPIO, !enable);
411 return 0;
412 }
413
414 static struct mcp251x_platform_data zeus_mcp2515_pdata = {
415 .oscillator_frequency = 16*1000*1000,
416 .board_specific_setup = zeus_mcp2515_setup,
417 .power_enable = zeus_mcp2515_transceiver_enable,
418 };
419
420 static struct spi_board_info zeus_spi_board_info[] = {
421 [0] = {
422 .modalias = "mcp2515",
423 .platform_data = &zeus_mcp2515_pdata,
424 .irq = gpio_to_irq(ZEUS_CAN_GPIO),
425 .max_speed_hz = 1*1000*1000,
426 .bus_num = 3,
427 .mode = SPI_MODE_0,
428 .chip_select = 0,
429 },
430 };
431
432 /* Leds */
433 static struct gpio_led zeus_leds[] = {
434 [0] = {
435 .name = "zeus:yellow:1",
436 .default_trigger = "heartbeat",
437 .gpio = ZEUS_EXT0_GPIO(3),
438 .active_low = 1,
439 },
440 [1] = {
441 .name = "zeus:yellow:2",
442 .default_trigger = "default-on",
443 .gpio = ZEUS_EXT0_GPIO(4),
444 .active_low = 1,
445 },
446 [2] = {
447 .name = "zeus:yellow:3",
448 .default_trigger = "default-on",
449 .gpio = ZEUS_EXT0_GPIO(5),
450 .active_low = 1,
451 },
452 };
453
454 static struct gpio_led_platform_data zeus_leds_info = {
455 .leds = zeus_leds,
456 .num_leds = ARRAY_SIZE(zeus_leds),
457 };
458
459 static struct platform_device zeus_leds_device = {
460 .name = "leds-gpio",
461 .id = -1,
462 .dev = {
463 .platform_data = &zeus_leds_info,
464 },
465 };
466
467 static void zeus_cf_reset(int state)
468 {
469 u16 cpld_state = __raw_readw(ZEUS_CPLD_CONTROL);
470
471 if (state)
472 cpld_state |= ZEUS_CPLD_CONTROL_CF_RST;
473 else
474 cpld_state &= ~ZEUS_CPLD_CONTROL_CF_RST;
475
476 __raw_writew(cpld_state, ZEUS_CPLD_CONTROL);
477 }
478
479 static struct arcom_pcmcia_pdata zeus_pcmcia_info = {
480 .cd_gpio = ZEUS_CF_CD_GPIO,
481 .rdy_gpio = ZEUS_CF_RDY_GPIO,
482 .pwr_gpio = ZEUS_CF_PWEN_GPIO,
483 .reset = zeus_cf_reset,
484 };
485
486 static struct platform_device zeus_pcmcia_device = {
487 .name = "zeus-pcmcia",
488 .id = -1,
489 .dev = {
490 .platform_data = &zeus_pcmcia_info,
491 },
492 };
493
494 static struct resource zeus_max6369_resource = {
495 .start = ZEUS_CPLD_EXTWDOG_PHYS,
496 .end = ZEUS_CPLD_EXTWDOG_PHYS,
497 .flags = IORESOURCE_MEM,
498 };
499
500 struct platform_device zeus_max6369_device = {
501 .name = "max6369_wdt",
502 .id = -1,
503 .resource = &zeus_max6369_resource,
504 .num_resources = 1,
505 };
506
507 static struct platform_device *zeus_devices[] __initdata = {
508 &zeus_serial_device,
509 &zeus_mtd_devices[0],
510 &zeus_dm9k0_device,
511 &zeus_dm9k1_device,
512 &zeus_sram_device,
513 &zeus_leds_device,
514 &zeus_pcmcia_device,
515 &zeus_max6369_device,
516 };
517
518 /* AC'97 */
519 static pxa2xx_audio_ops_t zeus_ac97_info = {
520 .reset_gpio = 95,
521 };
522
523
524 /*
525 * USB host
526 */
527
528 static int zeus_ohci_init(struct device *dev)
529 {
530 int err;
531
532 /* Switch on port 2. */
533 if ((err = gpio_request(ZEUS_USB2_PWREN_GPIO, "USB2_PWREN"))) {
534 dev_err(dev, "Can't request USB2_PWREN\n");
535 return err;
536 }
537
538 if ((err = gpio_direction_output(ZEUS_USB2_PWREN_GPIO, 1))) {
539 gpio_free(ZEUS_USB2_PWREN_GPIO);
540 dev_err(dev, "Can't enable USB2_PWREN\n");
541 return err;
542 }
543
544 /* Port 2 is shared between host and client interface. */
545 UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
546
547 return 0;
548 }
549
550 static void zeus_ohci_exit(struct device *dev)
551 {
552 /* Power-off port 2 */
553 gpio_direction_output(ZEUS_USB2_PWREN_GPIO, 0);
554 gpio_free(ZEUS_USB2_PWREN_GPIO);
555 }
556
557 static struct pxaohci_platform_data zeus_ohci_platform_data = {
558 .port_mode = PMM_NPS_MODE,
559 /* Clear Power Control Polarity Low and set Power Sense
560 * Polarity Low. Supply power to USB ports. */
561 .flags = ENABLE_PORT_ALL | POWER_SENSE_LOW,
562 .init = zeus_ohci_init,
563 .exit = zeus_ohci_exit,
564 };
565
566 /*
567 * Flat Panel
568 */
569
570 static void zeus_lcd_power(int on, struct fb_var_screeninfo *si)
571 {
572 gpio_set_value(ZEUS_LCD_EN_GPIO, on);
573 }
574
575 static void zeus_backlight_power(int on)
576 {
577 gpio_set_value(ZEUS_BKLEN_GPIO, on);
578 }
579
580 static int zeus_setup_fb_gpios(void)
581 {
582 int err;
583
584 if ((err = gpio_request(ZEUS_LCD_EN_GPIO, "LCD_EN")))
585 goto out_err;
586
587 if ((err = gpio_direction_output(ZEUS_LCD_EN_GPIO, 0)))
588 goto out_err_lcd;
589
590 if ((err = gpio_request(ZEUS_BKLEN_GPIO, "BKLEN")))
591 goto out_err_lcd;
592
593 if ((err = gpio_direction_output(ZEUS_BKLEN_GPIO, 0)))
594 goto out_err_bkl;
595
596 return 0;
597
598 out_err_bkl:
599 gpio_free(ZEUS_BKLEN_GPIO);
600 out_err_lcd:
601 gpio_free(ZEUS_LCD_EN_GPIO);
602 out_err:
603 return err;
604 }
605
606 static struct pxafb_mode_info zeus_fb_mode_info[] = {
607 {
608 .pixclock = 39722,
609
610 .xres = 640,
611 .yres = 480,
612
613 .bpp = 16,
614
615 .hsync_len = 63,
616 .left_margin = 16,
617 .right_margin = 81,
618
619 .vsync_len = 2,
620 .upper_margin = 12,
621 .lower_margin = 31,
622
623 .sync = 0,
624 },
625 };
626
627 static struct pxafb_mach_info zeus_fb_info = {
628 .modes = zeus_fb_mode_info,
629 .num_modes = 1,
630 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
631 .pxafb_lcd_power = zeus_lcd_power,
632 .pxafb_backlight_power = zeus_backlight_power,
633 };
634
635 /*
636 * MMC/SD Device
637 *
638 * The card detect interrupt isn't debounced so we delay it by 250ms
639 * to give the card a chance to fully insert/eject.
640 */
641
642 static struct pxamci_platform_data zeus_mci_platform_data = {
643 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
644 .detect_delay_ms = 250,
645 .gpio_card_detect = ZEUS_MMC_CD_GPIO,
646 .gpio_card_ro = ZEUS_MMC_WP_GPIO,
647 .gpio_card_ro_invert = 1,
648 .gpio_power = -1
649 };
650
651 /*
652 * USB Device Controller
653 */
654 static void zeus_udc_command(int cmd)
655 {
656 switch (cmd) {
657 case PXA2XX_UDC_CMD_DISCONNECT:
658 pr_info("zeus: disconnecting USB client\n");
659 UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
660 break;
661
662 case PXA2XX_UDC_CMD_CONNECT:
663 pr_info("zeus: connecting USB client\n");
664 UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
665 break;
666 }
667 }
668
669 static struct pxa2xx_udc_mach_info zeus_udc_info = {
670 .udc_command = zeus_udc_command,
671 };
672
673 #ifdef CONFIG_PM
674 static void zeus_power_off(void)
675 {
676 local_irq_disable();
677 pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP);
678 }
679 #else
680 #define zeus_power_off NULL
681 #endif
682
683 #ifdef CONFIG_APM_EMULATION
684 static void zeus_get_power_status(struct apm_power_info *info)
685 {
686 /* Power supply is always present */
687 info->ac_line_status = APM_AC_ONLINE;
688 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
689 info->battery_flag = APM_BATTERY_FLAG_NOT_PRESENT;
690 }
691
692 static inline void zeus_setup_apm(void)
693 {
694 apm_get_power_status = zeus_get_power_status;
695 }
696 #else
697 static inline void zeus_setup_apm(void)
698 {
699 }
700 #endif
701
702 static int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio,
703 unsigned ngpio, void *context)
704 {
705 int i;
706 u8 pcb_info = 0;
707
708 for (i = 0; i < 8; i++) {
709 int pcb_bit = gpio + i + 8;
710
711 if (gpio_request(pcb_bit, "pcb info")) {
712 dev_err(&client->dev, "Can't request pcb info %d\n", i);
713 continue;
714 }
715
716 if (gpio_direction_input(pcb_bit)) {
717 dev_err(&client->dev, "Can't read pcb info %d\n", i);
718 gpio_free(pcb_bit);
719 continue;
720 }
721
722 pcb_info |= !!gpio_get_value(pcb_bit) << i;
723
724 gpio_free(pcb_bit);
725 }
726
727 dev_info(&client->dev, "Zeus PCB version %d issue %d\n",
728 pcb_info >> 4, pcb_info & 0xf);
729
730 return 0;
731 }
732
733 static struct pca953x_platform_data zeus_pca953x_pdata[] = {
734 [0] = { .gpio_base = ZEUS_EXT0_GPIO_BASE, },
735 [1] = {
736 .gpio_base = ZEUS_EXT1_GPIO_BASE,
737 .setup = zeus_get_pcb_info,
738 },
739 [2] = { .gpio_base = ZEUS_USER_GPIO_BASE, },
740 };
741
742 static struct i2c_board_info __initdata zeus_i2c_devices[] = {
743 {
744 I2C_BOARD_INFO("pca9535", 0x21),
745 .platform_data = &zeus_pca953x_pdata[0],
746 },
747 {
748 I2C_BOARD_INFO("pca9535", 0x22),
749 .platform_data = &zeus_pca953x_pdata[1],
750 },
751 {
752 I2C_BOARD_INFO("pca9535", 0x20),
753 .platform_data = &zeus_pca953x_pdata[2],
754 .irq = gpio_to_irq(ZEUS_EXTGPIO_GPIO),
755 },
756 { I2C_BOARD_INFO("lm75a", 0x48) },
757 { I2C_BOARD_INFO("24c01", 0x50) },
758 { I2C_BOARD_INFO("isl1208", 0x6f) },
759 };
760
761 static mfp_cfg_t zeus_pin_config[] __initdata = {
762 /* AC97 */
763 GPIO28_AC97_BITCLK,
764 GPIO29_AC97_SDATA_IN_0,
765 GPIO30_AC97_SDATA_OUT,
766 GPIO31_AC97_SYNC,
767
768 GPIO15_nCS_1,
769 GPIO78_nCS_2,
770 GPIO80_nCS_4,
771 GPIO33_nCS_5,
772
773 GPIO22_GPIO,
774 GPIO32_MMC_CLK,
775 GPIO92_MMC_DAT_0,
776 GPIO109_MMC_DAT_1,
777 GPIO110_MMC_DAT_2,
778 GPIO111_MMC_DAT_3,
779 GPIO112_MMC_CMD,
780
781 GPIO88_USBH1_PWR,
782 GPIO89_USBH1_PEN,
783 GPIO119_USBH2_PWR,
784 GPIO120_USBH2_PEN,
785
786 GPIO86_LCD_LDD_16,
787 GPIO87_LCD_LDD_17,
788
789 GPIO102_GPIO,
790 GPIO104_CIF_DD_2,
791 GPIO105_CIF_DD_1,
792
793 GPIO81_SSP3_TXD,
794 GPIO82_SSP3_RXD,
795 GPIO83_SSP3_SFRM,
796 GPIO84_SSP3_SCLK,
797
798 GPIO48_nPOE,
799 GPIO49_nPWE,
800 GPIO50_nPIOR,
801 GPIO51_nPIOW,
802 GPIO85_nPCE_1,
803 GPIO54_nPCE_2,
804 GPIO79_PSKTSEL,
805 GPIO55_nPREG,
806 GPIO56_nPWAIT,
807 GPIO57_nIOIS16,
808 GPIO36_GPIO, /* CF CD */
809 GPIO97_GPIO, /* CF PWREN */
810 GPIO99_GPIO, /* CF RDY */
811 };
812
813 /*
814 * DM9k MSCx settings: SRAM, 16 bits
815 * 17 cycles delay first access
816 * 5 cycles delay next access
817 * 13 cycles recovery time
818 * faster device
819 */
820 #define DM9K_MSC_VALUE 0xe4c9
821
822 static void __init zeus_init(void)
823 {
824 u16 dm9000_msc = DM9K_MSC_VALUE;
825
826 system_rev = __raw_readw(ZEUS_CPLD_VERSION);
827 pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
828
829 /* Fix timings for dm9000s (CS1/CS2)*/
830 MSC0 = (MSC0 & 0xffff) | (dm9000_msc << 16);
831 MSC1 = (MSC1 & 0xffff0000) | dm9000_msc;
832
833 pm_power_off = zeus_power_off;
834 zeus_setup_apm();
835
836 pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config));
837
838 platform_add_devices(zeus_devices, ARRAY_SIZE(zeus_devices));
839
840 pxa_set_ohci_info(&zeus_ohci_platform_data);
841
842 if (zeus_setup_fb_gpios())
843 pr_err("Failed to setup fb gpios\n");
844 else
845 set_pxa_fb_info(&zeus_fb_info);
846
847 pxa_set_mci_info(&zeus_mci_platform_data);
848 pxa_set_udc_info(&zeus_udc_info);
849 pxa_set_ac97_info(&zeus_ac97_info);
850 pxa_set_i2c_info(NULL);
851 i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
852 pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info);
853 spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));
854 }
855
856 static struct map_desc zeus_io_desc[] __initdata = {
857 {
858 .virtual = ZEUS_CPLD_VERSION,
859 .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS),
860 .length = 0x1000,
861 .type = MT_DEVICE,
862 },
863 {
864 .virtual = ZEUS_CPLD_ISA_IRQ,
865 .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS),
866 .length = 0x1000,
867 .type = MT_DEVICE,
868 },
869 {
870 .virtual = ZEUS_CPLD_CONTROL,
871 .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS),
872 .length = 0x1000,
873 .type = MT_DEVICE,
874 },
875 {
876 .virtual = ZEUS_PC104IO,
877 .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS),
878 .length = 0x00800000,
879 .type = MT_DEVICE,
880 },
881 };
882
883 static void __init zeus_map_io(void)
884 {
885 pxa_map_io();
886
887 iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc));
888
889 /* Clear PSPR to ensure a full restart on wake-up. */
890 PMCR = PSPR = 0;
891
892 /* enable internal 32.768Khz oscillator (ignore OSCC_OOK) */
893 OSCC |= OSCC_OON;
894
895 /* Some clock cycles later (from OSCC_ON), programme PCFR (OPDE...).
896 * float chip selects and PCMCIA */
897 PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP;
898 }
899
900 MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
901 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
902 .phys_io = 0x40000000,
903 .io_pg_offst = ((io_p2v(0x40000000) >> 18) & 0xfffc),
904 .boot_params = 0xa0000100,
905 .map_io = zeus_map_io,
906 .init_irq = zeus_init_irq,
907 .timer = &pxa_timer,
908 .init_machine = zeus_init,
909 MACHINE_END
Tomato firmware and modifications.