release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pnx4008/include/mach/dma.h

   1 /*
   2  *  arch/arm/mach-pnx4008/include/mach/dma.h
   3  *
   4  *  PNX4008 DMA header file
   5  *
   6  *  Author:     Vitaly Wool
   7  *  Copyright:  MontaVista Software Inc. (c) 2005
   8  *
   9  *  This program is free software; you can redistribute it and/or modify
  10  *  it under the terms of the GNU General Public License version 2 as
  11  *  published by the Free Software Foundation.
  12  */
  13
  14 #ifndef __ASM_ARCH_DMA_H
  15 #define __ASM_ARCH_DMA_H
  16
  17 #include "platform.h"
  18
  19 #define MAX_DMA_CHANNELS        8
  20
  21 #define DMAC_BASE               IO_ADDRESS(PNX4008_DMA_CONFIG_BASE)
  22 #define DMAC_INT_STAT           (DMAC_BASE + 0x0000)
  23 #define DMAC_INT_TC_STAT        (DMAC_BASE + 0x0004)
  24 #define DMAC_INT_TC_CLEAR       (DMAC_BASE + 0x0008)
  25 #define DMAC_INT_ERR_STAT       (DMAC_BASE + 0x000c)
  26 #define DMAC_INT_ERR_CLEAR      (DMAC_BASE + 0x0010)
  27 #define DMAC_SOFT_SREQ          (DMAC_BASE + 0x0024)
  28 #define DMAC_CONFIG             (DMAC_BASE + 0x0030)
  29 #define DMAC_Cx_SRC_ADDR(c)     (DMAC_BASE + 0x0100 + (c) * 0x20)
  30 #define DMAC_Cx_DEST_ADDR(c)    (DMAC_BASE + 0x0104 + (c) * 0x20)
  31 #define DMAC_Cx_LLI(c)          (DMAC_BASE + 0x0108 + (c) * 0x20)
  32 #define DMAC_Cx_CONTROL(c)      (DMAC_BASE + 0x010c + (c) * 0x20)
  33 #define DMAC_Cx_CONFIG(c)       (DMAC_BASE + 0x0110 + (c) * 0x20)
  34
  35 enum {
  36         WIDTH_BYTE = 0,
  37         WIDTH_HWORD,
  38         WIDTH_WORD
  39 };
  40
  41 enum {
  42         FC_MEM2MEM_DMA,
  43         FC_MEM2PER_DMA,
  44         FC_PER2MEM_DMA,
  45         FC_PER2PER_DMA,
  46         FC_PER2PER_DPER,
  47         FC_MEM2PER_PER,
  48         FC_PER2MEM_PER,
  49         FC_PER2PER_SPER
  50 };
  51
  52 enum {
  53         DMA_INT_UNKNOWN = 0,
  54         DMA_ERR_INT = 1,
  55         DMA_TC_INT = 2,
  56 };
  57
  58 enum {
  59         DMA_BUFFER_ALLOCATED = 1,
  60         DMA_HAS_LL = 2,
  61 };
  62
  63 enum {
  64         PER_CAM_DMA_1 = 0,
  65         PER_NDF_FLASH = 1,
  66         PER_MBX_SLAVE_FIFO = 2,
  67         PER_SPI2_REC_XMIT = 3,
  68         PER_MS_SD_RX_XMIT = 4,
  69         PER_HS_UART_1_XMIT = 5,
  70         PER_HS_UART_1_RX = 6,
  71         PER_HS_UART_2_XMIT = 7,
  72         PER_HS_UART_2_RX = 8,
  73         PER_HS_UART_7_XMIT = 9,
  74         PER_HS_UART_7_RX = 10,
  75         PER_SPI1_REC_XMIT = 11,
  76         PER_MLC_NDF_SREC = 12,
  77         PER_CAM_DMA_2 = 13,
  78         PER_PRNG_INFIFO = 14,
  79         PER_PRNG_OUTFIFO = 15,
  80 };
  81
  82 struct pnx4008_dma_ch_ctrl {
  83         int tc_mask;
  84         int cacheable;
  85         int bufferable;
  86         int priv_mode;
  87         int di;
  88         int si;
  89         int dest_ahb1;
  90         int src_ahb1;
  91         int dwidth;
  92         int swidth;
  93         int dbsize;
  94         int sbsize;
  95         int tr_size;
  96 };
  97
  98 struct pnx4008_dma_ch_config {
  99         int halt;
 100         int active;
 101         int lock;
 102         int itc;
 103         int ie;
 104         int flow_cntrl;
 105         int dest_per;
 106         int src_per;
 107 };
 108
 109 struct pnx4008_dma_ll {
 110         unsigned long src_addr;
 111         unsigned long dest_addr;
 112         u32 next_dma;
 113         unsigned long ch_ctrl;
 114         struct pnx4008_dma_ll *next;
 115         int flags;
 116         void *alloc_data;
 117         int (*free) (void *);
 118 };
 119
 120 struct pnx4008_dma_config {
 121         int is_ll;
 122         unsigned long src_addr;
 123         unsigned long dest_addr;
 124         unsigned long ch_ctrl;
 125         unsigned long ch_cfg;
 126         struct pnx4008_dma_ll *ll;
 127         u32 ll_dma;
 128         int flags;
 129         void *alloc_data;
 130         int (*free) (void *);
 131 };
 132
 133 extern struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t *);
 134 extern void pnx4008_free_ll_entry(struct pnx4008_dma_ll *, dma_addr_t);
 135 extern void pnx4008_free_ll(u32 ll_dma, struct pnx4008_dma_ll *);
 136
 137 extern int pnx4008_request_channel(char *, int,
 138                                    void (*)(int, int, void *),
 139                                    void *);
 140 extern void pnx4008_free_channel(int);
 141 extern int pnx4008_config_dma(int, int, int);
 142 extern int pnx4008_dma_pack_control(const struct pnx4008_dma_ch_ctrl *,
 143                                     unsigned long *);
 144 extern int pnx4008_dma_parse_control(unsigned long,
 145                                      struct pnx4008_dma_ch_ctrl *);
 146 extern int pnx4008_dma_pack_config(const struct pnx4008_dma_ch_config *,
 147                                    unsigned long *);
 148 extern int pnx4008_dma_parse_config(unsigned long,
 149                                     struct pnx4008_dma_ch_config *);
 150 extern int pnx4008_config_channel(int, struct pnx4008_dma_config *);
 151 extern int pnx4008_channel_get_config(int, struct pnx4008_dma_config *);
 152 extern int pnx4008_dma_ch_enable(int);
 153 extern int pnx4008_dma_ch_disable(int);
 154 extern int pnx4008_dma_ch_enabled(int);
 155 extern void pnx4008_dma_split_head_entry(struct pnx4008_dma_config *,
 156                                          struct pnx4008_dma_ch_ctrl *);
 157 extern void pnx4008_dma_split_ll_entry(struct pnx4008_dma_ll *,
 158                                        struct pnx4008_dma_ch_ctrl *);
 159
 160 #endif                          /* _ASM_ARCH_DMA_H */