release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-nuc93x/include/mach/regs-clock.h

   1 /*
   2  * arch/arm/mach-nuc93x/include/mach/regs-clock.h
   3  *
   4  * Copyright (c) 2008 Nuvoton technology corporation.
   5  *
   6  * Wan ZongShun <mcuos.com@gmail.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation;version 2 of the License.
  11  *
  12  */
  13
  14 #ifndef __ASM_ARCH_REGS_CLOCK_H
  15 #define __ASM_ARCH_REGS_CLOCK_H
  16
  17 /* Clock Control Registers  */
  18 #define CLK_BA          NUC93X_VA_CLKPWR
  19 #define REG_CLKEN       (CLK_BA + 0x00)
  20 #define REG_CLKSEL      (CLK_BA + 0x04)
  21 #define REG_CLKDIV      (CLK_BA + 0x08)
  22 #define REG_PLLCON0     (CLK_BA + 0x0C)
  23 #define REG_PLLCON1     (CLK_BA + 0x10)
  24 #define REG_PMCON       (CLK_BA + 0x14)
  25 #define REG_IRQWAKECON  (CLK_BA + 0x18)
  26 #define REG_IRQWAKEFLAG (CLK_BA + 0x1C)
  27 #define REG_IPSRST      (CLK_BA + 0x20)
  28 #define REG_CLKEN1      (CLK_BA + 0x24)
  29 #define REG_CLKDIV1     (CLK_BA + 0x28)
  30
  31 /* Define PLL freq setting */
  32 #define PLL_DISABLE             0x12B63
  33 #define PLL_66MHZ               0x2B63
  34 #define PLL_100MHZ              0x4F64
  35 #define PLL_120MHZ              0x4F63
  36 #define PLL_166MHZ              0x4124
  37 #define PLL_200MHZ              0x4F24
  38
  39 /* Define AHB:CPUFREQ ratio */
  40 #define AHB_CPUCLK_1_1          0x00
  41 #define AHB_CPUCLK_1_2          0x01
  42 #define AHB_CPUCLK_1_4          0x02
  43 #define AHB_CPUCLK_1_8          0x03
  44
  45 /* Define APB:AHB ratio */
  46 #define APB_AHB_1_2             0x01
  47 #define APB_AHB_1_4             0x02
  48 #define APB_AHB_1_8             0x03
  49
  50 /* Define clock skew */
  51 #define DEFAULTSKEW             0x48
  52
  53 #endif /*  __ASM_ARCH_REGS_CLOCK_H */