release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h

   1 /*
   2  * Copyright (C) 2007 Google, Inc.
   3  * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
   4  * Author: Brian Swetland <swetland@google.com>
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  *
  16  * The MSM peripherals are spread all over across 768MB of physical
  17  * space, which makes just having a simple IO_ADDRESS macro to slide
  18  * them into the right virtual location rough.  Instead, we will
  19  * provide a master phys->virt mapping for peripherals here.
  20  *
  21  */
  22
  23 #ifndef __ASM_ARCH_MSM_IOMAP_7X30_H
  24 #define __ASM_ARCH_MSM_IOMAP_7X30_H
  25
  26 /* Physical base address and size of peripherals.
  27  * Ordered by the virtual base addresses they will be mapped at.
  28  *
  29  * MSM_VIC_BASE must be an value that can be loaded via a "mov"
  30  * instruction, otherwise entry-macro.S will not compile.
  31  *
  32  * If you add or remove entries here, you'll want to edit the
  33  * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
  34  * changes.
  35  *
  36  */
  37
  38 #define MSM_VIC_BASE          IOMEM(0xE0000000)
  39 #define MSM_VIC_PHYS          0xC0080000
  40 #define MSM_VIC_SIZE          SZ_4K
  41
  42 #define MSM_CSR_BASE          IOMEM(0xE0001000)
  43 #define MSM_CSR_PHYS          0xC0100000
  44 #define MSM_CSR_SIZE          SZ_4K
  45
  46 #define MSM_TMR_PHYS          MSM_CSR_PHYS
  47 #define MSM_TMR_BASE          MSM_CSR_BASE
  48 #define MSM_TMR_SIZE          SZ_4K
  49
  50 #define MSM_GPT_BASE          (MSM_TMR_BASE + 0x4)
  51 #define MSM_DGT_BASE          (MSM_TMR_BASE + 0x24)
  52
  53 #define MSM_DMOV_BASE         IOMEM(0xE0002000)
  54 #define MSM_DMOV_PHYS         0xAC400000
  55 #define MSM_DMOV_SIZE         SZ_4K
  56
  57 #define MSM_GPIO1_BASE        IOMEM(0xE0003000)
  58 #define MSM_GPIO1_PHYS        0xAC001000
  59 #define MSM_GPIO1_SIZE        SZ_4K
  60
  61 #define MSM_GPIO2_BASE        IOMEM(0xE0004000)
  62 #define MSM_GPIO2_PHYS        0xAC101000
  63 #define MSM_GPIO2_SIZE        SZ_4K
  64
  65 #define MSM_CLK_CTL_BASE      IOMEM(0xE0005000)
  66 #define MSM_CLK_CTL_PHYS      0xAB800000
  67 #define MSM_CLK_CTL_SIZE      SZ_4K
  68
  69 #define MSM_CLK_CTL_SH2_BASE  IOMEM(0xE0006000)
  70 #define MSM_CLK_CTL_SH2_PHYS  0xABA01000
  71 #define MSM_CLK_CTL_SH2_SIZE  SZ_4K
  72
  73 #define MSM_ACC_BASE          IOMEM(0xE0007000)
  74 #define MSM_ACC_PHYS          0xC0101000
  75 #define MSM_ACC_SIZE          SZ_4K
  76
  77 #define MSM_SAW_BASE          IOMEM(0xE0008000)
  78 #define MSM_SAW_PHYS          0xC0102000
  79 #define MSM_SAW_SIZE          SZ_4K
  80
  81 #define MSM_GCC_BASE          IOMEM(0xE0009000)
  82 #define MSM_GCC_PHYS          0xC0182000
  83 #define MSM_GCC_SIZE          SZ_4K
  84
  85 #define MSM_TCSR_BASE         IOMEM(0xE000A000)
  86 #define MSM_TCSR_PHYS         0xAB600000
  87 #define MSM_TCSR_SIZE         SZ_4K
  88
  89 #define MSM_SHARED_RAM_BASE   IOMEM(0xE0100000)
  90 #define MSM_SHARED_RAM_PHYS   0x00100000
  91 #define MSM_SHARED_RAM_SIZE   SZ_1M
  92
  93 #define MSM_UART1_PHYS        0xACA00000
  94 #define MSM_UART1_SIZE        SZ_4K
  95
  96 #define MSM_UART2_PHYS        0xACB00000
  97 #define MSM_UART2_SIZE        SZ_4K
  98
  99 #define MSM_UART3_PHYS        0xACC00000
 100 #define MSM_UART3_SIZE        SZ_4K
 101
 102 #ifdef CONFIG_MSM_DEBUG_UART
 103 #define MSM_DEBUG_UART_BASE   0xE1000000
 104 #if CONFIG_MSM_DEBUG_UART == 1
 105 #define MSM_DEBUG_UART_PHYS   MSM_UART1_PHYS
 106 #elif CONFIG_MSM_DEBUG_UART == 2
 107 #define MSM_DEBUG_UART_PHYS   MSM_UART2_PHYS
 108 #elif CONFIG_MSM_DEBUG_UART == 3
 109 #define MSM_DEBUG_UART_PHYS   MSM_UART3_PHYS
 110 #endif
 111 #define MSM_DEBUG_UART_SIZE   SZ_4K
 112 #endif
 113
 114 #define MSM_MDC_BASE          IOMEM(0xE0200000)
 115 #define MSM_MDC_PHYS          0xAA500000
 116 #define MSM_MDC_SIZE          SZ_1M
 117
 118 #define MSM_AD5_BASE          IOMEM(0xE0300000)
 119 #define MSM_AD5_PHYS          0xA7000000
 120 #define MSM_AD5_SIZE          (SZ_1M*13)
 121
 122 #endif