release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-lh7a40x/include/mach/entry-macro.S

   1 /*
   2  * arch/arm/mach-lh7a40x/include/mach/entry-macro.S
   3  *
   4  * Low-level IRQ helper macros for LH7A40x platforms
   5  *
   6  * This file is licensed under  the terms of the GNU General Public
   7  * License version 2. This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10 #include <mach/hardware.h>
  11 #include <mach/irqs.h>
  12
  13
  14 #if defined(CONFIG_ARCH_LH7A400) && defined(CONFIG_ARCH_LH7A404)
  15
  16                 .macro  disable_fiq
  17                 .endm
  18
  19                 .macro  get_irqnr_preamble, base, tmp
  20                 .endm
  21
  22                 .macro  arch_ret_to_user, tmp1, tmp2
  23                 .endm
  24
  25                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
  26
  27 branch_irq_lh7a400: b 1000f
  28
  29 @ Implementation of the LH7A404 get_irqnr_and_base.
  30
  31                 mov     \irqnr, #0                      @ VIC1 irq base
  32                 mov     \base, #io_p2v(0x80000000)      @ APB registers
  33                 add     \base, \base, #0x8000
  34                 ldr     \tmp, [\base, #0x0030]          @ VIC1_VECTADDR
  35                 tst     \tmp, #VA_VECTORED              @ Direct vectored
  36                 bne     1002f
  37                 tst     \tmp, #VA_VIC1DEFAULT           @ Default vectored VIC1
  38                 ldrne   \irqstat, [\base, #0]           @ VIC1_IRQSTATUS
  39                 bne     1001f
  40                 add     \base, \base, #(0xa000 - 0x8000)
  41                 ldr     \tmp, [\base, #0x0030]          @ VIC2_VECTADDR
  42                 tst     \tmp, #VA_VECTORED              @ Direct vectored
  43                 bne     1002f
  44                 ldr     \irqstat, [\base, #0]           @ VIC2_IRQSTATUS
  45                 mov     \irqnr, #32                     @ VIC2 irq base
  46
  47 1001:           movs    \irqstat, \irqstat, lsr #1      @ Shift into carry
  48                 bcs     1008f                           @ Bit set; irq found
  49                 add     \irqnr, \irqnr, #1
  50                 bne     1001b                           @ Until no bits
  51                 b       1009f                           @ Nothing?  Hmm.
  52 1002:           and     \irqnr, \tmp, #0x3f             @ Mask for valid bits
  53 1008:           movs    \irqstat, #1                    @ Force !Z
  54                 str     \tmp, [\base, #0x0030]          @ Clear vector
  55                 b       1009f
  56
  57 @ Implementation of the LH7A400 get_irqnr_and_base.
  58
  59 1000:           mov     \irqnr, #0
  60                 mov     \base, #io_p2v(0x80000000)      @ APB registers
  61                 ldr     \irqstat, [\base, #0x500]       @ PIC INTSR
  62
  63 1001:           movs    \irqstat, \irqstat, lsr #1      @ Shift into carry
  64                 bcs     1008f                           @ Bit set; irq found
  65                 add     \irqnr, \irqnr, #1
  66                 bne     1001b                           @ Until no bits
  67                 b       1009f                           @ Nothing?  Hmm.
  68 1008:           movs    \irqstat, #1                    @ Force !Z
  69
  70 1009:
  71                .endm
  72
  73
  74
  75 #elif defined(CONFIG_ARCH_LH7A400)
  76                 .macro  disable_fiq
  77                 .endm
  78
  79                 .macro  get_irqnr_preamble, base, tmp
  80                 .endm
  81
  82                 .macro  arch_ret_to_user, tmp1, tmp2
  83                 .endm
  84
  85                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
  86                 mov     \irqnr, #0
  87                 mov     \base, #io_p2v(0x80000000)      @ APB registers
  88                 ldr     \irqstat, [\base, #0x500]       @ PIC INTSR
  89
  90 1001:           movs    \irqstat, \irqstat, lsr #1      @ Shift into carry
  91                 bcs     1008f                           @ Bit set; irq found
  92                 add     \irqnr, \irqnr, #1
  93                 bne     1001b                           @ Until no bits
  94                 b       1009f                           @ Nothing?  Hmm.
  95 1008:           movs    \irqstat, #1                    @ Force !Z
  96 1009:
  97                .endm
  98
  99 #elif defined(CONFIG_ARCH_LH7A404)
 100
 101                 .macro  disable_fiq
 102                 .endm
 103
 104                 .macro  get_irqnr_preamble, base, tmp
 105                 .endm
 106
 107                 .macro  arch_ret_to_user, tmp1, tmp2
 108                 .endm
 109
 110                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
 111                 mov     \irqnr, #0                      @ VIC1 irq base
 112                 mov     \base, #io_p2v(0x80000000)      @ APB registers
 113                 add     \base, \base, #0x8000
 114                 ldr     \tmp, [\base, #0x0030]          @ VIC1_VECTADDR
 115                 tst     \tmp, #VA_VECTORED              @ Direct vectored
 116                 bne     1002f
 117                 tst     \tmp, #VA_VIC1DEFAULT           @ Default vectored VIC1
 118                 ldrne   \irqstat, [\base, #0]           @ VIC1_IRQSTATUS
 119                 bne     1001f
 120                 add     \base, \base, #(0xa000 - 0x8000)
 121                 ldr     \tmp, [\base, #0x0030]          @ VIC2_VECTADDR
 122                 tst     \tmp, #VA_VECTORED              @ Direct vectored
 123                 bne     1002f
 124                 ldr     \irqstat, [\base, #0]           @ VIC2_IRQSTATUS
 125                 mov     \irqnr, #32                     @ VIC2 irq base
 126
 127 1001:           movs    \irqstat, \irqstat, lsr #1      @ Shift into carry
 128                 bcs     1008f                           @ Bit set; irq found
 129                 add     \irqnr, \irqnr, #1
 130                 bne     1001b                           @ Until no bits
 131                 b       1009f                           @ Nothing?  Hmm.
 132 1002:           and     \irqnr, \tmp, #0x3f             @ Mask for valid bits
 133 1008:           movs    \irqstat, #1                    @ Force !Z
 134                 str     \tmp, [\base, #0x0030]          @ Clear vector
 135 1009:
 136                .endm
 137 #endif