release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-dove/include/mach/pm.h

   1 /*
   2  * arch/arm/mach-dove/include/mach/pm.h
   3  *
   4  * This file is licensed under the terms of the GNU General Public
   5  * License version 2.  This program is licensed "as is" without any
   6  * warranty of any kind, whether express or implied.
   7  */
   8
   9 #ifndef __ASM_ARCH_PM_H
  10 #define __ASM_ARCH_PM_H
  11
  12 #include <asm/errno.h>
  13 #include <mach/irqs.h>
  14
  15 #define CLOCK_GATING_CONTROL    (DOVE_PMU_VIRT_BASE + 0x38)
  16 #define  CLOCK_GATING_USB0_MASK         (1 << 0)
  17 #define  CLOCK_GATING_USB1_MASK         (1 << 1)
  18 #define  CLOCK_GATING_GBE_MASK          (1 << 2)
  19 #define  CLOCK_GATING_SATA_MASK         (1 << 3)
  20 #define  CLOCK_GATING_PCIE0_MASK        (1 << 4)
  21 #define  CLOCK_GATING_PCIE1_MASK        (1 << 5)
  22 #define  CLOCK_GATING_SDIO0_MASK        (1 << 8)
  23 #define  CLOCK_GATING_SDIO1_MASK        (1 << 9)
  24 #define  CLOCK_GATING_NAND_MASK         (1 << 10)
  25 #define  CLOCK_GATING_CAMERA_MASK       (1 << 11)
  26 #define  CLOCK_GATING_I2S0_MASK         (1 << 12)
  27 #define  CLOCK_GATING_I2S1_MASK         (1 << 13)
  28 #define  CLOCK_GATING_CRYPTO_MASK       (1 << 15)
  29 #define  CLOCK_GATING_AC97_MASK         (1 << 21)
  30 #define  CLOCK_GATING_PDMA_MASK         (1 << 22)
  31 #define  CLOCK_GATING_XOR0_MASK         (1 << 23)
  32 #define  CLOCK_GATING_XOR1_MASK         (1 << 24)
  33 #define  CLOCK_GATING_GIGA_PHY_MASK     (1 << 30)
  34
  35 #define PMU_INTERRUPT_CAUSE     (DOVE_PMU_VIRT_BASE + 0x50)
  36 #define PMU_INTERRUPT_MASK      (DOVE_PMU_VIRT_BASE + 0x54)
  37
  38 static inline int pmu_to_irq(int pin)
  39 {
  40         if (pin < NR_PMU_IRQS)
  41                 return pin + IRQ_DOVE_PMU_START;
  42
  43         return -EINVAL;
  44 }
  45
  46 static inline int irq_to_pmu(int irq)
  47 {
  48         if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS)
  49                 return irq - IRQ_DOVE_PMU_START;
  50
  51         return -EINVAL;
  52 }
  53
  54 #endif