release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/src/ui_cpuinfo.c

   1 /*  *********************************************************************
   2     *  Broadcom Common Firmware Environment (CFE)
   3     *
   4     *  All you never wanted to know about CPUs  File: ui_cpuinfo.c
   5     *
   6     *  Routines to display CPU info (common to all CPUs)
   7     *
   8     *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
   9     *
  10     *********************************************************************
  11     *
  12     *  Copyright 2000,2001,2002,2003
  13     *  Broadcom Corporation. All rights reserved.
  14     *
  15     *  This software is furnished under license and may be used and
  16     *  copied only in accordance with the following terms and
  17     *  conditions.  Subject to these conditions, you may download,
  18     *  copy, install, use, modify and distribute modified or unmodified
  19     *  copies of this software in source and/or binary form.  No title
  20     *  or ownership is transferred hereby.
  21     *
  22     *  1) Any source code used, modified or distributed must reproduce
  23     *     and retain this copyright notice and list of conditions
  24     *     as they appear in the source file.
  25     *
  26     *  2) No right is granted to use any trade name, trademark, or
  27     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  28     *     name may not be used to endorse or promote products derived
  29     *     from this software without the prior written permission of
  30     *     Broadcom Corporation.
  31     *
  32     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  33     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  34     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  35     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  36     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  37     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  38     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  39     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  40     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  41     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  42     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  43     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  44     *     THE POSSIBILITY OF SUCH DAMAGE.
  45     ********************************************************************* */
  46
  47 #include "sbmips.h"
  48 #include "lib_types.h"
  49 #include "lib_queue.h"
  50 #include "lib_printf.h"
  51 #include "ui_command.h"
  52
  53 #include "sb1250_defs.h"
  54 #include "sb1250_regs.h"
  55 #include "sb1250_scd.h"
  56 #include "sb1250_wid.h"
  57
  58 #include "bsp_config.h"
  59
  60 #include "env_subr.h"
  61
  62
  63 /*  *********************************************************************
  64     *  Macros
  65     ********************************************************************* */
  66
  67 #define SB1250_PASS1 (K_SYS_REVISION_PASS1)     /* 1 */
  68 #define SB1250_PASS2 (K_SYS_REVISION_PASS2)     /* 3 */
  69 #define SB1250_PASS20FL  (4)
  70 #define SB1250_PASS20WB  (3)
  71 #define SB1250_PASS21FL  (5)
  72 #define SB1250_PASS21WB  (6)
  73 #define SB1250_STEP_A6   (7)    /* A6 is really rev=4 && wid!=0 */
  74 #define SB1250_STEP_A7   (8)
  75 #define SB1250_STEP_B0   (9)
  76 #define SB1250_STEP_A8   (11)
  77 #define SB1250_STEP_B1   (16)
  78 #define SB1250_STEP_B2   (17)
  79 #define SB1250_STEP_C0   (32)
  80
  81 /*
  82  * This lets us override the WID by poking values into our PromICE
  83  */
  84 #ifdef _MAGICWID_
  85 #undef A_SCD_SYSTEM_REVISION
  86 #define A_SCD_SYSTEM_REVISION 0x1FC00508
  87 #undef A_SCD_SYSTEM_MANUF
  88 #define A_SCD_SYSTEM_MANUF 0x1FC00518
  89 #endif
  90
  91 /*  *********************************************************************
  92     *  Externs/forwards
  93     ********************************************************************* */
  94
  95 void sb1250_show_cpu_type(void);
  96
  97 /* XXXCGD: could be const, when env_setenv can cope.  */
  98 static char *show_cpu_type_bcm1250(uint64_t syscfg, uint64_t sysrev);
  99 static char *show_cpu_type_bcm112x(uint64_t syscfg, uint64_t sysrev);
 100
 101 /*  *********************************************************************
 102     *  ui_show_cpu_type()
 103     *
 104     *  Display board CPU information
 105     *
 106     *  Input parameters:
 107     *      nothing
 108     *
 109     *  Return value:
 110     *      nothing
 111     ********************************************************************* */
 112 void sb1250_show_cpu_type(void)
 113 {
 114     uint64_t syscfg, sysrev;
 115     int plldiv;
 116     /* XXXCGD: could be const, when env_setenv can cope.  */
 117     char *envval;
 118     char *(*infofn)(uint64_t, uint64_t);
 119     char temp[32];
 120
 121     syscfg = SBREADCSR(A_SCD_SYSTEM_CFG);
 122     sysrev = SBREADCSR(A_SCD_SYSTEM_REVISION);
 123
 124     switch (SYS_SOC_TYPE(sysrev)) {
 125     case K_SYS_SOC_TYPE_BCM1250:
 126         envval = "1250";
 127         infofn = show_cpu_type_bcm1250;
 128         break;
 129
 130     case K_SYS_SOC_TYPE_BCM1120:
 131         envval = "1120";
 132         infofn = show_cpu_type_bcm112x;
 133         break;
 134
 135     case K_SYS_SOC_TYPE_BCM1125:
 136         envval = "1125";
 137         infofn = show_cpu_type_bcm112x;
 138         break;
 139
 140     case K_SYS_SOC_TYPE_BCM1125H:
 141         envval = "1125H";
 142         infofn = show_cpu_type_bcm112x;
 143         break;
 144
 145     default:
 146         sprintf(temp, "unknown_%04x", (int)G_SYS_PART(sysrev));
 147         envval = temp;
 148         infofn = NULL;
 149         break;
 150     }
 151     env_setenv("CPU_TYPE", envval,
 152                ENV_FLG_BUILTIN | ENV_FLG_READONLY | ENV_FLG_ADMIN);
 153
 154     envval = NULL;
 155     if (infofn != NULL)
 156         envval = (*infofn)(syscfg, sysrev);
 157     if (envval == NULL) {
 158         sprintf(temp, "unknown_%02x", (int)G_SYS_REVISION(sysrev));
 159         envval = temp;
 160     }
 161     env_setenv("CPU_REVISION", envval,
 162                ENV_FLG_BUILTIN | ENV_FLG_READONLY | ENV_FLG_ADMIN);
 163
 164     /* Set # of CPUs based on 2nd hex digit of part number */
 165     sprintf(temp, "%d", (int)((G_SYS_PART(sysrev) >> 8) & 0x0F));
 166     env_setenv("CPU_NUM_CORES", temp,
 167                ENV_FLG_BUILTIN | ENV_FLG_READONLY | ENV_FLG_ADMIN);
 168
 169     /*
 170      * Set variable that contains CPU speed, spit out config register
 171      */
 172     printf("SysCfg: %016llX [PLL_DIV: %d, IOB0_DIV: %s, IOB1_DIV: %s]\n",
 173            syscfg,
 174            (int)G_SYS_PLL_DIV(syscfg),
 175            (syscfg & M_SYS_IOB0_DIV) ? "CPUCLK/3" : "CPUCLK/4",
 176            (syscfg & M_SYS_IOB1_DIV) ? "CPUCLK/2" : "CPUCLK/3");
 177
 178     plldiv = G_SYS_PLL_DIV(syscfg);
 179     if (plldiv == 0) {
 180         printf("PLL_DIV of zero found, assuming 6 (300MHz)\n");
 181         plldiv = 6;
 182     }
 183
 184     sprintf(temp,"%d", plldiv * 50);
 185     env_setenv("CPU_SPEED", temp,
 186                ENV_FLG_BUILTIN | ENV_FLG_READONLY | ENV_FLG_ADMIN);
 187 }
 188
 189 /*  *********************************************************************
 190     *  show_cpu_type_bcm1250()
 191     *
 192     *  Display CPU information for BCM1250 CPUs
 193     *
 194     *  Input parameters:
 195     *      revstr: pointer to string pointer, to be filled in with
 196     *      revision name.
 197     *
 198     *  Return value:
 199     *      none.  fills in revstr.
 200     ********************************************************************* */
 201 static char *
 202 show_cpu_type_bcm1250(uint64_t syscfg, uint64_t sysrev)
 203 {
 204     char *revstr, *revprintstr;
 205     uint64_t cachetest;
 206     uint64_t sysmanuf;
 207     uint32_t wid;
 208     int bin;
 209     unsigned int cpu_pass;
 210     char temp[32];
 211     static uint8_t cachesizes[16] = {4,2,2,2,2,1,1,1,2,1,1,1,2,1,1,0};
 212     static char *binnames[8] = {
 213         "2CPU_FI_1D_H2",
 214         "2CPU_FI_FD_F2 (OK)",
 215         "2CPU_FI_FD_H2",
 216         "2CPU_3I_3D_F2",
 217         "2CPU_3I_3D_H2",
 218         "1CPU_FI_FD_F2",
 219         "1CPU_FI_FD_H2",
 220         "2CPU_1I_1D_Q2"};
 221
 222     cpu_pass = G_SYS_REVISION(sysrev);
 223
 224     wid = G_SYS_WID(SBREADCSR(A_SCD_SYSTEM_REVISION));
 225     wid = WID_UNCONVOLUTE(wid);
 226
 227     if ((wid != 0) && (cpu_pass == 0x4)) {
 228         cpu_pass = SB1250_STEP_A6;
 229         }
 230
 231     switch (cpu_pass) {
 232         case SB1250_PASS1:
 233             revstr = "PASS1";
 234             revprintstr = "Pass 1";
 235             break;
 236         case SB1250_PASS20WB:
 237             revstr = "A1";
 238             revprintstr = "Pass 2.0 (wirebond)";
 239             break;
 240         case SB1250_PASS20FL:
 241             revstr = "A2";
 242             revprintstr = "Pass 2.0 (flip-chip)";
 243             break;
 244         case SB1250_PASS21WB:
 245             revstr = "A4";
 246             revprintstr = "A4 Pass 2.1 (wirebond)";
 247             break;
 248         case SB1250_PASS21FL:
 249             revstr = "A3";
 250             revprintstr = "A3 Pass 2.1 (flip-chip)";
 251             break;
 252         case SB1250_STEP_A6:
 253             revstr = revprintstr = "A6";
 254             break;
 255         case SB1250_STEP_A7:
 256             revstr = revprintstr = "A7";
 257             break;
 258         case SB1250_STEP_A8:
 259             revprintstr = "A8/A10";
 260             revstr = "A8";
 261             break;
 262         case SB1250_STEP_B0:
 263             revstr = revprintstr = "B0";
 264             break;
 265         case SB1250_STEP_B1:
 266             revstr = revprintstr = "B1";
 267             break;
 268         case SB1250_STEP_B2:
 269             revstr = revprintstr = "B2";
 270             break;
 271         case SB1250_STEP_C0:
 272             revstr = revprintstr = "C0";
 273             break;
 274         default:
 275             revstr = NULL;
 276             sprintf(temp, "rev 0x%x", (int)G_SYS_REVISION(sysrev));
 277             revprintstr = temp;
 278             break;
 279         }
 280     printf("CPU: BCM1250 %s\n", revprintstr);
 281
 282     if (((G_SYS_PART(sysrev) >> 8) & 0x0F) == 1) {
 283         printf("[Uniprocessor CPU mode]\n");
 284         }
 285
 286     /*
 287      * Report cache status if the cache was disabled, or the status of
 288      * the cache test for non-WID pass2 and pass3 parts.
 289      */
 290     printf("L2 Cache Status: ");
 291     if ((syscfg & M_SYS_L2C_RESET) != 0) {
 292         printf("disabled via JTAG\n");
 293         }
 294     else if ((cpu_pass == SB1250_PASS20FL) || (cpu_pass == SB1250_PASS20WB) ||
 295              (cpu_pass == SB1250_STEP_C0)) {
 296         cachetest = (SBREADCSR(A_MAC_REGISTER(2,R_MAC_HASH_BASE)) & 0x0F);
 297         printf("0x%llX    Available L2 Cache: %dKB\n",cachetest,
 298                ((int)cachesizes[(int)cachetest])*128);
 299         }
 300     else printf("OK\n");
 301
 302     if (wid == 0) {
 303         printf("Wafer ID:  Not set\n");
 304         }
 305     else if (cpu_pass != SB1250_STEP_C0) {
 306
 307         printf("Wafer ID:   0x%08X  [Lot %d, Wafer %d]\n",wid,
 308                G_WID_LOTID(wid),G_WID_WAFERID(wid));
 309
 310         bin = G_WID_BIN(wid);
 311
 312         printf("Manuf Test: Bin %c [%s] ","EABCDFGH"[bin],binnames[bin]);
 313
 314         if (bin != K_WID_BIN_2CPU_FI_FD_F2)  {
 315             printf("L2:%d ",G_WID_L2QTR(wid));
 316             printf("CPU0:[I=%d D=%d]  ",G_WID_CPU0_L1I(wid),G_WID_CPU0_L1D(wid));
 317             printf("CPU1:[I=%d D=%d]",G_WID_CPU1_L1I(wid),G_WID_CPU1_L1D(wid));
 318             }
 319         printf("\n");
 320         }
 321
 322     if (cpu_pass == SB1250_STEP_C0) {
 323         /* Read system_manuf register for C0 */
 324         sysmanuf = SBREADCSR(A_SCD_SYSTEM_MANUF);
 325
 326         printf("SysManuf:  %016llX [X: %d Y: %d]",sysmanuf, (int)G_SYS_XPOS(sysmanuf),
 327                                                     (int)G_SYS_YPOS(sysmanuf));
 328         printf("\n");
 329         }
 330
 331     return (revstr);
 332 }
 333
 334 /*  *********************************************************************
 335     *  show_cpu_type_bcm112x()
 336     *
 337     *  Display CPU information for BCM112x CPUs
 338     *
 339     *  Input parameters:
 340     *      revstr: pointer to string pointer, to be filled in with
 341     *      revision name.
 342     *
 343     *  Return value:
 344     *      none.  fills in revstr.
 345     ********************************************************************* */
 346 static char *
 347 show_cpu_type_bcm112x(uint64_t syscfg, uint64_t sysrev)
 348 {
 349     char *revstr, *revprintstr;
 350     char temp[32];
 351
 352     switch (G_SYS_REVISION(sysrev)) {
 353         case K_SYS_REVISION_BCM112x_A1:
 354             revstr = revprintstr = "A1";
 355             break;
 356         case K_SYS_REVISION_BCM112x_A2:
 357             revstr = revprintstr = "A2";
 358             break;
 359         default:
 360             revstr = NULL;
 361             sprintf(temp, "rev 0x%x", (int)G_SYS_REVISION(sysrev));
 362             revprintstr = temp;
 363             break;
 364         }
 365     printf("CPU: %s %s\n", env_getenv("CPU_TYPE"), revprintstr);
 366
 367     printf("L2 Cache: ");
 368     if ((syscfg & M_SYS_L2C_RESET) != 0)
 369         printf("disabled via JTAG\n");
 370     else
 371         printf("256KB\n");
 372
 373     return (revstr);
 374 }