release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/src/diag_l2util.h

   1 /*  *********************************************************************
   2     *  SB1250 Board Support Package
   3     *
   4     *  L2 Cache Diagnostic                      File: diag_l2util.h
   5     *
   6     *  A diagnostic for the L2 cache.  On pass2 parts, this diag
   7     *  will disable portions of the cache as necessary.
   8     *
   9     *  Author:  Zongbo Chen (zongbo@broadcom.com)
  10     *
  11     *********************************************************************
  12     *
  13     *  Copyright 2000,2001,2002,2003
  14     *  Broadcom Corporation. All rights reserved.
  15     *
  16     *  This software is furnished under license and may be used and
  17     *  copied only in accordance with the following terms and
  18     *  conditions.  Subject to these conditions, you may download,
  19     *  copy, install, use, modify and distribute modified or unmodified
  20     *  copies of this software in source and/or binary form.  No title
  21     *  or ownership is transferred hereby.
  22     *
  23     *  1) Any source code used, modified or distributed must reproduce
  24     *     and retain this copyright notice and list of conditions
  25     *     as they appear in the source file.
  26     *
  27     *  2) No right is granted to use any trade name, trademark, or
  28     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  29     *     name may not be used to endorse or promote products derived
  30     *     from this software without the prior written permission of
  31     *     Broadcom Corporation.
  32     *
  33     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  34     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  35     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  36     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  37     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  38     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  39     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  40     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  41     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  42     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  43     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  44     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  45     *     THE POSSIBILITY OF SUCH DAMAGE.
  46     ********************************************************************* */
  47
  48 /* l2 physical layout */
  49 #define L2_BLOCK_ROW_SHIFT      14
  50 #define L2_BLOCK_SHIFT          13
  51 #define L2_LINE_SHIFT           5
  52 #define L2_LINE_ADDRESS_BITS    17
  53 #define L2_BLOCKS_PER_ROW       2
  54 #define L2_BLOCK_ROWS           8
  55 #define L2_REDUNDANT_LINES_PER_BLOCK 2
  56 #define L2_LINES_PER_BLOCK      256
  57 #define L2_INDEX_MASK           0x1fe0
  58
  59 /* management interface */
  60 #define L2_RAM_BASE_ADDR        0x00D0180000
  61
  62 #if defined(__ASSEMBLER__)
  63
  64 #define L2_MGMT_BASE            0x00d0000000
  65 #define L2_NWAYS                4
  66 #define L2_MGMT_WAY_SHIFT       17
  67
  68 #else
  69
  70 #define L2_MGMT_BASE            0x00d0000000L
  71 #define L2_RAM_BASE_ADDR        0x00D0180000
  72 #define L2_RAM_ADDR(W,O)        (L2_RAM_BASE_ADDR + ((W)<<17) + ((O)&0x1FFFF))
  73 #define L2_MGMT_INDEX_SHIFT     5L
  74 #define L2_NROWS                4096
  75 #define L2_MGMT_ROW_SHIFT       L2_MGMT_INDEX_SHIFT
  76 #define L2_MGMT_WAY_SHIFT       17L
  77 #define L2_MGMT_DIRTY_SHIFT     19
  78 #define L2_MGMT_VALID_SHIFT     20
  79
  80
  81 /* disable ways of the l2 cache */
  82 #define L2_WAY_DISABLE_NONE     0x0010041F00L
  83 #define L2_NWAYS                4L
  84 #define L2_WAY_SHIFT            8L
  85 #define L2_ENABLE_ALL_WAYS      (*(volatile int *)\
  86                                  (XKPHYS_PtoUV(L2_WAY_DISABLE_NONE)) = 0)
  87 #define L2_ENABLE_ONLY1_WAY(x)  (*(volatile int *)\
  88                                  (XKPHYS_PtoUV(L2_WAY_DISABLE_NONE & \
  89                                   (1L << (((x) & 0x3L)+L2_WAY_SHIFT)))) = 0)
  90
  91 #define L2_DISABLE_ONLY1_WAY(x) (*(volatile int *)\
  92                                  (XKPHYS_PtoUV(L2_WAY_DISABLE_NONE & \
  93                                  (((~(1L << ((x) & 0x3L))) & 0xfL) \
  94                                   << L2_WAY_SHIFT))) = 0)
  95
  96 typedef unsigned long long addr_t;
  97
  98 /* this structure is used to record lines with errors */
  99 typedef struct {
 100   int block;
 101   int block_row;
 102   int line;
 103 } l2_line_error_desc_t;
 104
 105 extern int errors_per_block[L2_BLOCK_ROWS * L2_BLOCKS_PER_ROW];
 106
 107 #endif