release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/sb1250_mac.h

   1 /*  *********************************************************************
   2     *  SB1250 Board Support Package
   3     *
   4     *  MAC constants and macros                 File: sb1250_mac.h
   5     *
   6     *  This module contains constants and macros for the SB1250's
   7     *  ethernet controllers.
   8     *
   9     *  SB1250 specification level:  User's manual 1/02/02
  10     *
  11     *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
  12     *
  13     *********************************************************************
  14     *
  15     *  Copyright 2000,2001,2002,2003
  16     *  Broadcom Corporation. All rights reserved.
  17     *
  18     *  This software is furnished under license and may be used and
  19     *  copied only in accordance with the following terms and
  20     *  conditions.  Subject to these conditions, you may download,
  21     *  copy, install, use, modify and distribute modified or unmodified
  22     *  copies of this software in source and/or binary form.  No title
  23     *  or ownership is transferred hereby.
  24     *
  25     *  1) Any source code used, modified or distributed must reproduce
  26     *     and retain this copyright notice and list of conditions
  27     *     as they appear in the source file.
  28     *
  29     *  2) No right is granted to use any trade name, trademark, or
  30     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  31     *     name may not be used to endorse or promote products derived
  32     *     from this software without the prior written permission of
  33     *     Broadcom Corporation.
  34     *
  35     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  36     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  37     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  38     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  39     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  40     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  41     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  42     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  43     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  44     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  45     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  46     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  47     *     THE POSSIBILITY OF SUCH DAMAGE.
  48     ********************************************************************* */
  49
  50
  51 #ifndef _SB1250_MAC_H
  52 #define _SB1250_MAC_H
  53
  54 #include "sb1250_defs.h"
  55
  56 /*  *********************************************************************
  57     *  Ethernet MAC Registers
  58     ********************************************************************* */
  59
  60 /*
  61  * MAC Configuration Register (Table 9-13)
  62  * Register: MAC_CFG_0
  63  * Register: MAC_CFG_1
  64  * Register: MAC_CFG_2
  65  */
  66
  67
  68 #define M_MAC_RESERVED0             _SB_MAKEMASK1(0)
  69 #define M_MAC_TX_HOLD_SOP_EN        _SB_MAKEMASK1(1)
  70 #define M_MAC_RETRY_EN              _SB_MAKEMASK1(2)
  71 #define M_MAC_RET_DRPREQ_EN         _SB_MAKEMASK1(3)
  72 #define M_MAC_RET_UFL_EN            _SB_MAKEMASK1(4)
  73 #define M_MAC_BURST_EN              _SB_MAKEMASK1(5)
  74
  75 #define S_MAC_TX_PAUSE              _SB_MAKE64(6)
  76 #define M_MAC_TX_PAUSE_CNT          _SB_MAKEMASK(3,S_MAC_TX_PAUSE)
  77 #define V_MAC_TX_PAUSE_CNT(x)       _SB_MAKEVALUE(x,S_MAC_TX_PAUSE)
  78
  79 #define K_MAC_TX_PAUSE_CNT_512      0
  80 #define K_MAC_TX_PAUSE_CNT_1K       1
  81 #define K_MAC_TX_PAUSE_CNT_2K       2
  82 #define K_MAC_TX_PAUSE_CNT_4K       3
  83 #define K_MAC_TX_PAUSE_CNT_8K       4
  84 #define K_MAC_TX_PAUSE_CNT_16K      5
  85 #define K_MAC_TX_PAUSE_CNT_32K      6
  86 #define K_MAC_TX_PAUSE_CNT_64K      7
  87
  88 #define V_MAC_TX_PAUSE_CNT_512      V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_512)
  89 #define V_MAC_TX_PAUSE_CNT_1K       V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_1K)
  90 #define V_MAC_TX_PAUSE_CNT_2K       V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_2K)
  91 #define V_MAC_TX_PAUSE_CNT_4K       V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_4K)
  92 #define V_MAC_TX_PAUSE_CNT_8K       V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_8K)
  93 #define V_MAC_TX_PAUSE_CNT_16K      V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_16K)
  94 #define V_MAC_TX_PAUSE_CNT_32K      V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_32K)
  95 #define V_MAC_TX_PAUSE_CNT_64K      V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_64K)
  96
  97 #define M_MAC_RESERVED1             _SB_MAKEMASK(8,9)
  98
  99 #define M_MAC_AP_STAT_EN            _SB_MAKEMASK1(17)
 100 #define M_MAC_RESERVED2             _SB_MAKEMASK1(18)
 101 #define M_MAC_DRP_ERRPKT_EN         _SB_MAKEMASK1(19)
 102 #define M_MAC_DRP_FCSERRPKT_EN      _SB_MAKEMASK1(20)
 103 #define M_MAC_DRP_CODEERRPKT_EN     _SB_MAKEMASK1(21)
 104 #define M_MAC_DRP_DRBLERRPKT_EN     _SB_MAKEMASK1(22)
 105 #define M_MAC_DRP_RNTPKT_EN         _SB_MAKEMASK1(23)
 106 #define M_MAC_DRP_OSZPKT_EN         _SB_MAKEMASK1(24)
 107 #define M_MAC_DRP_LENERRPKT_EN      _SB_MAKEMASK1(25)
 108
 109 #define M_MAC_RESERVED3             _SB_MAKEMASK(6,26)
 110
 111 #define M_MAC_BYPASS_SEL            _SB_MAKEMASK1(32)
 112 #define M_MAC_HDX_EN                _SB_MAKEMASK1(33)
 113
 114 #define S_MAC_SPEED_SEL             _SB_MAKE64(34)
 115 #define M_MAC_SPEED_SEL             _SB_MAKEMASK(2,S_MAC_SPEED_SEL)
 116 #define V_MAC_SPEED_SEL(x)          _SB_MAKEVALUE(x,S_MAC_SPEED_SEL)
 117 #define G_MAC_SPEED_SEL(x)          _SB_GETVALUE(x,S_MAC_SPEED_SEL,M_MAC_SPEED_SEL)
 118
 119 #define K_MAC_SPEED_SEL_10MBPS      0
 120 #define K_MAC_SPEED_SEL_100MBPS     1
 121 #define K_MAC_SPEED_SEL_1000MBPS    2
 122 #define K_MAC_SPEED_SEL_RESERVED    3
 123
 124 #define V_MAC_SPEED_SEL_10MBPS      V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_10MBPS)
 125 #define V_MAC_SPEED_SEL_100MBPS     V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_100MBPS)
 126 #define V_MAC_SPEED_SEL_1000MBPS    V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_1000MBPS)
 127 #define V_MAC_SPEED_SEL_RESERVED    V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_RESERVED)
 128
 129 #define M_MAC_TX_CLK_EDGE_SEL       _SB_MAKEMASK1(36)
 130 #define M_MAC_LOOPBACK_SEL          _SB_MAKEMASK1(37)
 131 #define M_MAC_FAST_SYNC             _SB_MAKEMASK1(38)
 132 #define M_MAC_SS_EN                 _SB_MAKEMASK1(39)
 133
 134 #define S_MAC_BYPASS_CFG            _SB_MAKE64(40)
 135 #define M_MAC_BYPASS_CFG            _SB_MAKEMASK(2,S_MAC_BYPASS_CFG)
 136 #define V_MAC_BYPASS_CFG(x)         _SB_MAKEVALUE(x,S_MAC_BYPASS_CFG)
 137 #define G_MAC_BYPASS_CFG(x)         _SB_GETVALUE(x,S_MAC_BYPASS_CFG,M_MAC_BYPASS_CFG)
 138
 139 #define K_MAC_BYPASS_GMII           0
 140 #define K_MAC_BYPASS_ENCODED        1
 141 #define K_MAC_BYPASS_SOP            2
 142 #define K_MAC_BYPASS_EOP            3
 143
 144 #define M_MAC_BYPASS_16             _SB_MAKEMASK1(42)
 145 #define M_MAC_BYPASS_FCS_CHK        _SB_MAKEMASK1(43)
 146
 147 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
 148 #define M_MAC_RX_CH_SEL_MSB         _SB_MAKEMASK1(44)
 149 #endif /* 1250 PASS2 || 112x PASS1 */
 150
 151 #if SIBYTE_HDR_FEATURE(112x, PASS1)
 152 #define M_MAC_SPLIT_CH_SEL          _SB_MAKEMASK1(45)
 153 #endif /* 112x PASS1 */
 154
 155 #define S_MAC_BYPASS_IFG            _SB_MAKE64(46)
 156 #define M_MAC_BYPASS_IFG            _SB_MAKEMASK(8,S_MAC_BYPASS_IFG)
 157 #define V_MAC_BYPASS_IFG(x)         _SB_MAKEVALUE(x,S_MAC_BYPASS_IFG)
 158 #define G_MAC_BYPASS_IFG(x)         _SB_GETVALUE(x,S_MAC_BYPASS_IFG,M_MAC_BYPASS_IFG)
 159
 160 #define K_MAC_FC_CMD_DISABLED       0
 161 #define K_MAC_FC_CMD_ENABLED        1
 162 #define K_MAC_FC_CMD_ENAB_FALSECARR 2
 163
 164 #define V_MAC_FC_CMD_DISABLED       V_MAC_FC_CMD(K_MAC_FC_CMD_DISABLED)
 165 #define V_MAC_FC_CMD_ENABLED        V_MAC_FC_CMD(K_MAC_FC_CMD_ENABLED)
 166 #define V_MAC_FC_CMD_ENAB_FALSECARR V_MAC_FC_CMD(K_MAC_FC_CMD_ENAB_FALSECARR)
 167
 168 #define M_MAC_FC_SEL                _SB_MAKEMASK1(54)
 169
 170 #define S_MAC_FC_CMD                _SB_MAKE64(55)
 171 #define M_MAC_FC_CMD                _SB_MAKEMASK(2,S_MAC_FC_CMD)
 172 #define V_MAC_FC_CMD(x)             _SB_MAKEVALUE(x,S_MAC_FC_CMD)
 173 #define G_MAC_FC_CMD(x)             _SB_GETVALUE(x,S_MAC_FC_CMD,M_MAC_FC_CMD)
 174
 175 #define S_MAC_RX_CH_SEL             _SB_MAKE64(57)
 176 #define M_MAC_RX_CH_SEL             _SB_MAKEMASK(7,S_MAC_RX_CH_SEL)
 177 #define V_MAC_RX_CH_SEL(x)          _SB_MAKEVALUE(x,S_MAC_RX_CH_SEL)
 178 #define G_MAC_RX_CH_SEL(x)          _SB_GETVALUE(x,S_MAC_RX_CH_SEL,M_MAC_RX_CH_SEL)
 179
 180
 181 /*
 182  * MAC Enable Registers
 183  * Register: MAC_ENABLE_0
 184  * Register: MAC_ENABLE_1
 185  * Register: MAC_ENABLE_2
 186  */
 187
 188 #define M_MAC_RXDMA_EN0             _SB_MAKEMASK1(0)
 189 #define M_MAC_RXDMA_EN1             _SB_MAKEMASK1(1)
 190 #define M_MAC_TXDMA_EN0             _SB_MAKEMASK1(4)
 191 #define M_MAC_TXDMA_EN1             _SB_MAKEMASK1(5)
 192
 193 #define M_MAC_PORT_RESET            _SB_MAKEMASK1(8)
 194
 195 #define M_MAC_RX_ENABLE             _SB_MAKEMASK1(10)
 196 #define M_MAC_TX_ENABLE             _SB_MAKEMASK1(11)
 197 #define M_MAC_BYP_RX_ENABLE         _SB_MAKEMASK1(12)
 198 #define M_MAC_BYP_TX_ENABLE         _SB_MAKEMASK1(13)
 199
 200 /*
 201  * MAC DMA Control Register
 202  * Register: MAC_TXD_CTL_0
 203  * Register: MAC_TXD_CTL_1
 204  * Register: MAC_TXD_CTL_2
 205  */
 206
 207 #define S_MAC_TXD_WEIGHT0           _SB_MAKE64(0)
 208 #define M_MAC_TXD_WEIGHT0           _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT0)
 209 #define V_MAC_TXD_WEIGHT0(x)        _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT0)
 210 #define G_MAC_TXD_WEIGHT0(x)        _SB_GETVALUE(x,S_MAC_TXD_WEIGHT0,M_MAC_TXD_WEIGHT0)
 211
 212 #define S_MAC_TXD_WEIGHT1           _SB_MAKE64(4)
 213 #define M_MAC_TXD_WEIGHT1           _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT1)
 214 #define V_MAC_TXD_WEIGHT1(x)        _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT1)
 215 #define G_MAC_TXD_WEIGHT1(x)        _SB_GETVALUE(x,S_MAC_TXD_WEIGHT1,M_MAC_TXD_WEIGHT1)
 216
 217 /*
 218  * MAC Fifo Threshhold registers (Table 9-14)
 219  * Register: MAC_THRSH_CFG_0
 220  * Register: MAC_THRSH_CFG_1
 221  * Register: MAC_THRSH_CFG_2
 222  */
 223
 224 #define S_MAC_TX_WR_THRSH           _SB_MAKE64(0)
 225 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
 226 /* #define M_MAC_TX_WR_THRSH           _SB_MAKEMASK(6,S_MAC_TX_WR_THRSH) */
 227 #endif /* up to 1250 PASS1 */
 228 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
 229 #define M_MAC_TX_WR_THRSH           _SB_MAKEMASK(7,S_MAC_TX_WR_THRSH)
 230 #endif /* 1250 PASS2 || 112x PASS1 */
 231 #define V_MAC_TX_WR_THRSH(x)        _SB_MAKEVALUE(x,S_MAC_TX_WR_THRSH)
 232 #define G_MAC_TX_WR_THRSH(x)        _SB_GETVALUE(x,S_MAC_TX_WR_THRSH,M_MAC_TX_WR_THRSH)
 233
 234 #define S_MAC_TX_RD_THRSH           _SB_MAKE64(8)
 235 #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1)
 236 /* #define M_MAC_TX_RD_THRSH           _SB_MAKEMASK(6,S_MAC_TX_RD_THRSH) */
 237 #endif /* up to 1250 PASS1 */
 238 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
 239 #define M_MAC_TX_RD_THRSH           _SB_MAKEMASK(7,S_MAC_TX_RD_THRSH)
 240 #endif /* 1250 PASS2 || 112x PASS1 */
 241 #define V_MAC_TX_RD_THRSH(x)        _SB_MAKEVALUE(x,S_MAC_TX_RD_THRSH)
 242 #define G_MAC_TX_RD_THRSH(x)        _SB_GETVALUE(x,S_MAC_TX_RD_THRSH,M_MAC_TX_RD_THRSH)
 243
 244 #define S_MAC_TX_RL_THRSH           _SB_MAKE64(16)
 245 #define M_MAC_TX_RL_THRSH           _SB_MAKEMASK(4,S_MAC_TX_RL_THRSH)
 246 #define V_MAC_TX_RL_THRSH(x)        _SB_MAKEVALUE(x,S_MAC_TX_RL_THRSH)
 247 #define G_MAC_TX_RL_THRSH(x)        _SB_GETVALUE(x,S_MAC_TX_RL_THRSH,M_MAC_TX_RL_THRSH)
 248
 249 #define S_MAC_RX_PL_THRSH           _SB_MAKE64(24)
 250 #define M_MAC_RX_PL_THRSH           _SB_MAKEMASK(6,S_MAC_RX_PL_THRSH)
 251 #define V_MAC_RX_PL_THRSH(x)        _SB_MAKEVALUE(x,S_MAC_RX_PL_THRSH)
 252 #define G_MAC_RX_PL_THRSH(x)        _SB_GETVALUE(x,S_MAC_RX_PL_THRSH,M_MAC_RX_PL_THRSH)
 253
 254 #define S_MAC_RX_RD_THRSH           _SB_MAKE64(32)
 255 #define M_MAC_RX_RD_THRSH           _SB_MAKEMASK(6,S_MAC_RX_RD_THRSH)
 256 #define V_MAC_RX_RD_THRSH(x)        _SB_MAKEVALUE(x,S_MAC_RX_RD_THRSH)
 257 #define G_MAC_RX_RD_THRSH(x)        _SB_GETVALUE(x,S_MAC_RX_RD_THRSH,M_MAC_RX_RD_THRSH)
 258
 259 #define S_MAC_RX_RL_THRSH           _SB_MAKE64(40)
 260 #define M_MAC_RX_RL_THRSH           _SB_MAKEMASK(6,S_MAC_RX_RL_THRSH)
 261 #define V_MAC_RX_RL_THRSH(x)        _SB_MAKEVALUE(x,S_MAC_RX_RL_THRSH)
 262 #define G_MAC_RX_RL_THRSH(x)        _SB_GETVALUE(x,S_MAC_RX_RL_THRSH,M_MAC_RX_RL_THRSH)
 263
 264 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
 265 #define S_MAC_ENC_FC_THRSH           _SB_MAKE64(56)
 266 #define M_MAC_ENC_FC_THRSH           _SB_MAKEMASK(6,S_MAC_ENC_FC_THRSH)
 267 #define V_MAC_ENC_FC_THRSH(x)        _SB_MAKEVALUE(x,S_MAC_ENC_FC_THRSH)
 268 #define G_MAC_ENC_FC_THRSH(x)        _SB_GETVALUE(x,S_MAC_ENC_FC_THRSH,M_MAC_ENC_FC_THRSH)
 269 #endif /* 1250 PASS2 || 112x PASS1 */
 270
 271 /*
 272  * MAC Frame Configuration Registers (Table 9-15)
 273  * Register: MAC_FRAME_CFG_0
 274  * Register: MAC_FRAME_CFG_1
 275  * Register: MAC_FRAME_CFG_2
 276  */
 277
 278 /* XXXCGD: ??? Unused in pass2? */
 279 #define S_MAC_IFG_RX                _SB_MAKE64(0)
 280 #define M_MAC_IFG_RX                _SB_MAKEMASK(6,S_MAC_IFG_RX)
 281 #define V_MAC_IFG_RX(x)             _SB_MAKEVALUE(x,S_MAC_IFG_RX)
 282 #define G_MAC_IFG_RX(x)             _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX)
 283
 284 #if SIBYTE_HDR_FEATURE(112x, PASS1)
 285 #define S_MAC_PRE_LEN               _SB_MAKE64(0)
 286 #define M_MAC_PRE_LEN               _SB_MAKEMASK(6,S_MAC_PRE_LEN)
 287 #define V_MAC_PRE_LEN(x)            _SB_MAKEVALUE(x,S_MAC_PRE_LEN)
 288 #define G_MAC_PRE_LEN(x)            _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN)
 289 #endif /* 112x PASS1 */
 290
 291 #define S_MAC_IFG_TX                _SB_MAKE64(6)
 292 #define M_MAC_IFG_TX                _SB_MAKEMASK(6,S_MAC_IFG_TX)
 293 #define V_MAC_IFG_TX(x)             _SB_MAKEVALUE(x,S_MAC_IFG_TX)
 294 #define G_MAC_IFG_TX(x)             _SB_GETVALUE(x,S_MAC_IFG_TX,M_MAC_IFG_TX)
 295
 296 #define S_MAC_IFG_THRSH             _SB_MAKE64(12)
 297 #define M_MAC_IFG_THRSH             _SB_MAKEMASK(6,S_MAC_IFG_THRSH)
 298 #define V_MAC_IFG_THRSH(x)          _SB_MAKEVALUE(x,S_MAC_IFG_THRSH)
 299 #define G_MAC_IFG_THRSH(x)          _SB_GETVALUE(x,S_MAC_IFG_THRSH,M_MAC_IFG_THRSH)
 300
 301 #define S_MAC_BACKOFF_SEL           _SB_MAKE64(18)
 302 #define M_MAC_BACKOFF_SEL           _SB_MAKEMASK(4,S_MAC_BACKOFF_SEL)
 303 #define V_MAC_BACKOFF_SEL(x)        _SB_MAKEVALUE(x,S_MAC_BACKOFF_SEL)
 304 #define G_MAC_BACKOFF_SEL(x)        _SB_GETVALUE(x,S_MAC_BACKOFF_SEL,M_MAC_BACKOFF_SEL)
 305
 306 #define S_MAC_LFSR_SEED             _SB_MAKE64(22)
 307 #define M_MAC_LFSR_SEED             _SB_MAKEMASK(8,S_MAC_LFSR_SEED)
 308 #define V_MAC_LFSR_SEED(x)          _SB_MAKEVALUE(x,S_MAC_LFSR_SEED)
 309 #define G_MAC_LFSR_SEED(x)          _SB_GETVALUE(x,S_MAC_LFSR_SEED,M_MAC_LFSR_SEED)
 310
 311 #define S_MAC_SLOT_SIZE             _SB_MAKE64(30)
 312 #define M_MAC_SLOT_SIZE             _SB_MAKEMASK(10,S_MAC_SLOT_SIZE)
 313 #define V_MAC_SLOT_SIZE(x)          _SB_MAKEVALUE(x,S_MAC_SLOT_SIZE)
 314 #define G_MAC_SLOT_SIZE(x)          _SB_GETVALUE(x,S_MAC_SLOT_SIZE,M_MAC_SLOT_SIZE)
 315
 316 #define S_MAC_MIN_FRAMESZ           _SB_MAKE64(40)
 317 #define M_MAC_MIN_FRAMESZ           _SB_MAKEMASK(8,S_MAC_MIN_FRAMESZ)
 318 #define V_MAC_MIN_FRAMESZ(x)        _SB_MAKEVALUE(x,S_MAC_MIN_FRAMESZ)
 319 #define G_MAC_MIN_FRAMESZ(x)        _SB_GETVALUE(x,S_MAC_MIN_FRAMESZ,M_MAC_MIN_FRAMESZ)
 320
 321 #define S_MAC_MAX_FRAMESZ           _SB_MAKE64(48)
 322 #define M_MAC_MAX_FRAMESZ           _SB_MAKEMASK(16,S_MAC_MAX_FRAMESZ)
 323 #define V_MAC_MAX_FRAMESZ(x)        _SB_MAKEVALUE(x,S_MAC_MAX_FRAMESZ)
 324 #define G_MAC_MAX_FRAMESZ(x)        _SB_GETVALUE(x,S_MAC_MAX_FRAMESZ,M_MAC_MAX_FRAMESZ)
 325
 326 /*
 327  * These constants are used to configure the fields within the Frame
 328  * Configuration Register.
 329  */
 330
 331 #define K_MAC_IFG_RX_10             _SB_MAKE64(0)       /* See table 176, not used */
 332 #define K_MAC_IFG_RX_100            _SB_MAKE64(0)
 333 #define K_MAC_IFG_RX_1000           _SB_MAKE64(0)
 334
 335 #define K_MAC_IFG_TX_10             _SB_MAKE64(20)
 336 #define K_MAC_IFG_TX_100            _SB_MAKE64(20)
 337 #define K_MAC_IFG_TX_1000           _SB_MAKE64(8)
 338
 339 #define K_MAC_IFG_THRSH_10          _SB_MAKE64(4)
 340 #define K_MAC_IFG_THRSH_100         _SB_MAKE64(4)
 341 #define K_MAC_IFG_THRSH_1000        _SB_MAKE64(0)
 342
 343 #define K_MAC_SLOT_SIZE_10          _SB_MAKE64(0)
 344 #define K_MAC_SLOT_SIZE_100         _SB_MAKE64(0)
 345 #define K_MAC_SLOT_SIZE_1000        _SB_MAKE64(0)
 346
 347 #define V_MAC_IFG_RX_10        V_MAC_IFG_RX(K_MAC_IFG_RX_10)
 348 #define V_MAC_IFG_RX_100       V_MAC_IFG_RX(K_MAC_IFG_RX_100)
 349 #define V_MAC_IFG_RX_1000      V_MAC_IFG_RX(K_MAC_IFG_RX_1000)
 350
 351 #define V_MAC_IFG_TX_10        V_MAC_IFG_TX(K_MAC_IFG_TX_10)
 352 #define V_MAC_IFG_TX_100       V_MAC_IFG_TX(K_MAC_IFG_TX_100)
 353 #define V_MAC_IFG_TX_1000      V_MAC_IFG_TX(K_MAC_IFG_TX_1000)
 354
 355 #define V_MAC_IFG_THRSH_10     V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_10)
 356 #define V_MAC_IFG_THRSH_100    V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_100)
 357 #define V_MAC_IFG_THRSH_1000   V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_1000)
 358
 359 #define V_MAC_SLOT_SIZE_10     V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_10)
 360 #define V_MAC_SLOT_SIZE_100    V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_100)
 361 #define V_MAC_SLOT_SIZE_1000   V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_1000)
 362
 363 #define K_MAC_MIN_FRAMESZ_FIFO      _SB_MAKE64(9)
 364 #define K_MAC_MIN_FRAMESZ_DEFAULT   _SB_MAKE64(64)
 365 #define K_MAC_MAX_FRAMESZ_DEFAULT   _SB_MAKE64(1518)
 366 #define K_MAC_MAX_FRAMESZ_JUMBO     _SB_MAKE64(9216)
 367
 368 #define V_MAC_MIN_FRAMESZ_FIFO      V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_FIFO)
 369 #define V_MAC_MIN_FRAMESZ_DEFAULT   V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_DEFAULT)
 370 #define V_MAC_MAX_FRAMESZ_DEFAULT   V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_DEFAULT)
 371 #define V_MAC_MAX_FRAMESZ_JUMBO     V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_JUMBO)
 372
 373 /*
 374  * MAC VLAN Tag Registers (Table 9-16)
 375  * Register: MAC_VLANTAG_0
 376  * Register: MAC_VLANTAG_1
 377  * Register: MAC_VLANTAG_2
 378  */
 379
 380 #define S_MAC_VLAN_TAG           _SB_MAKE64(0)
 381 #define M_MAC_VLAN_TAG           _SB_MAKEMASK(32,S_MAC_VLAN_TAG)
 382 #define V_MAC_VLAN_TAG(x)        _SB_MAKEVALUE(x,S_MAC_VLAN_TAG)
 383 #define G_MAC_VLAN_TAG(x)        _SB_GETVALUE(x,S_MAC_VLAN_TAG,M_MAC_VLAN_TAG)
 384
 385 #if SIBYTE_HDR_FEATURE(112x, PASS1)
 386 #define S_MAC_TX_PKT_OFFSET      _SB_MAKE64(32)
 387 #define M_MAC_TX_PKT_OFFSET      _SB_MAKEMASK(8,S_MAC_TX_PKT_OFFSET)
 388 #define V_MAC_TX_PKT_OFFSET(x)   _SB_MAKEVALUE(x,S_MAC_TX_PKT_OFFSET)
 389 #define G_MAC_TX_PKT_OFFSET(x)   _SB_GETVALUE(x,S_MAC_TX_PKT_OFFSET,M_MAC_TX_PKT_OFFSET)
 390
 391 #define S_MAC_TX_CRC_OFFSET      _SB_MAKE64(40)
 392 #define M_MAC_TX_CRC_OFFSET      _SB_MAKEMASK(8,S_MAC_TX_CRC_OFFSET)
 393 #define V_MAC_TX_CRC_OFFSET(x)   _SB_MAKEVALUE(x,S_MAC_TX_CRC_OFFSET)
 394 #define G_MAC_TX_CRC_OFFSET(x)   _SB_GETVALUE(x,S_MAC_TX_CRC_OFFSET,M_MAC_TX_CRC_OFFSET)
 395
 396 #define M_MAC_CH_BASE_FC_EN      _SB_MAKEMASK1(48)
 397 #endif /* 112x PASS1 */
 398
 399 /*
 400  * MAC Status Registers (Table 9-17)
 401  * Also used for the MAC Interrupt Mask Register (Table 9-18)
 402  * Register: MAC_STATUS_0
 403  * Register: MAC_STATUS_1
 404  * Register: MAC_STATUS_2
 405  * Register: MAC_INT_MASK_0
 406  * Register: MAC_INT_MASK_1
 407  * Register: MAC_INT_MASK_2
 408  */
 409
 410 /*
 411  * Use these constants to shift the appropriate channel
 412  * into the CH0 position so the same tests can be used
 413  * on each channel.
 414  */
 415
 416 #define S_MAC_RX_CH0                _SB_MAKE64(0)
 417 #define S_MAC_RX_CH1                _SB_MAKE64(8)
 418 #define S_MAC_TX_CH0                _SB_MAKE64(16)
 419 #define S_MAC_TX_CH1                _SB_MAKE64(24)
 420
 421 #define S_MAC_TXCHANNELS            _SB_MAKE64(16)      /* this is 1st TX chan */
 422 #define S_MAC_CHANWIDTH             _SB_MAKE64(8)       /* bits between channels */
 423
 424 /*
 425  *  These are the same as RX channel 0.  The idea here
 426  *  is that you'll use one of the "S_" things above
 427  *  and pass just the six bits to a DMA-channel-specific ISR
 428  */
 429 #define M_MAC_INT_CHANNEL           _SB_MAKEMASK(8,0)
 430 #define M_MAC_INT_EOP_COUNT         _SB_MAKEMASK1(0)
 431 #define M_MAC_INT_EOP_TIMER         _SB_MAKEMASK1(1)
 432 #define M_MAC_INT_EOP_SEEN          _SB_MAKEMASK1(2)
 433 #define M_MAC_INT_HWM               _SB_MAKEMASK1(3)
 434 #define M_MAC_INT_LWM               _SB_MAKEMASK1(4)
 435 #define M_MAC_INT_DSCR              _SB_MAKEMASK1(5)
 436 #define M_MAC_INT_ERR               _SB_MAKEMASK1(6)
 437 #define M_MAC_INT_DZERO             _SB_MAKEMASK1(7)    /* only for TX channels */
 438 #define M_MAC_INT_DROP              _SB_MAKEMASK1(7)    /* only for RX channels */
 439
 440 /*
 441  * In the following definitions we use ch (0/1) and txrx (TX=1, RX=0, see
 442  * also DMA_TX/DMA_RX in sb_regs.h).
 443  */
 444 #define S_MAC_STATUS_CH_OFFSET(ch,txrx) _SB_MAKE64(((ch) + 2 * (txrx)) * S_MAC_CHANWIDTH)
 445
 446 #define M_MAC_STATUS_CHANNEL(ch,txrx)   _SB_MAKEVALUE(_SB_MAKEMASK(8,0),S_MAC_STATUS_CH_OFFSET(ch,txrx))
 447 #define M_MAC_STATUS_EOP_COUNT(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_COUNT,S_MAC_STATUS_CH_OFFSET(ch,txrx))
 448 #define M_MAC_STATUS_EOP_TIMER(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_TIMER,S_MAC_STATUS_CH_OFFSET(ch,txrx))
 449 #define M_MAC_STATUS_EOP_SEEN(ch,txrx)  _SB_MAKEVALUE(M_MAC_INT_EOP_SEEN,S_MAC_STATUS_CH_OFFSET(ch,txrx))
 450 #define M_MAC_STATUS_HWM(ch,txrx)       _SB_MAKEVALUE(M_MAC_INT_HWM,S_MAC_STATUS_CH_OFFSET(ch,txrx))
 451 #define M_MAC_STATUS_LWM(ch,txrx)       _SB_MAKEVALUE(M_MAC_INT_LWM,S_MAC_STATUS_CH_OFFSET(ch,txrx))
 452 #define M_MAC_STATUS_DSCR(ch,txrx)      _SB_MAKEVALUE(M_MAC_INT_DSCR,S_MAC_STATUS_CH_OFFSET(ch,txrx))
 453 #define M_MAC_STATUS_ERR(ch,txrx)       _SB_MAKEVALUE(M_MAC_INT_ERR,S_MAC_STATUS_CH_OFFSET(ch,txrx))
 454 #define M_MAC_STATUS_DZERO(ch,txrx)     _SB_MAKEVALUE(M_MAC_INT_DZERO,S_MAC_STATUS_CH_OFFSET(ch,txrx))
 455 #define M_MAC_STATUS_DROP(ch,txrx)      _SB_MAKEVALUE(M_MAC_INT_DROP,S_MAC_STATUS_CH_OFFSET(ch,txrx))
 456 #define M_MAC_STATUS_OTHER_ERR          _SB_MAKEVALUE(_SB_MAKEMASK(7,0),40)
 457
 458
 459 #define M_MAC_RX_UNDRFL             _SB_MAKEMASK1(40)
 460 #define M_MAC_RX_OVRFL              _SB_MAKEMASK1(41)
 461 #define M_MAC_TX_UNDRFL             _SB_MAKEMASK1(42)
 462 #define M_MAC_TX_OVRFL              _SB_MAKEMASK1(43)
 463 #define M_MAC_LTCOL_ERR             _SB_MAKEMASK1(44)
 464 #define M_MAC_EXCOL_ERR             _SB_MAKEMASK1(45)
 465 #define M_MAC_CNTR_OVRFL_ERR        _SB_MAKEMASK1(46)
 466 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
 467 #define M_MAC_SPLIT_EN              _SB_MAKEMASK1(47)   /* interrupt mask only */
 468 #endif /* 1250 PASS2 || 112x PASS1 */
 469
 470 #define S_MAC_COUNTER_ADDR          _SB_MAKE64(47)
 471 #define M_MAC_COUNTER_ADDR          _SB_MAKEMASK(5,S_MAC_COUNTER_ADDR)
 472 #define V_MAC_COUNTER_ADDR(x)       _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR)
 473 #define G_MAC_COUNTER_ADDR(x)       _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR)
 474
 475 #if SIBYTE_HDR_FEATURE(112x, PASS1)
 476 #define M_MAC_TX_PAUSE_ON           _SB_MAKEMASK1(52)
 477 #endif /* 112x PASS1 */
 478
 479 /*
 480  * MAC Fifo Pointer Registers (Table 9-19)    [Debug register]
 481  * Register: MAC_FIFO_PTRS_0
 482  * Register: MAC_FIFO_PTRS_1
 483  * Register: MAC_FIFO_PTRS_2
 484  */
 485
 486 #define S_MAC_TX_WRPTR              _SB_MAKE64(0)
 487 #define M_MAC_TX_WRPTR              _SB_MAKEMASK(6,S_MAC_TX_WRPTR)
 488 #define V_MAC_TX_WRPTR(x)           _SB_MAKEVALUE(x,S_MAC_TX_WRPTR)
 489 #define G_MAC_TX_WRPTR(x)           _SB_GETVALUE(x,S_MAC_TX_WRPTR,M_MAC_TX_WRPTR)
 490
 491 #define S_MAC_TX_RDPTR              _SB_MAKE64(8)
 492 #define M_MAC_TX_RDPTR              _SB_MAKEMASK(6,S_MAC_TX_RDPTR)
 493 #define V_MAC_TX_RDPTR(x)           _SB_MAKEVALUE(x,S_MAC_TX_RDPTR)
 494 #define G_MAC_TX_RDPTR(x)           _SB_GETVALUE(x,S_MAC_TX_RDPTR,M_MAC_TX_RDPTR)
 495
 496 #define S_MAC_RX_WRPTR              _SB_MAKE64(16)
 497 #define M_MAC_RX_WRPTR              _SB_MAKEMASK(6,S_MAC_RX_WRPTR)
 498 #define V_MAC_RX_WRPTR(x)           _SB_MAKEVALUE(x,S_MAC_RX_WRPTR)
 499 #define G_MAC_RX_WRPTR(x)           _SB_GETVALUE(x,S_MAC_RX_WRPTR,M_MAC_TX_WRPTR)
 500
 501 #define S_MAC_RX_RDPTR              _SB_MAKE64(24)
 502 #define M_MAC_RX_RDPTR              _SB_MAKEMASK(6,S_MAC_RX_RDPTR)
 503 #define V_MAC_RX_RDPTR(x)           _SB_MAKEVALUE(x,S_MAC_RX_RDPTR)
 504 #define G_MAC_RX_RDPTR(x)           _SB_GETVALUE(x,S_MAC_RX_RDPTR,M_MAC_TX_RDPTR)
 505
 506 /*
 507  * MAC Fifo End Of Packet Count Registers (Table 9-20)  [Debug register]
 508  * Register: MAC_EOPCNT_0
 509  * Register: MAC_EOPCNT_1
 510  * Register: MAC_EOPCNT_2
 511  */
 512
 513 #define S_MAC_TX_EOP_COUNTER        _SB_MAKE64(0)
 514 #define M_MAC_TX_EOP_COUNTER        _SB_MAKEMASK(6,S_MAC_TX_EOP_COUNTER)
 515 #define V_MAC_TX_EOP_COUNTER(x)     _SB_MAKEVALUE(x,S_MAC_TX_EOP_COUNTER)
 516 #define G_MAC_TX_EOP_COUNTER(x)     _SB_GETVALUE(x,S_MAC_TX_EOP_COUNTER,M_MAC_TX_EOP_COUNTER)
 517
 518 #define S_MAC_RX_EOP_COUNTER        _SB_MAKE64(8)
 519 #define M_MAC_RX_EOP_COUNTER        _SB_MAKEMASK(6,S_MAC_RX_EOP_COUNTER)
 520 #define V_MAC_RX_EOP_COUNTER(x)     _SB_MAKEVALUE(x,S_MAC_RX_EOP_COUNTER)
 521 #define G_MAC_RX_EOP_COUNTER(x)     _SB_GETVALUE(x,S_MAC_RX_EOP_COUNTER,M_MAC_RX_EOP_COUNTER)
 522
 523 /*
 524  * MAC Recieve Address Filter Exact Match Registers (Table 9-21)
 525  * Registers: MAC_ADDR0_0 through MAC_ADDR7_0
 526  * Registers: MAC_ADDR0_1 through MAC_ADDR7_1
 527  * Registers: MAC_ADDR0_2 through MAC_ADDR7_2
 528  */
 529
 530 /* No bitfields */
 531
 532 /*
 533  * MAC Receive Address Filter Mask Registers
 534  * Registers: MAC_ADDRMASK0_0 and MAC_ADDRMASK0_1
 535  * Registers: MAC_ADDRMASK1_0 and MAC_ADDRMASK1_1
 536  * Registers: MAC_ADDRMASK2_0 and MAC_ADDRMASK2_1
 537  */
 538
 539 /* No bitfields */
 540
 541 /*
 542  * MAC Recieve Address Filter Hash Match Registers (Table 9-22)
 543  * Registers: MAC_HASH0_0 through MAC_HASH7_0
 544  * Registers: MAC_HASH0_1 through MAC_HASH7_1
 545  * Registers: MAC_HASH0_2 through MAC_HASH7_2
 546  */
 547
 548 /* No bitfields */
 549
 550 /*
 551  * MAC Transmit Source Address Registers (Table 9-23)
 552  * Register: MAC_ETHERNET_ADDR_0
 553  * Register: MAC_ETHERNET_ADDR_1
 554  * Register: MAC_ETHERNET_ADDR_2
 555  */
 556
 557 /* No bitfields */
 558
 559 /*
 560  * MAC Packet Type Configuration Register
 561  * Register: MAC_TYPE_CFG_0
 562  * Register: MAC_TYPE_CFG_1
 563  * Register: MAC_TYPE_CFG_2
 564  */
 565
 566 #define S_TYPECFG_TYPESIZE      _SB_MAKE64(16)
 567
 568 #define S_TYPECFG_TYPE0         _SB_MAKE64(0)
 569 #define M_TYPECFG_TYPE0         _SB_MAKEMASK(16,S_TYPECFG_TYPE0)
 570 #define V_TYPECFG_TYPE0(x)      _SB_MAKEVALUE(x,S_TYPECFG_TYPE0)
 571 #define G_TYPECFG_TYPE0(x)      _SB_GETVALUE(x,S_TYPECFG_TYPE0,M_TYPECFG_TYPE0)
 572
 573 #define S_TYPECFG_TYPE1         _SB_MAKE64(0)
 574 #define M_TYPECFG_TYPE1         _SB_MAKEMASK(16,S_TYPECFG_TYPE1)
 575 #define V_TYPECFG_TYPE1(x)      _SB_MAKEVALUE(x,S_TYPECFG_TYPE1)
 576 #define G_TYPECFG_TYPE1(x)      _SB_GETVALUE(x,S_TYPECFG_TYPE1,M_TYPECFG_TYPE1)
 577
 578 #define S_TYPECFG_TYPE2         _SB_MAKE64(0)
 579 #define M_TYPECFG_TYPE2         _SB_MAKEMASK(16,S_TYPECFG_TYPE2)
 580 #define V_TYPECFG_TYPE2(x)      _SB_MAKEVALUE(x,S_TYPECFG_TYPE2)
 581 #define G_TYPECFG_TYPE2(x)      _SB_GETVALUE(x,S_TYPECFG_TYPE2,M_TYPECFG_TYPE2)
 582
 583 #define S_TYPECFG_TYPE3         _SB_MAKE64(0)
 584 #define M_TYPECFG_TYPE3         _SB_MAKEMASK(16,S_TYPECFG_TYPE3)
 585 #define V_TYPECFG_TYPE3(x)      _SB_MAKEVALUE(x,S_TYPECFG_TYPE3)
 586 #define G_TYPECFG_TYPE3(x)      _SB_GETVALUE(x,S_TYPECFG_TYPE3,M_TYPECFG_TYPE3)
 587
 588 /*
 589  * MAC Receive Address Filter Control Registers (Table 9-24)
 590  * Register: MAC_ADFILTER_CFG_0
 591  * Register: MAC_ADFILTER_CFG_1
 592  * Register: MAC_ADFILTER_CFG_2
 593  */
 594
 595 #define M_MAC_ALLPKT_EN         _SB_MAKEMASK1(0)
 596 #define M_MAC_UCAST_EN          _SB_MAKEMASK1(1)
 597 #define M_MAC_UCAST_INV         _SB_MAKEMASK1(2)
 598 #define M_MAC_MCAST_EN          _SB_MAKEMASK1(3)
 599 #define M_MAC_MCAST_INV         _SB_MAKEMASK1(4)
 600 #define M_MAC_BCAST_EN          _SB_MAKEMASK1(5)
 601 #define M_MAC_DIRECT_INV        _SB_MAKEMASK1(6)
 602 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
 603 #define M_MAC_ALLMCAST_EN       _SB_MAKEMASK1(7)
 604 #endif /* 1250 PASS2 || 112x PASS1 */
 605
 606 #define S_MAC_IPHDR_OFFSET      _SB_MAKE64(8)
 607 #define M_MAC_IPHDR_OFFSET      _SB_MAKEMASK(8,S_MAC_IPHDR_OFFSET)
 608 #define V_MAC_IPHDR_OFFSET(x)   _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET)
 609 #define G_MAC_IPHDR_OFFSET(x)   _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET)
 610
 611 #if SIBYTE_HDR_FEATURE(112x, PASS1)
 612 #define S_MAC_RX_CRC_OFFSET     _SB_MAKE64(16)
 613 #define M_MAC_RX_CRC_OFFSET     _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET)
 614 #define V_MAC_RX_CRC_OFFSET(x)  _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET)
 615 #define G_MAC_RX_CRC_OFFSET(x)  _SB_GETVALUE(x,S_MAC_RX_CRC_OFFSET,M_MAC_RX_CRC_OFFSET)
 616
 617 #define S_MAC_RX_PKT_OFFSET     _SB_MAKE64(24)
 618 #define M_MAC_RX_PKT_OFFSET     _SB_MAKEMASK(8,S_MAC_RX_PKT_OFFSET)
 619 #define V_MAC_RX_PKT_OFFSET(x)  _SB_MAKEVALUE(x,S_MAC_RX_PKT_OFFSET)
 620 #define G_MAC_RX_PKT_OFFSET(x)  _SB_GETVALUE(x,S_MAC_RX_PKT_OFFSET,M_MAC_RX_PKT_OFFSET)
 621
 622 #define M_MAC_FWDPAUSE_EN       _SB_MAKEMASK1(32)
 623 #define M_MAC_VLAN_DET_EN       _SB_MAKEMASK1(33)
 624
 625 #define S_MAC_RX_CH_MSN_SEL     _SB_MAKE64(34)
 626 #define M_MAC_RX_CH_MSN_SEL     _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL)
 627 #define V_MAC_RX_CH_MSN_SEL(x)  _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL)
 628 #define G_MAC_RX_CH_MSN_SEL(x)  _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL)
 629 #endif /* 112x PASS1 */
 630
 631 /*
 632  * MAC Receive Channel Select Registers (Table 9-25)
 633  */
 634
 635 /* no bitfields */
 636
 637 /*
 638  * MAC MII Management Interface Registers (Table 9-26)
 639  * Register: MAC_MDIO_0
 640  * Register: MAC_MDIO_1
 641  * Register: MAC_MDIO_2
 642  */
 643
 644 #define S_MAC_MDC               0
 645 #define S_MAC_MDIO_DIR          1
 646 #define S_MAC_MDIO_OUT          2
 647 #define S_MAC_GENC              3
 648 #define S_MAC_MDIO_IN           4
 649
 650 #define M_MAC_MDC               _SB_MAKEMASK1(S_MAC_MDC)
 651 #define M_MAC_MDIO_DIR          _SB_MAKEMASK1(S_MAC_MDIO_DIR)
 652 #define M_MAC_MDIO_DIR_INPUT    _SB_MAKEMASK1(S_MAC_MDIO_DIR)
 653 #define M_MAC_MDIO_OUT          _SB_MAKEMASK1(S_MAC_MDIO_OUT)
 654 #define M_MAC_GENC              _SB_MAKEMASK1(S_MAC_GENC)
 655 #define M_MAC_MDIO_IN           _SB_MAKEMASK1(S_MAC_MDIO_IN)
 656
 657 #endif