release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/sb1250_jtag.h

   1 /*  *********************************************************************
   2     *  SB1250 Board Support Package
   3     *
   4     *  JTAG Constants and Macros                File: sb1250_jtag.h
   5     *
   6     *  This module contains constants and macros useful for
   7     *  manipulating the System Control and Debug module on the 1250.
   8     *
   9     *  SB1250 specification level:  User's manual 1/02/02
  10     *
  11     *  Author:  Kip Walker (kwalker@broadcom.com)
  12     *
  13     *********************************************************************
  14     *
  15     *  Copyright 2000,2001,2002,2003
  16     *  Broadcom Corporation. All rights reserved.
  17     *
  18     *  This software is furnished under license and may be used and
  19     *  copied only in accordance with the following terms and
  20     *  conditions.  Subject to these conditions, you may download,
  21     *  copy, install, use, modify and distribute modified or unmodified
  22     *  copies of this software in source and/or binary form.  No title
  23     *  or ownership is transferred hereby.
  24     *
  25     *  1) Any source code used, modified or distributed must reproduce
  26     *     and retain this copyright notice and list of conditions
  27     *     as they appear in the source file.
  28     *
  29     *  2) No right is granted to use any trade name, trademark, or
  30     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  31     *     name may not be used to endorse or promote products derived
  32     *     from this software without the prior written permission of
  33     *     Broadcom Corporation.
  34     *
  35     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  36     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  37     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  38     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  39     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  40     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  41     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  42     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  43     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  44     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  45     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  46     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  47     *     THE POSSIBILITY OF SUCH DAMAGE.
  48     ********************************************************************* */
  49
  50 #ifndef _SB1250_JTAG_H
  51 #define _SB1250_JTAG_H
  52
  53 #include "sb1250_defs.h"
  54
  55 #define SB1250_IDCODE_VAL  0x112502a1
  56 #define SB1250_IMPCODE_VAL 0x20814001
  57
  58 /*
  59  * JTAG Memory region
  60  */
  61
  62 #define K_SCD_JTAG_MEMBASE        0x0010000000
  63 #define K_SCD_JTAG_MEMSIZE        0x0000020000
  64 #define K_SCD_JTAG_MEMTOP         (K_SCD_JTAG_MEMBASE+K_SCD_JTAG_MEMSIZE)
  65
  66
  67 /*
  68  * JTAG Instruction Register values
  69  */
  70
  71 #define SB1250_EXTEST     0x00
  72 #define SB1250_IDCODE     0x01
  73 #define SB1250_IMPCODE    0x03
  74 #define SB1250_ADDRESS    0x08
  75 #define SB1250_DATA       0x09
  76 #define SB1250_CONTROL    0x0A
  77 #define SB1250_EJTAGALL   0x0B
  78 #define SB1250_EJTAGBOOT  0x0C
  79 #define SB1250_NORMALBOOT 0x0D
  80 #define SB1250_SYSCTRL    0x20
  81 #define SB1250_TRACE      0x21
  82 #define SB1250_PERF       0x22
  83 #define SB1250_TRCTRL     0x23
  84 #define SB1250_WAFERID    0x24
  85 #define SB1250_PMON       0x25
  86 #define SB1250_CPU0OSC    0x26
  87 #define SB1250_CPU0DSC    0x27
  88 #define SB1250_CPU0TSC    0x28
  89 #define SB1250_CPU1OSC    0x2A
  90 #define SB1250_CPU1DSC    0x2B
  91 #define SB1250_CPU1TSC    0x2C
  92 #define SB1250_SCANIOB0   0x2E
  93 #define SB1250_SCANIOB1   0x30
  94 #define SB1250_SCANL2C    0x32
  95 #define SB1250_SCANMC     0x34
  96 #define SB1250_SCANSCD    0x36
  97 #define SB1250_SCANALL    0x38
  98 #define SB1250_BSRMODE    0x3A
  99 #define SB1250_SCANTRCCNT 0x3B
 100 #define SB1250_CLAMP      0x3C
 101 #define SB1250_SAMPLE     0x3D
 102 #define SB1250_INTEST     0x3E
 103 #define SB1250_BYPASS     0x3F
 104
 105 /*
 106  * IDCODE
 107  */
 108
 109 #define S_JTAG_REVISION              _SB_MAKE32(28)
 110 #define M_JTAG_REVISION              _SB_MAKEMASK(4,S_JTAG_REVISION)
 111 #define V_JTAG_REVISION(x)           _SB_MAKEVALUE(x,S_JTAG_REVISION)
 112 #define G_JTAG_REVISION(x)           _SB_GETVALUE(x,S_JTAG_REVISION,M_JTAG_REVISION)
 113
 114 #define S_JTAG_PARTNUM               _SB_MAKE32(12)
 115 #define M_JTAG_PARTNUM               _SB_MAKEMASK(16,S_JTAG_PARTNUM)
 116 #define V_JTAG_PARTNUM(x)            _SB_MAKEVALUE(x,S_JTAG_PARTNUM)
 117 #define G_JTAG_PARTNUM(x)            _SB_GETVALUE(x,S_JTAG_PARTNUM,M_JTAG_PARTNUM)
 118
 119 /* This field corresponds to system revision SOC_TYPE field */
 120 #define S_JTAG_PART_TYPE             _SB_MAKE32(12)
 121 #define M_JTAG_PART_TYPE             _SB_MAKEMASK(4,S_JTAG_PART_TYPE)
 122 #define V_JTAG_PART_TYPE(x)          _SB_MAKEVALUE(x,S_JTAG_PART_TYPE)
 123 #define G_JTAG_PART_TYPE(x)          _SB_GETVALUE(x,S_JTAG_PART_TYPE,M_JTAG_PART_TYPE)
 124
 125 #define S_JTAG_PART_L2               _SB_MAKE32(16)
 126 #define M_JTAG_PART_L2               _SB_MAKEMASK(4,S_JTAG_PART_L2)
 127 #define V_JTAG_PART_L2(x)            _SB_MAKEVALUE(x,S_JTAG_PART_L2)
 128 #define G_JTAG_PART_L2(x)            _SB_GETVALUE(x,S_JTAG_PART_L2,M_JTAG_PART_L2)
 129
 130 #define K_JTAG_PART_L2_512           5
 131 #define K_JTAG_PART_L2_256           2
 132 #define K_JTAG_PART_L2_128           1
 133
 134 #define S_JTAG_PART_PERIPH           _SB_MAKE32(12)
 135 #define M_JTAG_PART_PERIPH           _SB_MAKEMASK(4,S_JTAG_PART_PERIPH)
 136 #define V_JTAG_PART_PERIPH(x)        _SB_MAKEVALUE(x,S_JTAG_PART_PERIPH)
 137 #define G_JTAG_PART_PERIPH(x)        _SB_GETVALUE(x,S_JTAG_PART_PERIPH,M_JTAG_PART_PERIPH)
 138
 139 #define K_JTAG_PART_PERIPH_PCIHT     4
 140 #define K_JTAG_PART_PERIPH_PCI       3
 141 #define K_JTAG_PART_PERIPH_NONE      1
 142
 143
 144 /*
 145  * EJTAG Control Register (Table 15-14)
 146  */
 147
 148 #define M_JTAG_CR_DM0             _SB_MAKEMASK1(0)
 149 #define M_JTAG_CR_DM1             _SB_MAKEMASK1(1)
 150 #define M_JTAG_CR_EJTAGBreak0     _SB_MAKEMASK1(2)
 151 #define M_JTAG_CR_EJTAGBreak1     _SB_MAKEMASK1(3)
 152 #define M_JTAG_CR_PrTrap0         _SB_MAKEMASK1(4)
 153 #define M_JTAG_CR_PrTrap1         _SB_MAKEMASK1(5)
 154 #define M_JTAG_CR_ProbEn          _SB_MAKEMASK1(6)
 155 #define M_JTAG_CR_PrAcc           _SB_MAKEMASK1(7)
 156 #define M_JTAG_CR_PW              _SB_MAKEMASK1(8)
 157 #define M_JTAG_CR_PbAcc           _SB_MAKEMASK1(9)
 158 #define M_JTAG_CR_MaSl            _SB_MAKEMASK1(10)
 159 #define M_JTAG_CR_ClkStopped      _SB_MAKEMASK1(11)
 160
 161 #define M_JTAG_CR_READ_ONLY       (M_JTAG_CR_DM0 | M_JTAG_CR_DM1 | M_JTAG_CR_ClkStopped)
 162
 163 #define G_JTAG_CR_EJTAGBreak(cpu) (M_JTAG_CR_EJTAGBreak0 << (cpu))
 164 #define G_JTAG_CR_PrTrap(cpu)     (M_JTAG_CR_PrTrap0 << (cpu))
 165
 166 /*
 167  * System Config "extension" bits 104:64 (Table 15-5)
 168  */
 169
 170 #define S_SYS_PLLPHASE              0
 171 #define M_SYS_PLLPHASE              _SB_MAKEMASK(2,S_SYS_PLLPHASE)
 172 #define V_SYS_PLLPHASE(x)           _SB_MAKEVALUE(x,S_SYS_PLLPHASE)
 173 #define G_SYS_PLLPHASE(x)           _SB_GETVALUE(x,S_SYS_PLLPHASE,M_SYS_PLLPHASE)
 174
 175 #define S_SYS_PLLCOUNT              2
 176 #define M_SYS_PLLCOUNT              _SB_MAKEMASK(30,S_SYS_PLLCOUNT)
 177 #define V_SYS_PLLCOUNT(x)           _SB_MAKEVALUE(x,S_SYS_PLLCOUNT)
 178 #define G_SYS_PLLCOUNT(x)           _SB_GETVALUE(x,S_SYS_PLLCOUNT,M_SYS_PLLCOUNT)
 179
 180 #define M_SYS_PLLSTOP               _SB_MAKEMASK1(32)
 181 #define M_SYS_STOPSTRETCH           _SB_MAKEMASK1(33)
 182 #define M_SYS_STARTCOND             _SB_MAKEMASK1(34)
 183 #define M_SYS_STOPPING              _SB_MAKEMASK1(35)
 184 #define M_SYS_STOPSTRDONE           _SB_MAKEMASK1(36)
 185 #define M_SYS_SERZB_ARD             _SB_MAKEMASK1(37)
 186 #define M_SYS_SERZB_AR              _SB_MAKEMASK1(38)
 187
 188 #define S_SYS_STRETCHMODE           39
 189 #define M_SYS_STRETCHMODE           _SB_MAKEMASK(2,S_SYS_STRETCHMODE)
 190 #define V_SYS_STRETCHMODE(x)        _SB_MAKEVALUE(x,S_SYS_STRETCHMODE)
 191 #define G_SYS_STRETCHMODE(x)        _SB_GETVALUE(x,S_SYS_STRETCHMODE,M_SYS_STRETCHMODE)
 192
 193 /*
 194  * ZBbus definitions
 195  */
 196
 197 #define K_ZB_CMD_READ_SHD       0
 198 #define K_ZB_CMD_READ_EXC       1
 199 #define K_ZB_CMD_WRITE          2
 200 #define K_ZB_CMD_WRITEINV       3
 201 #define K_ZB_CMD_INV            4
 202 #define K_ZB_CMD_NOP            7
 203
 204 #define K_ZB_L1CA_CNCOH         0
 205 #define K_ZB_L1CA_CCOH          1
 206 #define K_ZB_L1CA_UNC           2
 207 #define K_ZB_L1CA_UNC1          3
 208
 209 #define K_ZB_L2CA_NOALLOC       0
 210 #define K_ZB_L2CA_ALLOC         1
 211
 212 #define K_ZB_DMOD_CLEAN         0
 213 #define K_ZB_DMOD_DIRTY         1
 214
 215 #define K_ZB_DCODE_NOP          0
 216 #define K_ZB_DCODE_VLD          1
 217 #define K_ZB_DCODE_VLD_TCORR    2
 218 #define K_ZB_DCODE_VLD_DCORR    3
 219 #define K_ZB_DCODE_BUSERR       4
 220 #define K_ZB_DCODE_FATAL_BUSERR 5
 221 #define K_ZB_DCODE_TAG_UNCORR   6
 222 #define K_ZB_DCODE_DATA_UNCORR  7
 223
 224 #endif