1 /* *********************************************************************
2 * Broadcom Common Firmware Environment (CFE)
4 * Flash "self-write" module File: flash_write_all.S
6 * This module takes care of the case of writing to the flash
7 * memory that CFE is currently reading its code from. It is
8 * assumed that you'll be doing a complete flash update,
9 * so this code erases the affected sectors, reprograms them,
10 * and jumps to the boot sector.
12 * Note: this code is written to be position-independent, even
13 * for non-PIC versions of CFE! It will be copied (with memcpy)
14 * into the heap for execution.
16 * Author: Mitch Lichtenberg (mpl@broadcom.com)
18 *********************************************************************
20 * Copyright 2000,2001,2002,2003
21 * Broadcom Corporation. All rights reserved.
23 * This software is furnished under license and may be used and
24 * copied only in accordance with the following terms and
25 * conditions. Subject to these conditions, you may download,
26 * copy, install, use, modify and distribute modified or unmodified
27 * copies of this software in source and/or binary form. No title
28 * or ownership is transferred hereby.
30 * 1) Any source code used, modified or distributed must reproduce
31 * and retain this copyright notice and list of conditions
32 * as they appear in the source file.
34 * 2) No right is granted to use any trade name, trademark, or
35 * logo of Broadcom Corporation. The "Broadcom Corporation"
36 * name may not be used to endorse or promote products derived
37 * from this software without the prior written permission of
38 * Broadcom Corporation.
40 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
41 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
42 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
43 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
44 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
45 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
46 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
47 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
48 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
49 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
50 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
51 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
52 * THE POSSIBILITY OF SUCH DAMAGE.
53 ********************************************************************* */
56 #include "dev_flash.h"
57 #include "mipsmacros.h"
59 #define WRITEFLASH(base,offset,value) \
64 /* *********************************************************************
65 * flash_write_all(data,flashbase,size,secsize)
67 * Write bytes to flash, erasing affected sectors first.
70 * a0 - data - pointer to data to write
71 * a1 - flashbase - base (phys addr) of flash area
72 * a2 - size - number of bytes to write
73 * a3 - secsize - flash sector size
77 ********************************************************************* */
90 * Mask all interrupts. An exception with BEV set would be very bad.
93 mfc0 v0,C0_SR # Get current interrupt flag
94 li v1,M_SR_IE # master interrupt control
95 not v1 # disable interrupts
96 and v0,v1 # SR now has IE=0
97 mtc0 v0,C0_SR # put back into CP0
100 * Get KSEG1 addr of flash
107 * Do an "unlock write" sequence (cycles 1-2)
110 WRITEFLASH(flashbase,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
111 WRITEFLASH(flashbase,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)
114 * send the erase command (cycle 3)
117 WRITEFLASH(flashbase,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_ERASE_3)
120 * Do an "unlock write" sequence (cycles 4-5)
123 WRITEFLASH(flashbase,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
124 WRITEFLASH(flashbase,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)
127 * Send the "erase all" qualifier (cycle 6)
130 WRITEFLASH(flashbase,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_ERASE_ALL_6)
133 * Wait for the erase to complete
136 1: lb t0,0(secptr) # get byte
137 and t0,0xFF # test hi byte
138 bne t0,0xFF,1b # go till bit is set
142 * Okay, now loop through the bytes and write them to the
146 move secptr,flashbase
152 * Do an "unlock write" sequence
155 WRITEFLASH(flashbase,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_MAGIC_1)
156 WRITEFLASH(flashbase,AMD_FLASH_MAGIC_ADDR_2,AMD_FLASH_MAGIC_2)
159 * Send a program command
161 WRITEFLASH(flashbase,AMD_FLASH_MAGIC_ADDR_1,AMD_FLASH_PROGRAM)
168 sb t0,0(secptr) # t0 = byte written to flash
172 * Wait for write to complete
175 1: lbu t2,0(secptr) # t2 = byte from flash
177 and t1,t2,0x80 # done if bit7 of flash
178 and t0,t0,0x80 # is same as bit7 of data
181 and t1,t2,0x20 # not done if bit5
182 bne t1,0x20,1b # is still set
189 add a0,1 # next source byte
190 add secptr,1 # next dest byte
191 sub datasize,1 # one less count
192 bgt datasize,0,proglp
195 * All done, reboot system
206 /* *********************************************************************
208 ********************************************************************* */
212 .globl flash_write_all_ptr
213 .globl flash_write_all_len
216 _VECT_ flash_write_all
218 .word flash_write_all_end-flash_write_all