release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/ptswarm/include/bsp_config.h

   1 /*  *********************************************************************
   2     *  Broadcom Common Firmware Environment (CFE)
   3     *
   4     *  BSP Configuration file                   File: bsp_config.h
   5     *
   6     *  This module contains global parameters and conditional
   7     *  compilation settings for building CFE.
   8     *
   9     *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
  10     *
  11     *  modification history
  12     *  --------------------
  13     *  01b,14dec01,jmb  added serial clock for external UART
  14     *  01a,10dec01,jmb  modified for ptswarm board.  Got rid of FATFS and
  15     *                   disabled multi-cpu support when used in flash writing
  16     *                   program
  17     *
  18     *********************************************************************
  19     *
  20     *  Copyright 2000,2001,2002,2003
  21     *  Broadcom Corporation. All rights reserved.
  22     *
  23     *  This software is furnished under license and may be used and
  24     *  copied only in accordance with the following terms and
  25     *  conditions.  Subject to these conditions, you may download,
  26     *  copy, install, use, modify and distribute modified or unmodified
  27     *  copies of this software in source and/or binary form.  No title
  28     *  or ownership is transferred hereby.
  29     *
  30     *  1) Any source code used, modified or distributed must reproduce
  31     *     and retain this copyright notice and list of conditions
  32     *     as they appear in the source file.
  33     *
  34     *  2) No right is granted to use any trade name, trademark, or
  35     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  36     *     name may not be used to endorse or promote products derived
  37     *     from this software without the prior written permission of
  38     *     Broadcom Corporation.
  39     *
  40     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  41     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  42     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  43     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  44     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  45     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  46     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  47     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  48     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  49     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  50     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  51     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  52     *     THE POSSIBILITY OF SUCH DAMAGE.
  53     ********************************************************************* */
  54
  55
  56
  57 #define CFG_INIT_L1             1       /* initialize the L1 cache */
  58 #define CFG_INIT_L2             1       /* initialize the L2 cache */
  59
  60 #define CFG_INIT_DRAM           1       /* initialize DRAM controller */
  61 #define CFG_DRAM_SIZE           xxx     /* size of DRAM if you don't initialize */
  62
  63 #define CFG_NETWORK             1       /* define to include network support */
  64
  65 #define CFG_UI                  1       /* Define to enable user interface */
  66
  67 #ifdef _UNICPU_
  68 #define CFG_MULTI_CPUS          0       /* Define to include multiple CPU support */
  69 #else
  70 #define CFG_MULTI_CPUS          1       /* Define to include multiple CPU support */
  71 #endif
  72
  73 #define CFG_HEAP_SIZE           1024    /* heap size in kilobytes */
  74
  75 #define CFG_STACK_SIZE          8192    /* stack size (bytes, rounded up to K) */
  76
  77
  78 /*
  79  * These parameters control the flash driver's sector buffer.
  80  * If you write environment variables or make small changes to
  81  * flash sectors from user applications, you
  82  * need to have the heap big enough to store a temporary sector
  83  * for merging in small changes to flash sectors, so you
  84  * should set CFG_FLASH_ALLOC_SECTOR_BUFFER in that case.
  85  * Otherwise, you can provide an address in unallocated memory
  86  * of where to place the sector buffer.
  87  */
  88
  89 #define CFG_FLASH_ALLOC_SECTOR_BUFFER 0 /* '1' to allocate sector buffer from the heap */
  90 #define CFG_FLASH_SECTOR_BUFFER_ADDR (100*1024*1024-128*1024)   /* 100MB - 128K */
  91 #define CFG_FLASH_SECTOR_BUFFER_SIZE (128*1024)
  92
  93 /*
  94  * The flash staging buffer is where we store a flash image before we write
  95  * it to the flash.  It's too big for the heap.
  96  */
  97
  98 #define CFG_FLASH_STAGING_BUFFER_ADDR (100*1024*1024)
  99 #define CFG_FLASH_STAGING_BUFFER_SIZE (4*1024*1024)
 100
 101 /*
 102  * These parameters control the default DRAM init table
 103  * inside of sb1250_draminit.c.
 104  */
 105
 106
 107 #define CFG_DRAM_ECC            1       /* Turn on to enable ECC */
 108 #define CFG_DRAM_SMBUS_CHANNEL  0       /* SMBus channel for memory SPDs */
 109 #define CFG_DRAM_SMBUS_BASE     0x54    /* starting SMBus device base */
 110 #define CFG_DRAM_BLOCK_SIZE     32      /* don't interleave columns */
 111 #define CFG_DRAM_CSINTERLEAVE   0       /* Use 0,1, or 2. Max number of address
 112                                            bits allowed for chip select
 113                                            interleaving. Only matching dimms
 114                                            will be interleaved.  3 outcomes:
 115                                            no interleaving, interleave CS 0 &
 116                                            1, and interleave CS 0,1,2 & 3. */
 117 #define CFG_DRAM_INTERLEAVE     1       /* interleave channels if possible */
 118
 119 /* N.B.:  Some P.C.s can't talk this fast ! */
 120
 121 #define CFG_SERIAL_BAUD_RATE    115200  /* normal console speed */
 122
 123 /*
 124 * The ptswarm board has an EXAR st16550 UART on the I/O bus at chip select 2.
 125 * It is compatible with an NS16550, which is supported by CFE.
 126 * Our clock crytal is twice as fast as the default, so here's the override.
 127 */
 128 #define NS16550_HZ      3686400         /* serial clock for the external UART */
 129
 130
 131 #define CFG_VENDOR_EXTENSIONS   0
 132
 133 #include "ptswarm.h"