release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/p6064/include/i8254.h

   1 /*
   2  * i8254.h: definitions for i8254 programmable interval timer in P5064
   3  *
   4  * Copyright (c) 1997-1999, Algorithmics Ltd.  All rights reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the "Free MIPS" License Agreement, a copy of
   8  * which is available at:
   9  *
  10  *  http://www.algor.co.uk/ftp/pub/doc/freemips-license.txt
  11  *
  12  * You may not, however, modify or remove any part of this copyright
  13  * message if this program is redistributed or reused in whole or in
  14  * part.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * "Free MIPS" License for more details.
  20  */
  21
  22 /* Timer 0 is clock interrupt (irq0)
  23  * Timer 1 is refresh clock
  24  * Timer 2 is speaker tone
  25  */
  26
  27 #define PT_CLOCK        0
  28 #define PT_REFRESH      1
  29 #define PT_SPEAKER      2
  30 #define PT_CONTROL      3
  31
  32 #ifndef __ASSEMBLER__
  33 struct i8254 {
  34         unsigned char   pt_counter0;
  35         unsigned char   pt_counter1;
  36         unsigned char   pt_counter2;
  37         unsigned char   pt_control;
  38 };
  39
  40 #define pt_clock        pt_counter0
  41 #define pt_refresh      pt_counter1
  42 #define pt_speaker      pt_counter2
  43
  44 #else
  45
  46 #define PT_REG(x)       (x)
  47
  48 #endif
  49
  50 /*
  51  * control word definitions
  52  */
  53 #define PTCW_RBCMD      (3<<6)          /* read-back command */
  54  #define  PTCW_RB_NCNT   0x20              /* rb: no count */
  55  #define  PTCW_RB_NSTAT  0x10              /* rb: no status */
  56  #define  PTCW_RB_SC(x)  (0x02<<(x))       /* rb: select counter x */
  57 #define PTCW_SC(x)      ((x)<<6)        /* select counter x */
  58 #define PTCW_CLCMD      (0<<4)          /* counter latch command */
  59 #define PTCW_LSB        (1<<4)          /* r/w least signif. byte only */
  60 #define PTCW_MSB        (2<<4)          /* r/w most signif. byte only */
  61 #define PTCW_16B        (3<<4)          /* r/w 16 bits, lsb then msb */
  62 #define PTCW_MODE(x)    ((x)<<1)        /* set mode to x */
  63 #define PTCW_BCD        0x1             /* operate in BCD mode */
  64
  65 /*
  66  * Status word definitions
  67  */
  68 #define PTSW_OUTPUT     0x80            /* output pin active */
  69 #define PTSW_NULL       0x40            /* null count */
  70
  71 /*
  72  * Mode definitions
  73  */
  74 #define MODE_ITC        0               /* interrupt on terminal count */
  75 #define MODE_HROS       1               /* hw retriggerable one-shot */
  76 #define MODE_RG         2               /* rate generator */
  77 #define MODE_SQW        3               /* square wave generator */
  78 #define MODE_STS        4               /* software triggered strobe */
  79 #define MODE_HTS        5               /* hardware triggered strobe */
  80
  81 #define PT_CRYSTAL      14318180        /* timer crystal hz (ticks/sec) */