release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/lausanne/src/lausanne_pci.c

   1 /*  *********************************************************************
   2     *  Broadcom Common Firmware Environment (CFE)
   3     *
   4     *  Board device initialization              File: lausanne_pci.c
   5     *
   6     *  This is the part of the board support package for boards
   7     *  that support PCI. It describes the board-specific slots/devices
   8     *  and wiring thereof.
   9     *
  10     *********************************************************************
  11     *
  12     *  Copyright 2000,2001,2002,2003
  13     *  Broadcom Corporation. All rights reserved.
  14     *
  15     *  This software is furnished under license and may be used and
  16     *  copied only in accordance with the following terms and
  17     *  conditions.  Subject to these conditions, you may download,
  18     *  copy, install, use, modify and distribute modified or unmodified
  19     *  copies of this software in source and/or binary form.  No title
  20     *  or ownership is transferred hereby.
  21     *
  22     *  1) Any source code used, modified or distributed must reproduce
  23     *     and retain this copyright notice and list of conditions
  24     *     as they appear in the source file.
  25     *
  26     *  2) No right is granted to use any trade name, trademark, or
  27     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  28     *     name may not be used to endorse or promote products derived
  29     *     from this software without the prior written permission of
  30     *     Broadcom Corporation.
  31     *
  32     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  33     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  34     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  35     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  36     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  37     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  38     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  39     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  40     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  41     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  42     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  43     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  44     *     THE POSSIBILITY OF SUCH DAMAGE.
  45     ********************************************************************* */
  46
  47 #include "lib_types.h"
  48
  49 #include "pcireg.h"
  50 #include "pcivar.h"
  51
  52 /* PCI interrupt mapping on the Lausanne board:
  53    Device ids 5, 6, 7 and 8 are implemented as PCI connectors,
  54    and there are no on-board devices.
  55
  56    Slot    IDSEL   DevID  INT{A,B,C,D}   shift
  57   (PHB)      -       0       {A,-,-,-}     0
  58   (LHB)      -       1       not connected
  59     0       16       5       {A,B,C,D}     0 (identity)
  60     1       17       6       {B,C,D,A}     1 (A->B, B->C, C->D, D->A)
  61     2       18       7       {C,D,A,B}     2 (A->C, B->D, C->A, D->B)
  62     3       19       8       {D,A,B,C}     3 (A->D, B->A, C->B, D->C)
  63
  64    Device 1 is the LDT host bridge, which is disabled on this board.
  65 */
  66
  67 extern int _pciverbose;
  68
  69 /* Return the base shift of a slot or device on the motherboard.
  70    This is board specific, for the Lausanne only. */
  71 uint8_t
  72 pci_int_shift_0(pcitag_t tag)
  73 {
  74     int bus, device;
  75
  76     pci_break_tag(tag, NULL, &bus, &device, NULL);
  77
  78     if (bus != 0)
  79         return 0;
  80     switch (device) {
  81     case 0:
  82         return 0;
  83     case 5: case 6: case 7: case 8:
  84         return ((device - 5) % 4);
  85     default:
  86         return 0;
  87     }
  88 }
  89
  90 /* Return the mapping of a Lausanne device/function interrupt to an
  91    interrupt line.  For the SB-1250, return 1-4 to indicate the
  92    pci_inta - pci_intd inputs to the interrupt mapper, respectively,
  93    or 0 if there is no mapping.  This is board specific, and the
  94    version below is for Lausanne only. */
  95 uint8_t
  96 pci_int_map_0(pcitag_t tag)
  97 {
  98     pcireg_t data;
  99     int pin, bus, device;
 100
 101     data = pci_conf_read(tag, PCI_BPARAM_INTERRUPT_REG);
 102     pin = PCI_INTERRUPT_PIN(data);
 103     if (pin == 0) {
 104         /* No IRQ used. */
 105         return 0;
 106     }
 107     if (pin > 4) {
 108         if (_pciverbose >= 1)
 109             pci_tagprintf(tag, "pci_map_int: bad interrupt pin %d\n", pin);
 110         return 0;
 111     }
 112
 113     pci_break_tag(tag, NULL, &bus, &device, NULL);
 114
 115     if (bus != 0)
 116         return 0;
 117
 118     switch (device) {
 119     case 0:
 120     case 5: case 6: case 7: case 8:
 121         return (((pin - 1) + pci_int_shift_0(tag)) % 4) + 1;
 122     default:
 123         return 0;
 124     }
 125 }