GUI: Fix Tomato RAF theme for all builds. Compilation typo.
[tomato.git] / release / src-rt-6.x.4708 / cfe / cfe / arch / mips / board / cswarm / include / bsp_config.h
blobc48a1e53d8f119b9947ea51ac40908b0f139e62f
1 /* *********************************************************************
2 * Broadcom Common Firmware Environment (CFE)
3 *
4 * BSP Configuration file File: bsp_config.h
5 *
6 * This module contains global parameters and conditional
7 * compilation settings for building CFE.
8 *
9 * Author: Mitch Lichtenberg (mpl@broadcom.com)
11 *********************************************************************
13 * Copyright 2000,2001,2002,2003
14 * Broadcom Corporation. All rights reserved.
16 * This software is furnished under license and may be used and
17 * copied only in accordance with the following terms and
18 * conditions. Subject to these conditions, you may download,
19 * copy, install, use, modify and distribute modified or unmodified
20 * copies of this software in source and/or binary form. No title
21 * or ownership is transferred hereby.
23 * 1) Any source code used, modified or distributed must reproduce
24 * and retain this copyright notice and list of conditions
25 * as they appear in the source file.
27 * 2) No right is granted to use any trade name, trademark, or
28 * logo of Broadcom Corporation. The "Broadcom Corporation"
29 * name may not be used to endorse or promote products derived
30 * from this software without the prior written permission of
31 * Broadcom Corporation.
33 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
34 * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
35 * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
36 * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
37 * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
38 * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
39 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
40 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
41 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
42 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
43 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
44 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
45 * THE POSSIBILITY OF SUCH DAMAGE.
46 ********************************************************************* */
50 #define CFG_INIT_L1 1 /* initialize the L1 cache */
51 #define CFG_INIT_L2 1 /* initialize the L2 cache */
53 #define CFG_INIT_DRAM 1 /* initialize DRAM controller */
54 #define CFG_DRAM_SIZE xxx /* size of DRAM if you don't initialize */
56 #define CFG_NETWORK 1 /* define to include network support */
58 #define CFG_FATFS 1
59 #define CFG_UI 1 /* Define to enable user interface */
61 #if defined(_UNICPU_)
62 #define CFG_MULTI_CPUS 0 /* Define to include multiple CPU support */
63 #else
64 #define CFG_MULTI_CPUS 1 /* Define to include multiple CPU support */
65 #endif
67 #define CFG_HEAP_SIZE 1024 /* heap size in kilobytes */
69 #define CFG_STACK_SIZE 8192 /* stack size (bytes, rounded up to K) */
72 * These parameters control the flash driver's sector buffer.
73 * If you write environment variables or make small changes to
74 * flash sectors from user applications, you
75 * need to have the heap big enough to store a temporary sector
76 * for merging in small changes to flash sectors, so you
77 * should set CFG_FLASH_ALLOC_SECTOR_BUFFER in that case.
78 * Otherwise, you can provide an address in unallocated memory
79 * of where to place the sector buffer.
82 #define CFG_FLASH_ALLOC_SECTOR_BUFFER 0 /* '1' to allocate sector buffer from the heap */
83 #define CFG_FLASH_SECTOR_BUFFER_ADDR (100*1024*1024-128*1024) /* 100MB - 128K */
84 #define CFG_FLASH_SECTOR_BUFFER_SIZE (128*1024)
87 * The flash staging buffer is where we store a flash image before we write
88 * it to the flash. It's too big for the heap.
91 #define CFG_FLASH_STAGING_BUFFER_ADDR (100*1024*1024)
92 #define CFG_FLASH_STAGING_BUFFER_SIZE (4*1024*1024)
95 * These parameters control the default DRAM init table
96 * inside of sb1250_draminit.c.
99 #define CFG_DRAM_INTERLEAVE 1 /* interleave the channels if possible */
101 #if CFG_RUNFROMKSEG0
102 #define CFG_DRAM_ECC 1 /* Turn on to enable ECC */
103 #else
104 #define CFG_DRAM_ECC 0 /* Turn on to enable ECC (don't ecc if uncached) */
105 #endif
107 #define CFG_DRAM_SMBUS_CHANNEL 0 /* SMBus channel for memory SPDs */
108 #define CFG_DRAM_SMBUS_BASE 0x54 /* starting SMBus device base */
109 #define CFG_DRAM_SMBUS_NDIMMS 4 /* total number of DIMM slots */
110 #define CFG_DRAM_BLOCK_SIZE 32 /* don't interleave columns */
111 #define CFG_DRAM_CSINTERLEAVE 2 /* Use 0,1, or 2. Max number of address
112 bits allowed for chip select
113 interleaving. Only matching dimms
114 will be interleaved. 3 outcomes:
115 no interleaving, interleave CS 0 &
116 1, and interleave CS 0,1,2 & 3. */
118 #define CFG_SERIAL_BAUD_RATE 115200 /* normal console speed */
120 #define CFG_VENDOR_EXTENSIONS 0
123 * Include board-specific stuff
125 #include "cswarm.h"