release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/c3/src/c3_pci.c

   1 /*  *********************************************************************
   2     *  Broadcom Common Firmware Environment (CFE)
   3     *
   4     *  Board device initialization              File: c3_pci.c
   5     *
   6     *  This is the part of the board support package for boards
   7     *  that support PCI. It describes the board-specific slots/devices
   8     *  and wiring thereof.
   9     *
  10     *********************************************************************
  11     *
  12     *  Copyright 2000,2001,2002,2003
  13     *  Broadcom Corporation. All rights reserved.
  14     *
  15     *  This software is furnished under license and may be used and
  16     *  copied only in accordance with the following terms and
  17     *  conditions.  Subject to these conditions, you may download,
  18     *  copy, install, use, modify and distribute modified or unmodified
  19     *  copies of this software in source and/or binary form.  No title
  20     *  or ownership is transferred hereby.
  21     *
  22     *  1) Any source code used, modified or distributed must reproduce
  23     *     and retain this copyright notice and list of conditions
  24     *     as they appear in the source file.
  25     *
  26     *  2) No right is granted to use any trade name, trademark, or
  27     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  28     *     name may not be used to endorse or promote products derived
  29     *     from this software without the prior written permission of
  30     *     Broadcom Corporation.
  31     *
  32     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  33     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  34     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  35     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  36     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  37     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  38     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  39     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  40     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  41     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  42     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  43     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  44     *     THE POSSIBILITY OF SUCH DAMAGE.
  45     ********************************************************************* */
  46
  47 #include "lib_types.h"
  48
  49 #include "pcireg.h"
  50 #include "pcivar.h"
  51
  52 /* PCI interrupt mapping on the cc3 board:
  53    The cc3 is wired for PCI Device mode and has no interrupt inputs.
  54
  55    The cc3's modified to work in PCI Host mode with a passive backplane
  56    are currently used with a Galileo backplane that wires the interrupt
  57    lines straight through, with no rotation among the connectors.  The
  58    host cc3 can only receive interrupts on line A.
  59 */
  60
  61 extern int _pciverbose;
  62
  63 /* Return the base shift of a slot or device on the motherboard.
  64    This is board specific, for the cc3 only. */
  65 uint8_t
  66 pci_int_shift_0(pcitag_t tag)
  67 {
  68 #ifdef _C3H_
  69     return 0;
  70 #else
  71     return 0;
  72 #endif
  73 }
  74
  75 /* Return the mapping of a cc3 device/function interrupt to an
  76    interrupt line.  For the SB-1250, return 1-4 to indicate the
  77    pci_inta - pci_intd inputs to the interrupt mapper, respectively,
  78    or 0 if there is no mapping. */
  79 uint8_t
  80 pci_int_map_0(pcitag_t tag)
  81 {
  82 #ifdef _C3H_
  83     pcireg_t data;
  84     int pin, bus, device;
  85
  86     data = pci_conf_read(tag, PCI_BPARAM_INTERRUPT_REG);
  87     pin = PCI_INTERRUPT_PIN(data);
  88     if (pin == 0) {
  89         /* No IRQ used. */
  90         return 0;
  91     }
  92     if (pin > 4) {
  93         if (_pciverbose >= 1)
  94             pci_tagprintf(tag, "pci_map_int: bad interrupt pin %d\n", pin);
  95         return 0;
  96     }
  97
  98     pci_break_tag(tag, NULL, &bus, &device, NULL);
  99
 100     return (bus == 0) ? pin : 0;
 101 #else
 102     return 0;
 103 #endif
 104 }