4 Copyright (c) 2002 Broadcom Corporation
6 No portions of this material may be reproduced in any form without the
10 Irvine, California 92619
11 All information contained in this document is Broadcom Corporation
12 company private, proprietary, and trade secret.
16 #ifndef _DEV_BCM6352ENET_H_
17 #define _DEV_BCM6352ENET_H_
21 /*---------------------------------------------------------------------*/
22 /* specify number of BDs and buffers to use */
23 /*---------------------------------------------------------------------*/
26 #define ENET_MAX_BUF_SIZE 1514 /* Body(1500) + EH_SIZE(14) */
27 #define ENET_MAX_MTU_SIZE 1536 /* Body(1500) + EH_SIZE(14) + FCS(4) */
28 /* + BRCM TYPE(2) + BRCM_TAG(4) + */
29 /* RECALCULATE CRC(4) + pad to 16 */
32 #define DMA_MAX_BURST_LENGTH 16 /* in 32 bit words */
36 typedef struct Brcm_Hdr
{
37 unsigned char dAddr
[ETH_ALEN
];/* destination hardware address */
38 unsigned char sAddr
[ETH_ALEN
];/* destination hardware address */
39 uint16_t brcmType
; /* special Broadcom type */
40 uint32_t brcmTag
; /* special Broadcom tag */
41 }__attribute__((packed
)) Brcm_Hdr
;
46 typedef struct bcm6352enet_softc
{
47 unsigned long dualMacMode
; /* dual mac mode */
48 unsigned char macAddr
[ETH_ALEN
];
50 /* transmit variables */
51 volatile DmaChannel
*dmaChannels
;
52 volatile DmaChannel
*txDma
; /* location of transmit DMA register set */
53 unsigned char txBuf
[ENET_MAX_MTU_SIZE
+16];
54 unsigned char *txBufPtr
;
56 /* receive variables */
57 volatile DmaChannel
*rxDma
; /* location of receive DMA register set */
58 volatile DmaDesc
*rxBds
; /* Memory location of rx bd ring */
59 volatile DmaDesc
*rxBdAssignPtr
; /* ptr to next rx bd to become full */
60 volatile DmaDesc
*rxBdReadPtr
; /* ptr to next rx bd to be processed */
61 volatile DmaDesc
*rxLastBdPtr
; /* ptr to last allocated rx bd */
62 volatile DmaDesc
*rxFirstBdPtr
; /* ptr to first allocated rx bd */
63 int nrRxBds
; /* number of receive bds */
64 unsigned long rxBufLen
; /* size of rx buffers for DMA */
65 uint16_t chipId
; /* chip's id */
66 uint16_t chipRev
; /* step */
67 unsigned char *rxBuffers
;
68 unsigned char rxMem
[NR_RX_BDS
* (sizeof(DmaDesc
)+ENET_MAX_MTU_SIZE
+16)];
73 #define IncRxBDptr(x, s) if (x == ((bcm6352enet_softc *)s)->rxLastBdPtr) \
74 x = ((bcm6352enet_softc *)s)->rxFirstBdPtr; \
78 /* The Broadcom type and tag fields */
79 #define BRCM_TYPE 0x8874
81 /* header length: DA (6) + SA (6) + BRCM_TYPE (2) + BRCM_TAG (4) */
82 #define HEADER_LENGTH 18
84 /* SMP port bit definition */
85 #define SMP_PORT 0x40 /* frame management port */
86 #define SMP_PORT_ID 0x0A /* management port ID */
87 #define FORWARDING_STATE 0xA0 /* STP state */
88 #define RX_DISABLE 0x01 /* receive disable */
89 #define TX_DISABLE 0x02 /* transmit disable */
90 #define SW_FWDG_EN 0x02 /* software forwarding enabled */
91 #define MANAGED_MODE 0x01 /* managed mode */
93 /* PORT ID definition */
94 #define MANAGEMENT_PORT 10
98 static inline int test_bit(int nr
, volatile void *addr
)
100 return ((1UL << (nr
& 31)) & (((const unsigned int *) addr
)[nr
>> 5])) != 0;
103 static inline void set_bit(int nr
, volatile void * addr
)
106 volatile int *a
= addr
;
109 mask
= 1 << (nr
& 0x1f);
113 static inline void clear_bit(int nr
, volatile void * addr
)
116 volatile int *a
= addr
;
119 mask
= 1 << (nr
& 0x1f);
123 static inline int test_and_set_bit(int nr
, volatile void * addr
)
126 volatile int *a
= addr
;
129 mask
= 1 << (nr
& 0x1f);
130 retval
= (mask
& *a
) != 0;
136 static inline int test_and_clear_bit(int nr
, volatile void * addr
)
139 volatile int *a
= addr
;
142 mask
= 1 << (nr
& 0x1f);
143 retval
= (mask
& *a
) != 0;
149 #endif /* _DEV_BCM6352ENET_H_ */