release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bcm96345/include/6345_intr.h

   1 /*
   2 <:copyright-broadcom
   3
   4  Copyright (c) 2002 Broadcom Corporation
   5  All Rights Reserved
   6  No portions of this material may be reproduced in any form without the
   7  written permission of:
   8           Broadcom Corporation
   9           16215 Alton Parkway
  10           Irvine, California 92619
  11  All information contained in this document is Broadcom Corporation
  12  company private, proprietary, and trade secret.
  13
  14 :>
  15 */
  16 #ifndef __6352_INTR_H
  17 #define __6352_INTR_H
  18
  19 #include "6345_common.h"
  20
  21 #ifdef __cplusplus
  22     extern "C" {
  23 #endif
  24
  25     /*=====================================================================*/
  26     /* BCM-6352 Interrupt Level Assignments                                */
  27     /*=====================================================================*/
  28 #define MIPS_TIMER_INT                  7
  29
  30     /*=====================================================================*/
  31     /* BCM-6352 External Interrupt Level Assignments                       */
  32     /*=====================================================================*/
  33 #define  EXT_IRQ_LEVEL0                 3
  34 #define  EXT_IRQ_LEVEL1                 4
  35 #define  EXT_IRQ_LEVEL2                 5
  36 #define  EXT_IRQ_LEVEL3                 6
  37
  38     /*=====================================================================*/
  39     /* Linux ISR Table Offset                                              */
  40     /*=====================================================================*/
  41 #define EXTERNAL_ISR_TABLE_OFFSET       0x30
  42 #define INTERNAL_ISR_TABLE_OFFSET       0x08
  43 #define DMA_ISR_TABLE_OFFSET            (INTERNAL_ISR_TABLE_OFFSET + 13)
  44
  45     /*=====================================================================*/
  46     /* Logical Peripheral Interrupt IDs                                    */
  47     /*=====================================================================*/
  48
  49     /* DMA channel interrupt IDs */
  50 #define INTERRUPT_ID_EMAC_RX_CHAN       (DMA_ISR_TABLE_OFFSET + EMAC_RX_CHAN)
  51 #define INTERRUPT_ID_EMAC_TX_CHAN       (DMA_ISR_TABLE_OFFSET + EMAC_TX_CHAN)
  52 #define INTERRUPT_ID_EBI_RX_CHAN        (DMA_ISR_TABLE_OFFSET + EBI_RX_CHAN)
  53 #define INTERRUPT_ID_EBI_TX_CHAN        (DMA_ISR_TABLE_OFFSET + EBI_TX_CHAN)
  54 #define INTERRUPT_ID_RESERVED_RX_CHAN   (DMA_ISR_TABLE_OFFSET + RESERVED_RX_CHAN)
  55 #define INTERRUPT_ID_RESERVED_TX_CHAN   (DMA_ISR_TABLE_OFFSET + RESERVED_TX_CHAN)
  56 #define INTERRUPT_ID_USB_BULK_RX_CHAN   (DMA_ISR_TABLE_OFFSET + USB_BULK_RX_CHAN)
  57 #define INTERRUPT_ID_USB_BULK_TX_CHAN   (DMA_ISR_TABLE_OFFSET + USB_BULK_TX_CHAN)
  58 #define INTERRUPT_ID_USB_CNTL_RX_CHAN   (DMA_ISR_TABLE_OFFSET + USB_CNTL_RX_CHAN)
  59 #define INTERRUPT_ID_USB_CNTL_TX_CHAN   (DMA_ISR_TABLE_OFFSET + USB_CNTL_TX_CHAN)
  60 #define INTERRUPT_ID_USB_ISO_RX_CHAN    (DMA_ISR_TABLE_OFFSET + USB_ISO_RX_CHAN)
  61 #define INTERRUPT_ID_USB_ISO_TX_CHAN    (DMA_ISR_TABLE_OFFSET + USB_ISO_TX_CHAN)
  62
  63     /* Internal peripheral interrupt IDs */
  64 #define INTERRUPT_ID_TIMER_IRQ          (INTERNAL_ISR_TABLE_OFFSET +  0)
  65 #define INTERRUPT_ID_UART_IRQ           (INTERNAL_ISR_TABLE_OFFSET +  2)
  66 #define INTERRUPT_ID_ADSL_IRQ           (INTERNAL_ISR_TABLE_OFFSET +  3)
  67 #define INTERRUPT_ID_ATM_IRQ            (INTERNAL_ISR_TABLE_OFFSET +  4)
  68 #define INTERRUPT_ID_USB_IRQ            (INTERNAL_ISR_TABLE_OFFSET +  5)
  69 #define INTERRUPT_ID_EMAC_IRQ           (INTERNAL_ISR_TABLE_OFFSET +  8)
  70 #define INTERRUPT_ID_EPHY_IRQ           (INTERNAL_ISR_TABLE_OFFSET +  12)
  71
  72     /* External peripheral interrupt IDs */
  73 #define INTERRUPT_ID_EXTERNAL_0         (EXTERNAL_ISR_TABLE_OFFSET +  0)
  74 #define INTERRUPT_ID_EXTERNAL_1         (EXTERNAL_ISR_TABLE_OFFSET +  1)
  75 #define INTERRUPT_ID_EXTERNAL_2         (EXTERNAL_ISR_TABLE_OFFSET +  2)
  76 #define INTERRUPT_ID_EXTERNAL_3         (EXTERNAL_ISR_TABLE_OFFSET +  3)
  77
  78 #define EXT_INT_0                       0
  79 #define EXT_INT_1                       1
  80 #define EXT_INT_2                       2
  81 #define EXT_INT_3                       3
  82
  83     /* defines */
  84 struct pt_regs;
  85 typedef unsigned int (*FN_ISR) (unsigned int);
  86 typedef void (*FN_HANDLER) (int, void *, struct pt_regs *);
  87
  88     /* prototypes */
  89 extern void enable_brcm_irq(unsigned int irq);
  90 extern void disable_brcm_irq(unsigned int irq);
  91 extern int request_external_irq(unsigned int irq,
  92     void (*handler)(int, void *, struct pt_regs *), unsigned long irqflags,
  93     const char * devname, void *dev_id);
  94 extern unsigned int BcmHalMapInterrupt(FN_ISR isr, unsigned int param,
  95     unsigned int interruptId);
  96 extern void dump_intr_regs(void);
  97
  98     /* compatibility definitions */
  99 #define BcmHalInterruptEnable(irq)      enable_brcm_irq( irq )
 100 #define BcmHalInterruptDisable(irq)     disable_brcm_irq( irq )
 101
 102 #ifdef __cplusplus
 103     }
 104 #endif
 105
 106 #endif  /* __BCM6352_H */