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[tomato.git] / release / src-rt-6.x.4708 / cfe / cfe / arch / arm / board / bcm947xx / include / shmoo.h
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1 /*
2 ** Copyright 2000, 2001 Broadcom Corporation
3 ** All Rights Reserved
4 **
5 ** No portions of this material may be reproduced in any form
6 ** without the written permission of:
7 **
8 ** Broadcom Corporation
9 ** 5300 California Avenue
10 ** Irvine, California 92617
12 ** All information contained in this document is Broadcom
13 ** Corporation company private proprietary, and trade secret.
15 ** ----------------------------------------------------------
17 **
19 ** $Id:: platform_shmoo_priv.h 1758 2012-08-17 15:14:03Z gennady $:
20 ** $Rev::file = : Global SVN Revision = 1780 $:
24 /* platform_shmoo_priv.h */
26 #ifndef PLATFORM_SHMOO_PRIV_H__
27 #define PLATFORM_SHMOO_PRIV_H__
29 /* SHMOO defines
31 * Each word lane is made up of two byte lanes
33 #define BL_PER_WL 2
35 #define DEFAULT_BIT_COUNT 16
37 #define USE_MSA 0
38 #define USE_MIPS 0
41 #define uart_out UART_OUT
44 * Previously it was BLOCK_SIZE and there was a conflict with the defines
45 * in the linux kernel header file
47 #define SHMOO_BLOCK_SIZE 64 /* * sizeof(uint32_t) = block size (256 bytes) */
48 #define NUM_BLOCKS 4 /* = # blocks */
49 #define NUM_DATA (SHMOO_BLOCK_SIZE*NUM_BLOCKS) /* = number of uint32_t data */
51 #define MEM_SIZE_BYTES 1024 /* memory test block size in bytes */
52 #define MEM_SIZE_INTS (MEM_SIZE_BYTES/4) /* memory test block size in ints */
55 #define FULL_DEBUG_PRINT 0
56 #define SHMOO_DEBUG_TIME 0
58 /* I/O */
59 /* UART */
60 typedef union pack328_ {
61 unsigned pack32;
62 char pack8[4];
63 } pack328_t;
66 /* Memory controller */
68 /* DIS client */
70 /* Generic DRAM read/write macros and functions
72 /* Read from DRAM address */
73 #define SHMOO_DRAM_READ_32(ADDR) (*((volatile uint32_t*)((ADDR) & (~0x3))))
75 /* Write to DRAM address */
76 #define SHMOO_DRAM_WRITE_32(ADDR, DATA) (*((volatile uint32_t*)((ADDR) & (~0x3)))) = (DATA)
80 * Start and end DRAM addresses
82 #define SHMOO_DRAM_START_ADDR NOT_DEFINED
83 #define SHMOO_DRAM_END_ADDR NOT_DEFINED
87 * Generic registers access
91 * PHY_REG_OFFSET_PER_WL is the offset in address for the two identical registers in difference WL
92 * For BLAST, this difference is 0x200
93 * This is for support a loop to do the same procedures for different WL
95 #define PHY_REG_OFFSET_PER_WL 0x200
96 #define PHY_REG_OFFSET_PER_BL 0x0A0
99 /* Read from the register */
100 #define SHMOO_REG_READ(ADDR) (*((volatile uint32_t*)(ADDR)))
102 /* Write to the register */
103 #define SHMOO_REG_WRITE(ADDR, DATA) (*((volatile uint32_t*)(ADDR))) = (DATA)
107 * Define macros for working with bit fields
109 #if defined(GET_FIELD) || defined(SET_FIELD)
110 #undef BRCM_ALIGN
111 #undef BRCM_BITS
112 #undef BRCM_MASK
113 #undef BRCM_SHIFT
114 #undef GET_FIELD
115 #undef SET_FIELD
116 #endif /* if defined(GET_FIELD) || defined(SET_FIELD) */
118 #define BRCM_ALIGN(c, r, f) c##_##r##_##f##_ALIGN
119 #define BRCM_BITS(c, r, f) c##_##r##_##f##_BITS
120 #define BRCM_MASK(c, r, f) c##_##r##_##f##_MASK
121 #define BRCM_SHIFT(c, r, f) c##_##r##_##f##_SHIFT
123 #define GET_FIELD(m, c, r, f) \
124 ((((m) & BRCM_MASK(c, r, f)) >> BRCM_SHIFT(c, r, f)))
126 #define SET_FIELD(m, c, r, f, d) \
127 ((m) = (((m) & ~BRCM_MASK(c, r, f)) | \
128 (((d) << BRCM_SHIFT(c, r, f)) & BRCM_MASK(c, r, f))))
130 /* ovr_force = ovr_en = 1, ovr_step = v */
131 #define SET_OVR_STEP(v) (0x30000 | ((v) & 0x3F))
134 * Define aliases for the reads and writes
136 * GLOBAL_REG_RBUS_START should be defined in the platform specific files
138 #define tb_r(addr) (*(volatile unsigned *)(addr))
139 #define tb_w(addr, value) *(volatile unsigned *)(addr) = (value)
140 #define RDREG(a) tb_r(GLOBAL_REG_RBUS_START + a)
141 #define WRREG(a, d) tb_w(GLOBAL_REG_RBUS_START + a, d)
144 /* Common defines */
145 #define RD_EN_BYTE_SEL_CHANGE 1
147 #define WORD_STEP_COUNT 2
148 #define BYTE_STEP_COUNT 4
149 #define BYTE_BIT_BASE 2
150 #define RDEN_FIFO_COUNT 2
151 #define RDEN_BYTE_STEPS 4
152 #define RDEN_WORD_STEPS 2
154 #define WR_50PER_CALIB 1
155 #define WR_33PER_CALIB 0
159 * BITS per Word Lane.
161 #define BITS_PER_WL 16
162 #define BITS_PER_BL 8
163 #define WRDQ_MASK 0xFF
164 #define WRDM_STEPS 4
165 #define WRDQ_VALS 16
167 #define VDL_STEPS 64
168 #define VDL_END VDL_STEPS
169 #define PASS_BIT 0
170 #define FAIL_BIT 1
171 #define FAIL_TO_LOOK_FOR 2
173 #define MAX_BIT_TO_CHECK 6
174 #define FAIL_BIT_TO_CHECK 1
176 #define NO_WL_PRINT 2
177 #define PAGE 4
179 #define WR_VDL_FIXED_DLY 8
180 #define WR_VDL_TOTAL_CNT 3
181 #define WR_VDL_MAJOR_CNT 2
182 #define K_WIN_SIZE 4
184 #define ADDRC_BIT_COUNT 1
186 /* This specifies the size of Memory to use for DIS-0 during shmoo */
187 #define DIS_SIZE_ADDR 0x3E80
189 /* Timeout magic number,
190 * may be redefined in the platfrom_*.h files
192 #define TIMEOUT_VAL 9000
194 #define CR 0xd
195 #define LF 0xa
196 #define ZERO 0x30
197 #define ONE 0x31
198 #define SPACE 0x20
200 #ifndef ARRAY_SIZE
201 #define ARRAY_SIZE(A) (sizeof(A) / sizeof(A[0]))
202 #endif
204 #define NL() UART_OUT(CR); UART_OUT(LF); /* need {} when used after an if statement */
206 /* Private function declarations */
207 void UART_OUT(unsigned int val);
208 void plot_name(pack328_t name, int wl);
209 void plot_dec_number(unsigned int val);
210 void plot_hex_number(unsigned int val);
213 /* #define WR_VDL_45deg 1 */
214 #define WR_VDL_22p5deg 1
215 /* #define WR_VDL_67p5deg 1 */
216 /* #define WR_VDL_90deg 1 */
219 /* Set this define to 1 to use TMT method to generate the data to read/write
220 * to memory during shmoo
222 * Set this define to 0 to use 0xAAAAAAAA and 0x55555555 patterns for the data
224 #define SHMOO_USE_TMT 1
226 /* Set this define to 1 in order to use memory copy function
227 * (useful for Northstar platform)
229 #define SHMOO_USE_MEMCPY 1
232 #define SHMOO_REL_YEAR 2012
233 #define SHMOO_REL_MONTH 6
234 #define SHMOO_REL_DAY 1
236 * The date code is packed as YYYYMMDD. ie, 20110618
238 #define SHMOO_REL_DATE ((SHMOO_REL_YEAR<<16) | (SHMOO_REL_MONTH << 8) | SHMOO_REL_DAY)
241 #define SHMOO_VER_MAJ 0x1
242 /* these 2 moved to makefile */
243 #define SHMOO_VER_MIN 0x1
244 #define SHMOO_VER_MIN2 0x3
246 #define SHMOO_VER_MIN_LONG ((SHMOO_VER_MIN<<4)|SHMOO_VER_MIN2)
248 #ifdef USE_16BIT
249 #define PHY_DATA_WIDTH 0x16
250 #warning CAPABILITY WILL SHOW 16b
251 #else
252 #define PHY_DATA_WIDTH 0x32
253 #endif
254 #define PHY_DW_POS 24
255 #define PHY_WL_COUNT 0x02
256 #define PHY_WL_POS 16
258 #define SHMOO_VJ_POS 8
260 #define SHMOO_VER_MAJOR (SHMOO_VER_MAJ+0x30)
261 #define SHMOO_VER_MINOR (SHMOO_VER_MIN+0x30)
262 #define SHMOO_VER_MINOR2 (SHMOO_VER_MIN2+0x30)
263 #define BTOA(A) (A+0x30)
265 #define SHMOO_VERSION ((PHY_DATA_WIDTH << PHY_DW_POS) | \
266 (PHY_WL_COUNT << PHY_WL_POS) | \
267 (SHMOO_VER_MAJ << SHMOO_VJ_POS) | \
268 SHMOO_VER_MIN_LONG)
271 #ifdef IS_ENG_VER
272 #define ENG_VER_MARKER UART_OUT(SHMOO_IS_ENG); UART_OUT(SHMOO_ENG_VER);
273 #else
274 #define ENG_VER_MARKER
275 #endif
277 /* Shmoo VERSION Macro
278 * REVISION STRING
280 #if defined USE_MSA && defined USE_16BIT
282 #define DISP_SHMOO_VER \
283 NL(); \
284 packname.pack32 = 0x4F4D4853; /* SHMO */ \
285 plot_four_chars(packname); \
286 packname.pack32 = 0x4556204F; /* O VE */ \
287 plot_four_chars(packname); \
288 uart_out('R'); \
289 uart_out(' '); \
290 uart_out('M'); \
291 uart_out('S'); \
292 uart_out('A'); \
293 uart_out(' '); \
294 uart_out('1'); \
295 uart_out('6'); \
296 uart_out('b'); \
297 uart_out(' '); \
298 uart_out(BTOA(SHMOO_VER_MAJ)); \
299 uart_out('.'); \
300 uart_out(BTOA(SHMOO_VER_MIN)); \
301 uart_out(BTOA(SHMOO_VER_MIN2)); \
302 ENG_VER_MARKER \
303 NL()
305 #else
307 #define DISP_SHMOO_VER \
308 NL(); \
309 packname.pack32 = 0x4F4D4853; /* SHMO */ \
310 plot_four_chars(packname); \
311 packname.pack32 = 0x4556204F; /* O VE */ \
312 plot_four_chars(packname); \
313 uart_out('R'); \
314 uart_out(' '); \
315 uart_out(BTOA(SHMOO_VER_MAJ)); \
316 uart_out('.'); \
317 uart_out(BTOA(SHMOO_VER_MIN)); \
318 uart_out(BTOA(SHMOO_VER_MIN2)); \
319 ENG_VER_MARKER \
320 NL()
322 #endif /* USE_MSA && USE_16BIT */
324 void SHMOO_FLUSH_DATA_TO_DRAM(ddr40_addr_t Address, unsigned int bytes);
325 void SHMOO_INVALIDATE_DATA_FROM_DRAM(ddr40_addr_t Address, unsigned int bytes);
327 int shmoo_adjust_wr_dly(ddr40_addr_t phy_reg_base, ddr40_addr_t memc_reg_base);
328 int shmoo_adjust_addx_ctrl_delay(ddr40_addr_t phy_reg_base, ddr40_addr_t memc_reg_base,
329 int shift_amount);
331 unsigned int all_shmoo_rd_data_dly_FIFO(ddr40_addr_t phy_reg_base,
332 ddr40_addr_t memc_reg_base, unsigned int option, ddr40_addr_t mem_test_base);
334 unsigned int all_shmoo_RE_byte_FIFO(ddr40_addr_t phy_reg_base,
335 ddr40_addr_t memc_reg_base, unsigned int option, ddr40_addr_t mem_test_base);
337 unsigned int generic_shmoo_calib_rd_dqs(ddr40_addr_t phy_reg_base,
338 ddr40_addr_t memc_reg_base, unsigned int option, ddr40_addr_t mem_test_base);
340 unsigned int generic_shmoo_calib_wr_dq(ddr40_addr_t phy_reg_base,
341 ddr40_addr_t memc_reg_base, unsigned int option, ddr40_addr_t mem_test_base);
343 unsigned int generic_shmoo_calib_wr_dm(ddr40_addr_t phy_reg_base,
344 ddr40_addr_t memc_reg_base, unsigned int option, ddr40_addr_t mem_test_base);
346 unsigned int generic_shmoo_calib_addr(ddr40_addr_t phy_reg_base,
347 ddr40_addr_t memc_reg_base, unsigned int option, ddr40_addr_t mem_test_base);
349 unsigned int mtest_verify(ddr40_addr_t memc_reg_base, ddr40_addr_t addr,
350 unsigned int * data_expected, unsigned long mt_mode, unsigned long wrd_ln);
351 void InitMemory(ddr40_addr_t const Address, unsigned long const nSizeDword,
352 unsigned long const Seed);
353 void InitMemoryV2(ddr40_addr_t Address, unsigned long const nLengthInDwords);
354 void InitMemoryV3(ddr40_addr_t Address, unsigned long const nLengthInDwords, int const j);
355 void CleanMemory(ddr40_addr_t const Address, unsigned long const nLengthInDwords,
356 unsigned int const nMask);
357 unsigned int CheckMemory(ddr40_addr_t const Address, unsigned long const nSizeDword,
358 unsigned int const Seed, unsigned int const wrd_ln);
359 unsigned int CheckMemoryV2(ddr40_addr_t Address, unsigned long const nLengthDwords,
360 unsigned int wrd_ln);
361 unsigned int CheckMemoryV3(ddr40_addr_t Address, unsigned long const nLengthDwords,
362 unsigned int wrd_ln, int const j);
363 unsigned int verify_mem_block_mips(ddr40_addr_t memc_reg_base, ddr40_addr_t addr,
364 unsigned int size, unsigned int mt_mode, int wl);
365 int rewrite_dram_mode_regs(void *sih);
366 int timer_delay(unsigned int delay);
367 void timeout_ns(unsigned int ticks);
369 void CheckTmt(void);
371 #endif /* PLATFORM_SHMOO_PRIV_H__ */