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[tomato.git] / release / src-rt / linux / linux-2.6 / drivers / usb / host / ehci-sched.c
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1 /*
2  * Copyright (c) 2001-2004 by David Brownell
3  * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation; either version 2 of the License, or (at your
8  * option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software Foundation,
17  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  */
20 /* this file is part of ehci-hcd.c */
22 /*-------------------------------------------------------------------------*/
25  * EHCI scheduled transaction support:  interrupt, iso, split iso
26  * These are called "periodic" transactions in the EHCI spec.
27  *
28  * Note that for interrupt transfers, the QH/QTD manipulation is shared
29  * with the "asynchronous" transaction support (control/bulk transfers).
30  * The only real difference is in how interrupt transfers are scheduled.
31  *
32  * For ISO, we make an "iso_stream" head to serve the same role as a QH.
33  * It keeps track of every ITD (or SITD) that's linked, and holds enough
34  * pre-calculated schedule data to make appending to the queue be quick.
35  */
37 static int ehci_get_frame (struct usb_hcd *hcd);
39 /*-------------------------------------------------------------------------*/
42  * periodic_next_shadow - return "next" pointer on shadow list
43  * @periodic: host pointer to qh/itd/sitd
44  * @tag: hardware tag for type of this record
45  */
46 static union ehci_shadow *
47 periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
48                 __hc32 tag)
50         switch (hc32_to_cpu(ehci, tag)) {
51         case Q_TYPE_QH:
52                 return &periodic->qh->qh_next;
53         case Q_TYPE_FSTN:
54                 return &periodic->fstn->fstn_next;
55         case Q_TYPE_ITD:
56                 return &periodic->itd->itd_next;
57         // case Q_TYPE_SITD:
58         default:
59                 return &periodic->sitd->sitd_next;
60         }
63 static __hc32 *
64 shadow_next_periodic(struct ehci_hcd *ehci, union ehci_shadow *periodic,
65                 __hc32 tag)
67         switch (hc32_to_cpu(ehci, tag)) {
68         /* our ehci_shadow.qh is actually software part */
69         case Q_TYPE_QH:
70                 return &periodic->qh->hw->hw_next;
71         /* others are hw parts */
72         default:
73                 return periodic->hw_next;
74         }
77 /* caller must hold ehci->lock */
78 static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
80         union ehci_shadow       *prev_p = &ehci->pshadow[frame];
81         __hc32                  *hw_p = &ehci->periodic[frame];
82         union ehci_shadow       here = *prev_p;
84         /* find predecessor of "ptr"; hw and shadow lists are in sync */
85         while (here.ptr && here.ptr != ptr) {
86                 prev_p = periodic_next_shadow(ehci, prev_p,
87                                 Q_NEXT_TYPE(ehci, *hw_p));
88                 hw_p = shadow_next_periodic(ehci, &here,
89                                 Q_NEXT_TYPE(ehci, *hw_p));
90                 here = *prev_p;
91         }
92         /* an interrupt entry (at list end) could have been shared */
93         if (!here.ptr)
94                 return;
96         /* update shadow and hardware lists ... the old "next" pointers
97          * from ptr may still be in use, the caller updates them.
98          */
99         *prev_p = *periodic_next_shadow(ehci, &here,
100                         Q_NEXT_TYPE(ehci, *hw_p));
102         if (!ehci->use_dummy_qh ||
103             *shadow_next_periodic(ehci, &here, Q_NEXT_TYPE(ehci, *hw_p))
104                         != EHCI_LIST_END(ehci))
105                 *hw_p = *shadow_next_periodic(ehci, &here,
106                                 Q_NEXT_TYPE(ehci, *hw_p));
107         else
108                 *hw_p = ehci->dummy->qh_dma;
111 /* how many of the uframe's 125 usecs are allocated? */
112 static unsigned short
113 periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
115         __hc32                  *hw_p = &ehci->periodic [frame];
116         union ehci_shadow       *q = &ehci->pshadow [frame];
117         unsigned                usecs = 0;
118         struct ehci_qh_hw       *hw;
120         while (q->ptr) {
121                 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
122                 case Q_TYPE_QH:
123                         hw = q->qh->hw;
124                         /* is it in the S-mask? */
125                         if (hw->hw_info2 & cpu_to_hc32(ehci, 1 << uframe))
126                                 usecs += q->qh->usecs;
127                         /* ... or C-mask? */
128                         if (hw->hw_info2 & cpu_to_hc32(ehci,
129                                         1 << (8 + uframe)))
130                                 usecs += q->qh->c_usecs;
131                         hw_p = &hw->hw_next;
132                         q = &q->qh->qh_next;
133                         break;
134                 // case Q_TYPE_FSTN:
135                 default:
136                         /* for "save place" FSTNs, count the relevant INTR
137                          * bandwidth from the previous frame
138                          */
139                         if (q->fstn->hw_prev != EHCI_LIST_END(ehci)) {
140                                 ehci_dbg (ehci, "ignoring FSTN cost ...\n");
141                         }
142                         hw_p = &q->fstn->hw_next;
143                         q = &q->fstn->fstn_next;
144                         break;
145                 case Q_TYPE_ITD:
146                         if (q->itd->hw_transaction[uframe])
147                                 usecs += q->itd->stream->usecs;
148                         hw_p = &q->itd->hw_next;
149                         q = &q->itd->itd_next;
150                         break;
151                 case Q_TYPE_SITD:
152                         /* is it in the S-mask?  (count SPLIT, DATA) */
153                         if (q->sitd->hw_uframe & cpu_to_hc32(ehci,
154                                         1 << uframe)) {
155                                 if (q->sitd->hw_fullspeed_ep &
156                                                 cpu_to_hc32(ehci, 1<<31))
157                                         usecs += q->sitd->stream->usecs;
158                                 else    /* worst case for OUT start-split */
159                                         usecs += HS_USECS_ISO (188);
160                         }
162                         /* ... C-mask?  (count CSPLIT, DATA) */
163                         if (q->sitd->hw_uframe &
164                                         cpu_to_hc32(ehci, 1 << (8 + uframe))) {
165                                 /* worst case for IN complete-split */
166                                 usecs += q->sitd->stream->c_usecs;
167                         }
169                         hw_p = &q->sitd->hw_next;
170                         q = &q->sitd->sitd_next;
171                         break;
172                 }
173         }
174 #ifdef  DEBUG
175         if (usecs > 100)
176                 ehci_err (ehci, "uframe %d sched overrun: %d usecs\n",
177                         frame * 8 + uframe, usecs);
178 #endif
179         return usecs;
182 /*-------------------------------------------------------------------------*/
184 static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
186         if (!dev1->tt || !dev2->tt)
187                 return 0;
188         if (dev1->tt != dev2->tt)
189                 return 0;
190         if (dev1->tt->multi)
191                 return dev1->ttport == dev2->ttport;
192         else
193                 return 1;
196 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
198 /* Which uframe does the low/fullspeed transfer start in?
200  * The parameter is the mask of ssplits in "H-frame" terms
201  * and this returns the transfer start uframe in "B-frame" terms,
202  * which allows both to match, e.g. a ssplit in "H-frame" uframe 0
203  * will cause a transfer in "B-frame" uframe 0.  "B-frames" lag
204  * "H-frames" by 1 uframe.  See the EHCI spec sec 4.5 and figure 4.7.
205  */
206 static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask)
208         unsigned char smask = QH_SMASK & hc32_to_cpu(ehci, mask);
209         if (!smask) {
210                 ehci_err(ehci, "invalid empty smask!\n");
211                 /* uframe 7 can't have bw so this will indicate failure */
212                 return 7;
213         }
214         return ffs(smask) - 1;
217 static const unsigned char
218 max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 58, 0 };
220 /* carryover low/fullspeed bandwidth that crosses uframe boundries */
221 static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
223         int i;
224         for (i=0; i<7; i++) {
225                 if (max_tt_usecs[i] < tt_usecs[i]) {
226                         tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i];
227                         tt_usecs[i] = max_tt_usecs[i];
228                 }
229         }
232 /* How many of the tt's periodic downstream 1000 usecs are allocated?
234  * While this measures the bandwidth in terms of usecs/uframe,
235  * the low/fullspeed bus has no notion of uframes, so any particular
236  * low/fullspeed transfer can "carry over" from one uframe to the next,
237  * since the TT just performs downstream transfers in sequence.
239  * For example two separate 100 usec transfers can start in the same uframe,
240  * and the second one would "carry over" 75 usecs into the next uframe.
241  */
242 static void
243 periodic_tt_usecs (
244         struct ehci_hcd *ehci,
245         struct usb_device *dev,
246         unsigned frame,
247         unsigned short tt_usecs[8]
250         __hc32                  *hw_p = &ehci->periodic [frame];
251         union ehci_shadow       *q = &ehci->pshadow [frame];
252         unsigned char           uf;
254         memset(tt_usecs, 0, 16);
256         while (q->ptr) {
257                 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
258                 case Q_TYPE_ITD:
259                         hw_p = &q->itd->hw_next;
260                         q = &q->itd->itd_next;
261                         continue;
262                 case Q_TYPE_QH:
263                         if (same_tt(dev, q->qh->dev)) {
264                                 uf = tt_start_uframe(ehci, q->qh->hw->hw_info2);
265                                 tt_usecs[uf] += q->qh->tt_usecs;
266                         }
267                         hw_p = &q->qh->hw->hw_next;
268                         q = &q->qh->qh_next;
269                         continue;
270                 case Q_TYPE_SITD:
271                         if (same_tt(dev, q->sitd->urb->dev)) {
272                                 uf = tt_start_uframe(ehci, q->sitd->hw_uframe);
273                                 tt_usecs[uf] += q->sitd->stream->tt_usecs;
274                         }
275                         hw_p = &q->sitd->hw_next;
276                         q = &q->sitd->sitd_next;
277                         continue;
278                 // case Q_TYPE_FSTN:
279                 default:
280                         ehci_dbg(ehci, "ignoring periodic frame %d FSTN\n",
281                                         frame);
282                         hw_p = &q->fstn->hw_next;
283                         q = &q->fstn->fstn_next;
284                 }
285         }
287         carryover_tt_bandwidth(tt_usecs);
289         if (max_tt_usecs[7] < tt_usecs[7])
290                 ehci_err(ehci, "frame %d tt sched overrun: %d usecs\n",
291                         frame, tt_usecs[7] - max_tt_usecs[7]);
295  * Return true if the device's tt's downstream bus is available for a
296  * periodic transfer of the specified length (usecs), starting at the
297  * specified frame/uframe.  Note that (as summarized in section 11.19
298  * of the usb 2.0 spec) TTs can buffer multiple transactions for each
299  * uframe.
301  * The uframe parameter is when the fullspeed/lowspeed transfer
302  * should be executed in "B-frame" terms, which is the same as the
303  * highspeed ssplit's uframe (which is in "H-frame" terms).  For example
304  * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0.
305  * See the EHCI spec sec 4.5 and fig 4.7.
307  * This checks if the full/lowspeed bus, at the specified starting uframe,
308  * has the specified bandwidth available, according to rules listed
309  * in USB 2.0 spec section 11.18.1 fig 11-60.
311  * This does not check if the transfer would exceed the max ssplit
312  * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
313  * since proper scheduling limits ssplits to less than 16 per uframe.
314  */
315 static int tt_available (
316         struct ehci_hcd         *ehci,
317         unsigned                period,
318         struct usb_device       *dev,
319         unsigned                frame,
320         unsigned                uframe,
321         u16                     usecs
324         if ((period == 0) || (uframe >= 7))     /* error */
325                 return 0;
327         for (; frame < ehci->periodic_size; frame += period) {
328                 unsigned short tt_usecs[8];
330                 periodic_tt_usecs (ehci, dev, frame, tt_usecs);
332                 ehci_vdbg(ehci, "tt frame %d check %d usecs start uframe %d in"
333                         " schedule %d/%d/%d/%d/%d/%d/%d/%d\n",
334                         frame, usecs, uframe,
335                         tt_usecs[0], tt_usecs[1], tt_usecs[2], tt_usecs[3],
336                         tt_usecs[4], tt_usecs[5], tt_usecs[6], tt_usecs[7]);
338                 if (max_tt_usecs[uframe] <= tt_usecs[uframe]) {
339                         ehci_vdbg(ehci, "frame %d uframe %d fully scheduled\n",
340                                 frame, uframe);
341                         return 0;
342                 }
344                 /* special case for isoc transfers larger than 125us:
345                  * the first and each subsequent fully used uframe
346                  * must be empty, so as to not illegally delay
347                  * already scheduled transactions
348                  */
349                 if (125 < usecs) {
350                         int ufs = (usecs / 125);
351                         int i;
352                         for (i = uframe; i < (uframe + ufs) && i < 8; i++)
353                                 if (0 < tt_usecs[i]) {
354                                         ehci_vdbg(ehci,
355                                                 "multi-uframe xfer can't fit "
356                                                 "in frame %d uframe %d\n",
357                                                 frame, i);
358                                         return 0;
359                                 }
360                 }
362                 tt_usecs[uframe] += usecs;
364                 carryover_tt_bandwidth(tt_usecs);
366                 /* fail if the carryover pushed bw past the last uframe's limit */
367                 if (max_tt_usecs[7] < tt_usecs[7]) {
368                         ehci_vdbg(ehci,
369                                 "tt unavailable usecs %d frame %d uframe %d\n",
370                                 usecs, frame, uframe);
371                         return 0;
372                 }
373         }
375         return 1;
378 #else
380 /* return true iff the device's transaction translator is available
381  * for a periodic transfer starting at the specified frame, using
382  * all the uframes in the mask.
383  */
384 static int tt_no_collision (
385         struct ehci_hcd         *ehci,
386         unsigned                period,
387         struct usb_device       *dev,
388         unsigned                frame,
389         u32                     uf_mask
392         if (period == 0)        /* error */
393                 return 0;
395         /* note bandwidth wastage:  split never follows csplit
396          * (different dev or endpoint) until the next uframe.
397          * calling convention doesn't make that distinction.
398          */
399         for (; frame < ehci->periodic_size; frame += period) {
400                 union ehci_shadow       here;
401                 __hc32                  type;
402                 struct ehci_qh_hw       *hw;
404                 here = ehci->pshadow [frame];
405                 type = Q_NEXT_TYPE(ehci, ehci->periodic [frame]);
406                 while (here.ptr) {
407                         switch (hc32_to_cpu(ehci, type)) {
408                         case Q_TYPE_ITD:
409                                 type = Q_NEXT_TYPE(ehci, here.itd->hw_next);
410                                 here = here.itd->itd_next;
411                                 continue;
412                         case Q_TYPE_QH:
413                                 hw = here.qh->hw;
414                                 if (same_tt (dev, here.qh->dev)) {
415                                         u32             mask;
417                                         mask = hc32_to_cpu(ehci,
418                                                         hw->hw_info2);
419                                         /* "knows" no gap is needed */
420                                         mask |= mask >> 8;
421                                         if (mask & uf_mask)
422                                                 break;
423                                 }
424                                 type = Q_NEXT_TYPE(ehci, hw->hw_next);
425                                 here = here.qh->qh_next;
426                                 continue;
427                         case Q_TYPE_SITD:
428                                 if (same_tt (dev, here.sitd->urb->dev)) {
429                                         u16             mask;
431                                         mask = hc32_to_cpu(ehci, here.sitd
432                                                                 ->hw_uframe);
433                                         /* FIXME assumes no gap for IN! */
434                                         mask |= mask >> 8;
435                                         if (mask & uf_mask)
436                                                 break;
437                                 }
438                                 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
439                                 here = here.sitd->sitd_next;
440                                 continue;
441                         // case Q_TYPE_FSTN:
442                         default:
443                                 ehci_dbg (ehci,
444                                         "periodic frame %d bogus type %d\n",
445                                         frame, type);
446                         }
448                         /* collision or error */
449                         return 0;
450                 }
451         }
453         /* no collision */
454         return 1;
457 #endif /* CONFIG_USB_EHCI_TT_NEWSCHED */
459 /*-------------------------------------------------------------------------*/
461 static int enable_periodic (struct ehci_hcd *ehci)
463         u32     cmd;
464         int     status;
466         if (ehci->periodic_sched++)
467                 return 0;
469         /* did clearing PSE did take effect yet?
470          * takes effect only at frame boundaries...
471          */
472         status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
473                                              STS_PSS, 0, 9 * 125);
474         if (status)
475                 return status;
477         cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_PSE;
478         ehci_writel(ehci, cmd, &ehci->regs->command);
479         /* posted write ... PSS happens later */
480         ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
482         /* make sure ehci_work scans these */
483         ehci->next_uframe = ehci_readl(ehci, &ehci->regs->frame_index)
484                 % (ehci->periodic_size << 3);
485         if (unlikely(ehci->broken_periodic))
486                 ehci->last_periodic_enable = ktime_get_real();
487         return 0;
490 static int disable_periodic (struct ehci_hcd *ehci)
492         u32     cmd;
493         int     status;
495         if (--ehci->periodic_sched)
496                 return 0;
498         if (unlikely(ehci->broken_periodic)) {
499                 /* delay experimentally determined */
500                 ktime_t safe = ktime_add_us(ehci->last_periodic_enable, 1000);
501                 ktime_t now = ktime_get_real();
502                 s64 delay = ktime_us_delta(safe, now);
504                 if (unlikely(delay > 0))
505                         udelay(delay);
506         }
508         /* did setting PSE not take effect yet?
509          * takes effect only at frame boundaries...
510          */
511         status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
512                                              STS_PSS, STS_PSS, 9 * 125);
513         if (status)
514                 return status;
516         cmd = ehci_readl(ehci, &ehci->regs->command) & ~CMD_PSE;
517         ehci_writel(ehci, cmd, &ehci->regs->command);
518         /* posted write ... */
520         free_cached_lists(ehci);
522         ehci->next_uframe = -1;
523         return 0;
526 /*-------------------------------------------------------------------------*/
528 /* periodic schedule slots have iso tds (normal or split) first, then a
529  * sparse tree for active interrupt transfers.
531  * this just links in a qh; caller guarantees uframe masks are set right.
532  * no FSTN support (yet; ehci 0.96+)
533  */
534 static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
536         unsigned        i;
537         unsigned        period = qh->period;
539         dev_dbg (&qh->dev->dev,
540                 "link qh%d-%04x/%p start %d [%d/%d us]\n",
541                 period, hc32_to_cpup(ehci, &qh->hw->hw_info2)
542                         & (QH_CMASK | QH_SMASK),
543                 qh, qh->start, qh->usecs, qh->c_usecs);
545         /* high bandwidth, or otherwise every microframe */
546         if (period == 0)
547                 period = 1;
549         for (i = qh->start; i < ehci->periodic_size; i += period) {
550                 union ehci_shadow       *prev = &ehci->pshadow[i];
551                 __hc32                  *hw_p = &ehci->periodic[i];
552                 union ehci_shadow       here = *prev;
553                 __hc32                  type = 0;
555                 /* skip the iso nodes at list head */
556                 while (here.ptr) {
557                         type = Q_NEXT_TYPE(ehci, *hw_p);
558                         if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
559                                 break;
560                         prev = periodic_next_shadow(ehci, prev, type);
561                         hw_p = shadow_next_periodic(ehci, &here, type);
562                         here = *prev;
563                 }
565                 /* sorting each branch by period (slow-->fast)
566                  * enables sharing interior tree nodes
567                  */
568                 while (here.ptr && qh != here.qh) {
569                         if (qh->period > here.qh->period)
570                                 break;
571                         prev = &here.qh->qh_next;
572                         hw_p = &here.qh->hw->hw_next;
573                         here = *prev;
574                 }
575                 /* link in this qh, unless some earlier pass did that */
576                 if (qh != here.qh) {
577                         qh->qh_next = here;
578                         if (here.qh)
579                                 qh->hw->hw_next = *hw_p;
580                         wmb ();
581                         prev->qh = qh;
582                         *hw_p = QH_NEXT (ehci, qh->qh_dma);
583                 }
584         }
585         qh->qh_state = QH_STATE_LINKED;
586         qh->xacterrs = 0;
587         qh_get (qh);
589         /* update per-qh bandwidth for usbfs */
590         ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period
591                 ? ((qh->usecs + qh->c_usecs) / qh->period)
592                 : (qh->usecs * 8);
594         /* maybe enable periodic schedule processing */
595         return enable_periodic(ehci);
598 static int qh_unlink_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
600         unsigned        i;
601         unsigned        period;
603         // FIXME:
604         // IF this isn't high speed
605         //   and this qh is active in the current uframe
606         //   (and overlay token SplitXstate is false?)
607         // THEN
608         //   qh->hw_info1 |= __constant_cpu_to_hc32(1 << 7 /* "ignore" */);
610         /* high bandwidth, or otherwise part of every microframe */
611         if ((period = qh->period) == 0)
612                 period = 1;
614         for (i = qh->start; i < ehci->periodic_size; i += period)
615                 periodic_unlink (ehci, i, qh);
617         /* update per-qh bandwidth for usbfs */
618         ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period
619                 ? ((qh->usecs + qh->c_usecs) / qh->period)
620                 : (qh->usecs * 8);
622         dev_dbg (&qh->dev->dev,
623                 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
624                 qh->period,
625                 hc32_to_cpup(ehci, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
626                 qh, qh->start, qh->usecs, qh->c_usecs);
628         /* qh->qh_next still "live" to HC */
629         qh->qh_state = QH_STATE_UNLINK;
630         qh->qh_next.ptr = NULL;
631         qh_put (qh);
633         /* maybe turn off periodic schedule */
634         return disable_periodic(ehci);
637 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
639         unsigned                wait;
640         struct ehci_qh_hw       *hw = qh->hw;
641         int                     rc;
643         /* If the QH isn't linked then there's nothing we can do
644          * unless we were called during a giveback, in which case
645          * qh_completions() has to deal with it.
646          */
647         if (qh->qh_state != QH_STATE_LINKED) {
648                 if (qh->qh_state == QH_STATE_COMPLETING)
649                         qh->needs_rescan = 1;
650                 return;
651         }
653         qh_unlink_periodic (ehci, qh);
655         /* simple/paranoid:  always delay, expecting the HC needs to read
656          * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
657          * expect khubd to clean up after any CSPLITs we won't issue.
658          * active high speed queues may need bigger delays...
659          */
660         if (list_empty (&qh->qtd_list)
661                         || (cpu_to_hc32(ehci, QH_CMASK)
662                                         & hw->hw_info2) != 0)
663                 wait = 2;
664         else
665                 wait = 55;      /* worst case: 3 * 1024 */
667         udelay (wait);
668         qh->qh_state = QH_STATE_IDLE;
669         hw->hw_next = EHCI_LIST_END(ehci);
670         wmb ();
672         qh_completions(ehci, qh);
674         /* reschedule QH iff another request is queued */
675         if (!list_empty(&qh->qtd_list) &&
676                         HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
677                 rc = qh_schedule(ehci, qh);
679                 /* An error here likely indicates handshake failure
680                  * or no space left in the schedule.  Neither fault
681                  * should happen often ...
682                  *
683                  * FIXME kill the now-dysfunctional queued urbs
684                  */
685                 if (rc != 0)
686                         ehci_err(ehci, "can't reschedule qh %p, err %d\n",
687                                         qh, rc);
688         }
691 /*-------------------------------------------------------------------------*/
693 static int check_period (
694         struct ehci_hcd *ehci,
695         unsigned        frame,
696         unsigned        uframe,
697         unsigned        period,
698         unsigned        usecs
699 ) {
700         int             claimed;
702         /* complete split running into next frame?
703          * given FSTN support, we could sometimes check...
704          */
705         if (uframe >= 8)
706                 return 0;
708         /*
709          * 80% periodic == 100 usec/uframe available
710          * convert "usecs we need" to "max already claimed"
711          */
712         usecs = 100 - usecs;
714         /* we "know" 2 and 4 uframe intervals were rejected; so
715          * for period 0, check _every_ microframe in the schedule.
716          */
717         if (unlikely (period == 0)) {
718                 do {
719                         for (uframe = 0; uframe < 7; uframe++) {
720                                 claimed = periodic_usecs (ehci, frame, uframe);
721                                 if (claimed > usecs)
722                                         return 0;
723                         }
724                 } while ((frame += 1) < ehci->periodic_size);
726         /* just check the specified uframe, at that period */
727         } else {
728                 do {
729                         claimed = periodic_usecs (ehci, frame, uframe);
730                         if (claimed > usecs)
731                                 return 0;
732                 } while ((frame += period) < ehci->periodic_size);
733         }
735         // success!
736         return 1;
739 static int check_intr_schedule (
740         struct ehci_hcd         *ehci,
741         unsigned                frame,
742         unsigned                uframe,
743         const struct ehci_qh    *qh,
744         __hc32                  *c_maskp
747         int             retval = -ENOSPC;
748         u8              mask = 0;
750         if (qh->c_usecs && uframe >= 6)         /* FSTN territory? */
751                 goto done;
753         if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
754                 goto done;
755         if (!qh->c_usecs) {
756                 retval = 0;
757                 *c_maskp = 0;
758                 goto done;
759         }
761 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
762         if (tt_available (ehci, qh->period, qh->dev, frame, uframe,
763                                 qh->tt_usecs)) {
764                 unsigned i;
766                 /* TODO : this may need FSTN for SSPLIT in uframe 5. */
767                 for (i=uframe+1; i<8 && i<uframe+4; i++)
768                         if (!check_period (ehci, frame, i,
769                                                 qh->period, qh->c_usecs))
770                                 goto done;
771                         else
772                                 mask |= 1 << i;
774                 retval = 0;
776                 *c_maskp = cpu_to_hc32(ehci, mask << 8);
777         }
778 #else
779         /* Make sure this tt's buffer is also available for CSPLITs.
780          * We pessimize a bit; probably the typical full speed case
781          * doesn't need the second CSPLIT.
782          *
783          * NOTE:  both SPLIT and CSPLIT could be checked in just
784          * one smart pass...
785          */
786         mask = 0x03 << (uframe + qh->gap_uf);
787         *c_maskp = cpu_to_hc32(ehci, mask << 8);
789         mask |= 1 << uframe;
790         if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {
791                 if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,
792                                         qh->period, qh->c_usecs))
793                         goto done;
794                 if (!check_period (ehci, frame, uframe + qh->gap_uf,
795                                         qh->period, qh->c_usecs))
796                         goto done;
797                 retval = 0;
798         }
799 #endif
800 done:
801         return retval;
804 /* "first fit" scheduling policy used the first time through,
805  * or when the previous schedule slot can't be re-used.
806  */
807 static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh)
809         int             status;
810         unsigned        uframe;
811         __hc32          c_mask;
812         unsigned        frame;          /* 0..(qh->period - 1), or NO_FRAME */
813         struct ehci_qh_hw       *hw = qh->hw;
815         qh_refresh(ehci, qh);
816         hw->hw_next = EHCI_LIST_END(ehci);
817         frame = qh->start;
819         /* reuse the previous schedule slots, if we can */
820         if (frame < qh->period) {
821                 uframe = ffs(hc32_to_cpup(ehci, &hw->hw_info2) & QH_SMASK);
822                 status = check_intr_schedule (ehci, frame, --uframe,
823                                 qh, &c_mask);
824         } else {
825                 uframe = 0;
826                 c_mask = 0;
827                 status = -ENOSPC;
828         }
830         /* else scan the schedule to find a group of slots such that all
831          * uframes have enough periodic bandwidth available.
832          */
833         if (status) {
834                 /* "normal" case, uframing flexible except with splits */
835                 if (qh->period) {
836                         int             i;
838                         for (i = qh->period; status && i > 0; --i) {
839                                 frame = ++ehci->random_frame % qh->period;
840                                 for (uframe = 0; uframe < 8; uframe++) {
841                                         status = check_intr_schedule (ehci,
842                                                         frame, uframe, qh,
843                                                         &c_mask);
844                                         if (status == 0)
845                                                 break;
846                                 }
847                         }
849                 /* qh->period == 0 means every uframe */
850                 } else {
851                         frame = 0;
852                         status = check_intr_schedule (ehci, 0, 0, qh, &c_mask);
853                 }
854                 if (status)
855                         goto done;
856                 qh->start = frame;
858                 /* reset S-frame and (maybe) C-frame masks */
859                 hw->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
860                 hw->hw_info2 |= qh->period
861                         ? cpu_to_hc32(ehci, 1 << uframe)
862                         : cpu_to_hc32(ehci, QH_SMASK);
863                 hw->hw_info2 |= c_mask;
864         } else
865                 ehci_dbg (ehci, "reused qh %p schedule\n", qh);
867         /* stuff into the periodic schedule */
868         status = qh_link_periodic (ehci, qh);
869 done:
870         return status;
873 static int intr_submit (
874         struct ehci_hcd         *ehci,
875         struct urb              *urb,
876         struct list_head        *qtd_list,
877         gfp_t                   mem_flags
878 ) {
879         unsigned                epnum;
880         unsigned long           flags;
881         struct ehci_qh          *qh;
882         int                     status;
883         struct list_head        empty;
885         /* get endpoint and transfer/schedule data */
886         epnum = urb->ep->desc.bEndpointAddress;
888         spin_lock_irqsave (&ehci->lock, flags);
890         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
891                         &ehci_to_hcd(ehci)->flags))) {
892                 status = -ESHUTDOWN;
893                 goto done_not_linked;
894         }
895         status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
896         if (unlikely(status))
897                 goto done_not_linked;
899         /* get qh and force any scheduling errors */
900         INIT_LIST_HEAD (&empty);
901         qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv);
902         if (qh == NULL) {
903                 status = -ENOMEM;
904                 goto done;
905         }
906         if (qh->qh_state == QH_STATE_IDLE) {
907                 if ((status = qh_schedule (ehci, qh)) != 0)
908                         goto done;
909         }
911         /* then queue the urb's tds to the qh */
912         qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
913         BUG_ON (qh == NULL);
915         /* ... update usbfs periodic stats */
916         ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
918 done:
919         if (unlikely(status))
920                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
921 done_not_linked:
922         spin_unlock_irqrestore (&ehci->lock, flags);
923         if (status)
924                 qtd_list_free (ehci, urb, qtd_list);
926         return status;
929 /*-------------------------------------------------------------------------*/
931 /* ehci_iso_stream ops work with both ITD and SITD */
933 static struct ehci_iso_stream *
934 iso_stream_alloc (gfp_t mem_flags)
936         struct ehci_iso_stream *stream;
938         stream = kzalloc(sizeof *stream, mem_flags);
939         if (likely (stream != NULL)) {
940                 INIT_LIST_HEAD(&stream->td_list);
941                 INIT_LIST_HEAD(&stream->free_list);
942                 stream->next_uframe = -1;
943                 stream->refcount = 1;
944         }
945         return stream;
948 static void
949 iso_stream_init (
950         struct ehci_hcd         *ehci,
951         struct ehci_iso_stream  *stream,
952         struct usb_device       *dev,
953         int                     pipe,
954         unsigned                interval
957         static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
959         u32                     buf1;
960         unsigned                epnum, maxp;
961         int                     is_input;
962         long                    bandwidth;
964         /*
965          * this might be a "high bandwidth" highspeed endpoint,
966          * as encoded in the ep descriptor's wMaxPacket field
967          */
968         epnum = usb_pipeendpoint (pipe);
969         is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
970         maxp = usb_maxpacket(dev, pipe, !is_input);
971         if (is_input) {
972                 buf1 = (1 << 11);
973         } else {
974                 buf1 = 0;
975         }
977         /* knows about ITD vs SITD */
978         if (dev->speed == USB_SPEED_HIGH) {
979                 unsigned multi = hb_mult(maxp);
981                 stream->highspeed = 1;
983                 maxp = max_packet(maxp);
984                 buf1 |= maxp;
985                 maxp *= multi;
987                 stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum);
988                 stream->buf1 = cpu_to_hc32(ehci, buf1);
989                 stream->buf2 = cpu_to_hc32(ehci, multi);
991                 /* usbfs wants to report the average usecs per frame tied up
992                  * when transfers on this endpoint are scheduled ...
993                  */
994                 stream->usecs = HS_USECS_ISO (maxp);
995                 bandwidth = stream->usecs * 8;
996                 bandwidth /= interval;
998         } else {
999                 u32             addr;
1000                 int             think_time;
1001                 int             hs_transfers;
1003                 addr = dev->ttport << 24;
1004                 if (!ehci_is_TDI(ehci)
1005                                 || (dev->tt->hub !=
1006                                         ehci_to_hcd(ehci)->self.root_hub))
1007                         addr |= dev->tt->hub->devnum << 16;
1008                 addr |= epnum << 8;
1009                 addr |= dev->devnum;
1010                 stream->usecs = HS_USECS_ISO (maxp);
1011                 think_time = dev->tt ? dev->tt->think_time : 0;
1012                 stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time (
1013                                 dev->speed, is_input, 1, maxp));
1014                 hs_transfers = max (1u, (maxp + 187) / 188);
1015                 if (is_input) {
1016                         u32     tmp;
1018                         addr |= 1 << 31;
1019                         stream->c_usecs = stream->usecs;
1020                         stream->usecs = HS_USECS_ISO (1);
1021                         stream->raw_mask = 1;
1023                         /* c-mask as specified in USB 2.0 11.18.4 3.c */
1024                         tmp = (1 << (hs_transfers + 2)) - 1;
1025                         stream->raw_mask |= tmp << (8 + 2);
1026                 } else
1027                         stream->raw_mask = smask_out [hs_transfers - 1];
1028                 bandwidth = stream->usecs + stream->c_usecs;
1029                 bandwidth /= interval << 3;
1031                 /* stream->splits gets created from raw_mask later */
1032                 stream->address = cpu_to_hc32(ehci, addr);
1033         }
1034         stream->bandwidth = bandwidth;
1036         stream->udev = dev;
1038         stream->bEndpointAddress = is_input | epnum;
1039         stream->interval = interval;
1040         stream->maxp = maxp;
1043 static void
1044 iso_stream_put(struct ehci_hcd *ehci, struct ehci_iso_stream *stream)
1046         stream->refcount--;
1048         /* free whenever just a dev->ep reference remains.
1049          * not like a QH -- no persistent state (toggle, halt)
1050          */
1051         if (stream->refcount == 1) {
1052                 int             is_in;
1054                 // BUG_ON (!list_empty(&stream->td_list));
1056                 while (!list_empty (&stream->free_list)) {
1057                         struct list_head        *entry;
1059                         entry = stream->free_list.next;
1060                         list_del (entry);
1062                         /* knows about ITD vs SITD */
1063                         if (stream->highspeed) {
1064                                 struct ehci_itd         *itd;
1066                                 itd = list_entry (entry, struct ehci_itd,
1067                                                 itd_list);
1068                                 dma_pool_free (ehci->itd_pool, itd,
1069                                                 itd->itd_dma);
1070                         } else {
1071                                 struct ehci_sitd        *sitd;
1073                                 sitd = list_entry (entry, struct ehci_sitd,
1074                                                 sitd_list);
1075                                 dma_pool_free (ehci->sitd_pool, sitd,
1076                                                 sitd->sitd_dma);
1077                         }
1078                 }
1080                 is_in = (stream->bEndpointAddress & USB_DIR_IN) ? 0x10 : 0;
1081                 stream->bEndpointAddress &= 0x0f;
1082                 if (stream->ep)
1083                         stream->ep->hcpriv = NULL;
1085                 kfree(stream);
1086         }
1089 static inline struct ehci_iso_stream *
1090 iso_stream_get (struct ehci_iso_stream *stream)
1092         if (likely (stream != NULL))
1093                 stream->refcount++;
1094         return stream;
1097 static struct ehci_iso_stream *
1098 iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
1100         unsigned                epnum;
1101         struct ehci_iso_stream  *stream;
1102         struct usb_host_endpoint *ep;
1103         unsigned long           flags;
1105         epnum = usb_pipeendpoint (urb->pipe);
1106         if (usb_pipein(urb->pipe))
1107                 ep = urb->dev->ep_in[epnum];
1108         else
1109                 ep = urb->dev->ep_out[epnum];
1111         spin_lock_irqsave (&ehci->lock, flags);
1112         stream = ep->hcpriv;
1114         if (unlikely (stream == NULL)) {
1115                 stream = iso_stream_alloc(GFP_ATOMIC);
1116                 if (likely (stream != NULL)) {
1117                         /* dev->ep owns the initial refcount */
1118                         ep->hcpriv = stream;
1119                         stream->ep = ep;
1120                         iso_stream_init(ehci, stream, urb->dev, urb->pipe,
1121                                         urb->interval);
1122                 }
1124         /* if dev->ep [epnum] is a QH, hw is set */
1125         } else if (unlikely (stream->hw != NULL)) {
1126                 ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n",
1127                         urb->dev->devpath, epnum,
1128                         usb_pipein(urb->pipe) ? "in" : "out");
1129                 stream = NULL;
1130         }
1132         /* caller guarantees an eventual matching iso_stream_put */
1133         stream = iso_stream_get (stream);
1135         spin_unlock_irqrestore (&ehci->lock, flags);
1136         return stream;
1139 /*-------------------------------------------------------------------------*/
1141 /* ehci_iso_sched ops can be ITD-only or SITD-only */
1143 static struct ehci_iso_sched *
1144 iso_sched_alloc (unsigned packets, gfp_t mem_flags)
1146         struct ehci_iso_sched   *iso_sched;
1147         int                     size = sizeof *iso_sched;
1149         size += packets * sizeof (struct ehci_iso_packet);
1150         iso_sched = kzalloc(size, mem_flags);
1151         if (likely (iso_sched != NULL)) {
1152                 INIT_LIST_HEAD (&iso_sched->td_list);
1153         }
1154         return iso_sched;
1157 static inline void
1158 itd_sched_init(
1159         struct ehci_hcd         *ehci,
1160         struct ehci_iso_sched   *iso_sched,
1161         struct ehci_iso_stream  *stream,
1162         struct urb              *urb
1165         unsigned        i;
1166         dma_addr_t      dma = urb->transfer_dma;
1168         /* how many uframes are needed for these transfers */
1169         iso_sched->span = urb->number_of_packets * stream->interval;
1171         /* figure out per-uframe itd fields that we'll need later
1172          * when we fit new itds into the schedule.
1173          */
1174         for (i = 0; i < urb->number_of_packets; i++) {
1175                 struct ehci_iso_packet  *uframe = &iso_sched->packet [i];
1176                 unsigned                length;
1177                 dma_addr_t              buf;
1178                 u32                     trans;
1180                 length = urb->iso_frame_desc [i].length;
1181                 buf = dma + urb->iso_frame_desc [i].offset;
1183                 trans = EHCI_ISOC_ACTIVE;
1184                 trans |= buf & 0x0fff;
1185                 if (unlikely (((i + 1) == urb->number_of_packets))
1186                                 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1187                         trans |= EHCI_ITD_IOC;
1188                 trans |= length << 16;
1189                 uframe->transaction = cpu_to_hc32(ehci, trans);
1191                 /* might need to cross a buffer page within a uframe */
1192                 uframe->bufp = (buf & ~(u64)0x0fff);
1193                 buf += length;
1194                 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
1195                         uframe->cross = 1;
1196         }
1199 static void
1200 iso_sched_free (
1201         struct ehci_iso_stream  *stream,
1202         struct ehci_iso_sched   *iso_sched
1205         if (!iso_sched)
1206                 return;
1207         // caller must hold ehci->lock!
1208         list_splice (&iso_sched->td_list, &stream->free_list);
1209         kfree (iso_sched);
1212 static int
1213 itd_urb_transaction (
1214         struct ehci_iso_stream  *stream,
1215         struct ehci_hcd         *ehci,
1216         struct urb              *urb,
1217         gfp_t                   mem_flags
1220         struct ehci_itd         *itd;
1221         dma_addr_t              itd_dma;
1222         int                     i;
1223         unsigned                num_itds;
1224         struct ehci_iso_sched   *sched;
1225         unsigned long           flags;
1227         sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1228         if (unlikely (sched == NULL))
1229                 return -ENOMEM;
1231         itd_sched_init(ehci, sched, stream, urb);
1233         if (urb->interval < 8)
1234                 num_itds = 1 + (sched->span + 7) / 8;
1235         else
1236                 num_itds = urb->number_of_packets;
1238         /* allocate/init ITDs */
1239         spin_lock_irqsave (&ehci->lock, flags);
1240         for (i = 0; i < num_itds; i++) {
1242                 /* free_list.next might be cache-hot ... but maybe
1243                  * the HC caches it too. avoid that issue for now.
1244                  */
1246                 /* prefer previously-allocated itds */
1247                 if (likely (!list_empty(&stream->free_list))) {
1248                         itd = list_entry (stream->free_list.prev,
1249                                         struct ehci_itd, itd_list);
1250                         list_del (&itd->itd_list);
1251                         itd_dma = itd->itd_dma;
1252                 } else {
1253                         spin_unlock_irqrestore (&ehci->lock, flags);
1254                         itd = dma_pool_alloc (ehci->itd_pool, mem_flags,
1255                                         &itd_dma);
1256                         spin_lock_irqsave (&ehci->lock, flags);
1257                         if (!itd) {
1258                                 iso_sched_free(stream, sched);
1259                                 spin_unlock_irqrestore(&ehci->lock, flags);
1260                                 return -ENOMEM;
1261                         }
1262                 }
1264                 memset (itd, 0, sizeof *itd);
1265                 itd->itd_dma = itd_dma;
1266                 list_add (&itd->itd_list, &sched->td_list);
1267         }
1268         spin_unlock_irqrestore (&ehci->lock, flags);
1270         /* temporarily store schedule info in hcpriv */
1271         urb->hcpriv = sched;
1272         urb->error_count = 0;
1273         return 0;
1276 /*-------------------------------------------------------------------------*/
1278 static inline int
1279 itd_slot_ok (
1280         struct ehci_hcd         *ehci,
1281         u32                     mod,
1282         u32                     uframe,
1283         u8                      usecs,
1284         u32                     period
1287         uframe %= period;
1288         do {
1289                 /* can't commit more than 80% periodic == 100 usec */
1290                 if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7)
1291                                 > (100 - usecs))
1292                         return 0;
1294                 /* we know urb->interval is 2^N uframes */
1295                 uframe += period;
1296         } while (uframe < mod);
1297         return 1;
1300 static inline int
1301 sitd_slot_ok (
1302         struct ehci_hcd         *ehci,
1303         u32                     mod,
1304         struct ehci_iso_stream  *stream,
1305         u32                     uframe,
1306         struct ehci_iso_sched   *sched,
1307         u32                     period_uframes
1310         u32                     mask, tmp;
1311         u32                     frame, uf;
1313         mask = stream->raw_mask << (uframe & 7);
1315         /* for IN, don't wrap CSPLIT into the next frame */
1316         if (mask & ~0xffff)
1317                 return 0;
1319         /* this multi-pass logic is simple, but performance may
1320          * suffer when the schedule data isn't cached.
1321          */
1323         /* check bandwidth */
1324         uframe %= period_uframes;
1325         do {
1326                 u32             max_used;
1328                 frame = uframe >> 3;
1329                 uf = uframe & 7;
1331 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
1332                 /* The tt's fullspeed bus bandwidth must be available.
1333                  * tt_available scheduling guarantees 10+% for control/bulk.
1334                  */
1335                 if (!tt_available (ehci, period_uframes << 3,
1336                                 stream->udev, frame, uf, stream->tt_usecs))
1337                         return 0;
1338 #else
1339                 /* tt must be idle for start(s), any gap, and csplit.
1340                  * assume scheduling slop leaves 10+% for control/bulk.
1341                  */
1342                 if (!tt_no_collision (ehci, period_uframes << 3,
1343                                 stream->udev, frame, mask))
1344                         return 0;
1345 #endif
1347                 /* check starts (OUT uses more than one) */
1348                 max_used = 100 - stream->usecs;
1349                 for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) {
1350                         if (periodic_usecs (ehci, frame, uf) > max_used)
1351                                 return 0;
1352                 }
1354                 /* for IN, check CSPLIT */
1355                 if (stream->c_usecs) {
1356                         uf = uframe & 7;
1357                         max_used = 100 - stream->c_usecs;
1358                         do {
1359                                 tmp = 1 << uf;
1360                                 tmp <<= 8;
1361                                 if ((stream->raw_mask & tmp) == 0)
1362                                         continue;
1363                                 if (periodic_usecs (ehci, frame, uf)
1364                                                 > max_used)
1365                                         return 0;
1366                         } while (++uf < 8);
1367                 }
1369                 /* we know urb->interval is 2^N uframes */
1370                 uframe += period_uframes;
1371         } while (uframe < mod);
1373         stream->splits = cpu_to_hc32(ehci, stream->raw_mask << (uframe & 7));
1374         return 1;
1378  * This scheduler plans almost as far into the future as it has actual
1379  * periodic schedule slots.  (Affected by TUNE_FLS, which defaults to
1380  * "as small as possible" to be cache-friendlier.)  That limits the size
1381  * transfers you can stream reliably; avoid more than 64 msec per urb.
1382  * Also avoid queue depths of less than ehci's worst irq latency (affected
1383  * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1384  * and other factors); or more than about 230 msec total (for portability,
1385  * given EHCI_TUNE_FLS and the slop).  Or, write a smarter scheduler!
1386  */
1388 #define SCHEDULE_SLOP   80      /* microframes */
1390 static int
1391 iso_stream_schedule (
1392         struct ehci_hcd         *ehci,
1393         struct urb              *urb,
1394         struct ehci_iso_stream  *stream
1397         u32                     now, next, start, period, span;
1398         int                     status;
1399         unsigned                mod = ehci->periodic_size << 3;
1400         struct ehci_iso_sched   *sched = urb->hcpriv;
1402         period = urb->interval;
1403         span = sched->span;
1404         if (!stream->highspeed) {
1405                 period <<= 3;
1406                 span <<= 3;
1407         }
1409         if (span > mod - SCHEDULE_SLOP) {
1410                 ehci_dbg (ehci, "iso request %p too long\n", urb);
1411                 status = -EFBIG;
1412                 goto fail;
1413         }
1415         now = ehci_readl(ehci, &ehci->regs->frame_index) & (mod - 1);
1417         /* Typical case: reuse current schedule, stream is still active.
1418          * Hopefully there are no gaps from the host falling behind
1419          * (irq delays etc), but if there are we'll take the next
1420          * slot in the schedule, implicitly assuming URB_ISO_ASAP.
1421          */
1422         if (likely (!list_empty (&stream->td_list))) {
1423                 u32     excess;
1425                 /* For high speed devices, allow scheduling within the
1426                  * isochronous scheduling threshold.  For full speed devices
1427                  * and Intel PCI-based controllers, don't (work around for
1428                  * Intel ICH9 bug).
1429                  */
1430                 if (!stream->highspeed && ehci->fs_i_thresh)
1431                         next = now + ehci->i_thresh;
1432                 else
1433                         next = now;
1435                 /* Fell behind (by up to twice the slop amount)?
1436                  * We decide based on the time of the last currently-scheduled
1437                  * slot, not the time of the next available slot.
1438                  */
1439                 excess = (stream->next_uframe - period - next) & (mod - 1);
1440                 if (excess >= mod - 2 * SCHEDULE_SLOP)
1441                         start = next + excess - mod + period *
1442                                         DIV_ROUND_UP(mod - excess, period);
1443                 else
1444                         start = next + excess + period;
1445                 if (start - now >= mod) {
1446                         ehci_dbg(ehci, "request %p would overflow (%d+%d >= %d)\n",
1447                                         urb, start - now - period, period,
1448                                         mod);
1449                         status = -EFBIG;
1450                         goto fail;
1451                 }
1452         }
1454         /* need to schedule; when's the next (u)frame we could start?
1455          * this is bigger than ehci->i_thresh allows; scheduling itself
1456          * isn't free, the slop should handle reasonably slow cpus.  it
1457          * can also help high bandwidth if the dma and irq loads don't
1458          * jump until after the queue is primed.
1459          */
1460         else {
1461                 start = SCHEDULE_SLOP + (now & ~0x07);
1463                 /* NOTE:  assumes URB_ISO_ASAP, to limit complexity/bugs */
1465                 /* find a uframe slot with enough bandwidth */
1466                 next = start + period;
1467                 for (; start < next; start++) {
1469                         /* check schedule: enough space? */
1470                         if (stream->highspeed) {
1471                                 if (itd_slot_ok(ehci, mod, start,
1472                                                 stream->usecs, period))
1473                                         break;
1474                         } else {
1475                                 if ((start % 8) >= 6)
1476                                         continue;
1477                                 if (sitd_slot_ok(ehci, mod, stream,
1478                                                 start, sched, period))
1479                                         break;
1480                         }
1481                 }
1483                 /* no room in the schedule */
1484                 if (start == next) {
1485                         ehci_dbg(ehci, "iso resched full %p (now %d max %d)\n",
1486                                 urb, now, now + mod);
1487                         status = -ENOSPC;
1488                         goto fail;
1489                 }
1490         }
1492         /* Tried to schedule too far into the future? */
1493         if (unlikely(start - now + span - period
1494                                 >= mod - 2 * SCHEDULE_SLOP)) {
1495                 ehci_dbg(ehci, "request %p would overflow (%d+%d >= %d)\n",
1496                                 urb, start - now, span - period,
1497                                 mod - 2 * SCHEDULE_SLOP);
1498                 status = -EFBIG;
1499                 goto fail;
1500         }
1502         stream->next_uframe = start & (mod - 1);
1504         /* report high speed start in uframes; full speed, in frames */
1505         urb->start_frame = stream->next_uframe;
1506         if (!stream->highspeed)
1507                 urb->start_frame >>= 3;
1508         return 0;
1510  fail:
1511         iso_sched_free(stream, sched);
1512         urb->hcpriv = NULL;
1513         return status;
1516 /*-------------------------------------------------------------------------*/
1518 static inline void
1519 itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1520                 struct ehci_itd *itd)
1522         int i;
1524         /* it's been recently zeroed */
1525         itd->hw_next = EHCI_LIST_END(ehci);
1526         itd->hw_bufp [0] = stream->buf0;
1527         itd->hw_bufp [1] = stream->buf1;
1528         itd->hw_bufp [2] = stream->buf2;
1530         for (i = 0; i < 8; i++)
1531                 itd->index[i] = -1;
1533         /* All other fields are filled when scheduling */
1536 static inline void
1537 itd_patch(
1538         struct ehci_hcd         *ehci,
1539         struct ehci_itd         *itd,
1540         struct ehci_iso_sched   *iso_sched,
1541         unsigned                index,
1542         u16                     uframe
1545         struct ehci_iso_packet  *uf = &iso_sched->packet [index];
1546         unsigned                pg = itd->pg;
1548         // BUG_ON (pg == 6 && uf->cross);
1550         uframe &= 0x07;
1551         itd->index [uframe] = index;
1553         itd->hw_transaction[uframe] = uf->transaction;
1554         itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
1555         itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0);
1556         itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1558         /* iso_frame_desc[].offset must be strictly increasing */
1559         if (unlikely (uf->cross)) {
1560                 u64     bufp = uf->bufp + 4096;
1562                 itd->pg = ++pg;
1563                 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0);
1564                 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32));
1565         }
1568 static inline void
1569 itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1571         union ehci_shadow       *prev = &ehci->pshadow[frame];
1572         __hc32                  *hw_p = &ehci->periodic[frame];
1573         union ehci_shadow       here = *prev;
1574         __hc32                  type = 0;
1576         /* skip any iso nodes which might belong to previous microframes */
1577         while (here.ptr) {
1578                 type = Q_NEXT_TYPE(ehci, *hw_p);
1579                 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
1580                         break;
1581                 prev = periodic_next_shadow(ehci, prev, type);
1582                 hw_p = shadow_next_periodic(ehci, &here, type);
1583                 here = *prev;
1584         }
1586         itd->itd_next = here;
1587         itd->hw_next = *hw_p;
1588         prev->itd = itd;
1589         itd->frame = frame;
1590         wmb ();
1591         *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1594 /* fit urb's itds into the selected schedule slot; activate as needed */
1595 static int
1596 itd_link_urb (
1597         struct ehci_hcd         *ehci,
1598         struct urb              *urb,
1599         unsigned                mod,
1600         struct ehci_iso_stream  *stream
1603         int                     packet;
1604         unsigned                next_uframe, uframe, frame;
1605         struct ehci_iso_sched   *iso_sched = urb->hcpriv;
1606         struct ehci_itd         *itd;
1608         next_uframe = stream->next_uframe & (mod - 1);
1610         if (unlikely (list_empty(&stream->td_list))) {
1611                 ehci_to_hcd(ehci)->self.bandwidth_allocated
1612                                 += stream->bandwidth;
1613                 ehci_vdbg (ehci,
1614                         "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
1615                         urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1616                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1617                         urb->interval,
1618                         next_uframe >> 3, next_uframe & 0x7);
1619         }
1620         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1622         /* fill iTDs uframe by uframe */
1623         for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
1624                 if (itd == NULL) {
1625                         /* ASSERT:  we have all necessary itds */
1626                         // BUG_ON (list_empty (&iso_sched->td_list));
1628                         /* ASSERT:  no itds for this endpoint in this uframe */
1630                         itd = list_entry (iso_sched->td_list.next,
1631                                         struct ehci_itd, itd_list);
1632                         list_move_tail (&itd->itd_list, &stream->td_list);
1633                         itd->stream = iso_stream_get (stream);
1634                         itd->urb = urb;
1635                         itd_init (ehci, stream, itd);
1636                 }
1638                 uframe = next_uframe & 0x07;
1639                 frame = next_uframe >> 3;
1641                 itd_patch(ehci, itd, iso_sched, packet, uframe);
1643                 next_uframe += stream->interval;
1644                 next_uframe &= mod - 1;
1645                 packet++;
1647                 /* link completed itds into the schedule */
1648                 if (((next_uframe >> 3) != frame)
1649                                 || packet == urb->number_of_packets) {
1650                         itd_link(ehci, frame & (ehci->periodic_size - 1), itd);
1651                         itd = NULL;
1652                 }
1653         }
1654         stream->next_uframe = next_uframe;
1656         /* don't need that schedule data any more */
1657         iso_sched_free (stream, iso_sched);
1658         urb->hcpriv = NULL;
1660         timer_action (ehci, TIMER_IO_WATCHDOG);
1661         return enable_periodic(ehci);
1664 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1666 /* Process and recycle a completed ITD.  Return true iff its urb completed,
1667  * and hence its completion callback probably added things to the hardware
1668  * schedule.
1670  * Note that we carefully avoid recycling this descriptor until after any
1671  * completion callback runs, so that it won't be reused quickly.  That is,
1672  * assuming (a) no more than two urbs per frame on this endpoint, and also
1673  * (b) only this endpoint's completions submit URBs.  It seems some silicon
1674  * corrupts things if you reuse completed descriptors very quickly...
1675  */
1676 static unsigned
1677 itd_complete (
1678         struct ehci_hcd *ehci,
1679         struct ehci_itd *itd
1680 ) {
1681         struct urb                              *urb = itd->urb;
1682         struct usb_iso_packet_descriptor        *desc;
1683         u32                                     t;
1684         unsigned                                uframe;
1685         int                                     urb_index = -1;
1686         struct ehci_iso_stream                  *stream = itd->stream;
1687         struct usb_device                       *dev;
1688         unsigned                                retval = false;
1690         /* for each uframe with a packet */
1691         for (uframe = 0; uframe < 8; uframe++) {
1692                 if (likely (itd->index[uframe] == -1))
1693                         continue;
1694                 urb_index = itd->index[uframe];
1695                 desc = &urb->iso_frame_desc [urb_index];
1697                 t = hc32_to_cpup(ehci, &itd->hw_transaction [uframe]);
1698                 itd->hw_transaction [uframe] = 0;
1700                 /* report transfer status */
1701                 if (unlikely (t & ISO_ERRS)) {
1702                         urb->error_count++;
1703                         if (t & EHCI_ISOC_BUF_ERR)
1704                                 desc->status = usb_pipein (urb->pipe)
1705                                         ? -ENOSR  /* hc couldn't read */
1706                                         : -ECOMM; /* hc couldn't write */
1707                         else if (t & EHCI_ISOC_BABBLE)
1708                                 desc->status = -EOVERFLOW;
1709                         else /* (t & EHCI_ISOC_XACTERR) */
1710                                 desc->status = -EPROTO;
1712                         /* HC need not update length with this error */
1713                         if (!(t & EHCI_ISOC_BABBLE)) {
1714                                 desc->actual_length = EHCI_ITD_LENGTH(t);
1715                                 urb->actual_length += desc->actual_length;
1716                         }
1717                 } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) {
1718                         desc->status = 0;
1719                         desc->actual_length = EHCI_ITD_LENGTH(t);
1720                         urb->actual_length += desc->actual_length;
1721                 } else {
1722                         /* URB was too late */
1723                         desc->status = -EXDEV;
1724                 }
1725         }
1727         /* handle completion now? */
1728         if (likely ((urb_index + 1) != urb->number_of_packets))
1729                 goto done;
1731         /* ASSERT: it's really the last itd for this urb
1732         list_for_each_entry (itd, &stream->td_list, itd_list)
1733                 BUG_ON (itd->urb == urb);
1734          */
1736         /* give urb back to the driver; completion often (re)submits */
1737         dev = urb->dev;
1738         ehci_urb_done(ehci, urb, 0);
1739         retval = true;
1740         urb = NULL;
1741         (void) disable_periodic(ehci);
1742         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1744         if (unlikely(list_is_singular(&stream->td_list))) {
1745                 ehci_to_hcd(ehci)->self.bandwidth_allocated
1746                                 -= stream->bandwidth;
1747                 ehci_vdbg (ehci,
1748                         "deschedule devp %s ep%d%s-iso\n",
1749                         dev->devpath, stream->bEndpointAddress & 0x0f,
1750                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1751         }
1752         iso_stream_put (ehci, stream);
1754 done:
1755         itd->urb = NULL;
1756         if (ehci->clock_frame != itd->frame || itd->index[7] != -1) {
1757                 /* OK to recycle this ITD now. */
1758                 itd->stream = NULL;
1759                 list_move(&itd->itd_list, &stream->free_list);
1760                 iso_stream_put(ehci, stream);
1761         } else {
1762                 /* HW might remember this ITD, so we can't recycle it yet.
1763                  * Move it to a safe place until a new frame starts.
1764                  */
1765                 list_move(&itd->itd_list, &ehci->cached_itd_list);
1766                 if (stream->refcount == 2) {
1767                         /* If iso_stream_put() were called here, stream
1768                          * would be freed.  Instead, just prevent reuse.
1769                          */
1770                         stream->ep->hcpriv = NULL;
1771                         stream->ep = NULL;
1772                 }
1773         }
1774         return retval;
1777 /*-------------------------------------------------------------------------*/
1779 static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
1780         gfp_t mem_flags)
1782         int                     status = -EINVAL;
1783         unsigned long           flags;
1784         struct ehci_iso_stream  *stream;
1786         /* Get iso_stream head */
1787         stream = iso_stream_find (ehci, urb);
1788         if (unlikely (stream == NULL)) {
1789                 ehci_dbg (ehci, "can't get iso stream\n");
1790                 return -ENOMEM;
1791         }
1792         if (unlikely (urb->interval != stream->interval)) {
1793                 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1794                         stream->interval, urb->interval);
1795                 goto done;
1796         }
1798 #ifdef EHCI_URB_TRACE
1799         ehci_dbg (ehci,
1800                 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1801                 __FUNCTION__, urb->dev->devpath, urb,
1802                 usb_pipeendpoint (urb->pipe),
1803                 usb_pipein (urb->pipe) ? "in" : "out",
1804                 urb->transfer_buffer_length,
1805                 urb->number_of_packets, urb->interval,
1806                 stream);
1807 #endif
1809         /* allocate ITDs w/o locking anything */
1810         status = itd_urb_transaction (stream, ehci, urb, mem_flags);
1811         if (unlikely (status < 0)) {
1812                 ehci_dbg (ehci, "can't init itds\n");
1813                 goto done;
1814         }
1816         /* schedule ... need to lock */
1817         spin_lock_irqsave (&ehci->lock, flags);
1818         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1819                                &ehci_to_hcd(ehci)->flags))) {
1820                 status = -ESHUTDOWN;
1821                 goto done_not_linked;
1822         }
1823         status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1824         if (unlikely(status))
1825                 goto done_not_linked;
1826         status = iso_stream_schedule(ehci, urb, stream);
1827         if (likely (status == 0))
1828                 itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
1829         else
1830                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1831 done_not_linked:
1832         spin_unlock_irqrestore (&ehci->lock, flags);
1834 done:
1835         if (unlikely (status < 0))
1836                 iso_stream_put (ehci, stream);
1837         return status;
1840 /*-------------------------------------------------------------------------*/
1843  * "Split ISO TDs" ... used for USB 1.1 devices going through the
1844  * TTs in USB 2.0 hubs.  These need microframe scheduling.
1845  */
1847 static inline void
1848 sitd_sched_init(
1849         struct ehci_hcd         *ehci,
1850         struct ehci_iso_sched   *iso_sched,
1851         struct ehci_iso_stream  *stream,
1852         struct urb              *urb
1855         unsigned        i;
1856         dma_addr_t      dma = urb->transfer_dma;
1858         /* how many frames are needed for these transfers */
1859         iso_sched->span = urb->number_of_packets * stream->interval;
1861         /* figure out per-frame sitd fields that we'll need later
1862          * when we fit new sitds into the schedule.
1863          */
1864         for (i = 0; i < urb->number_of_packets; i++) {
1865                 struct ehci_iso_packet  *packet = &iso_sched->packet [i];
1866                 unsigned                length;
1867                 dma_addr_t              buf;
1868                 u32                     trans;
1870                 length = urb->iso_frame_desc [i].length & 0x03ff;
1871                 buf = dma + urb->iso_frame_desc [i].offset;
1873                 trans = SITD_STS_ACTIVE;
1874                 if (((i + 1) == urb->number_of_packets)
1875                                 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1876                         trans |= SITD_IOC;
1877                 trans |= length << 16;
1878                 packet->transaction = cpu_to_hc32(ehci, trans);
1880                 /* might need to cross a buffer page within a td */
1881                 packet->bufp = buf;
1882                 packet->buf1 = (buf + length) & ~0x0fff;
1883                 if (packet->buf1 != (buf & ~(u64)0x0fff))
1884                         packet->cross = 1;
1886                 /* OUT uses multiple start-splits */
1887                 if (stream->bEndpointAddress & USB_DIR_IN)
1888                         continue;
1889                 length = (length + 187) / 188;
1890                 if (length > 1) /* BEGIN vs ALL */
1891                         length |= 1 << 3;
1892                 packet->buf1 |= length;
1893         }
1896 static int
1897 sitd_urb_transaction (
1898         struct ehci_iso_stream  *stream,
1899         struct ehci_hcd         *ehci,
1900         struct urb              *urb,
1901         gfp_t                   mem_flags
1904         struct ehci_sitd        *sitd;
1905         dma_addr_t              sitd_dma;
1906         int                     i;
1907         struct ehci_iso_sched   *iso_sched;
1908         unsigned long           flags;
1910         iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1911         if (iso_sched == NULL)
1912                 return -ENOMEM;
1914         sitd_sched_init(ehci, iso_sched, stream, urb);
1916         /* allocate/init sITDs */
1917         spin_lock_irqsave (&ehci->lock, flags);
1918         for (i = 0; i < urb->number_of_packets; i++) {
1920                 /* NOTE:  for now, we don't try to handle wraparound cases
1921                  * for IN (using sitd->hw_backpointer, like a FSTN), which
1922                  * means we never need two sitds for full speed packets.
1923                  */
1925                 /* free_list.next might be cache-hot ... but maybe
1926                  * the HC caches it too. avoid that issue for now.
1927                  */
1929                 /* prefer previously-allocated sitds */
1930                 if (!list_empty(&stream->free_list)) {
1931                         sitd = list_entry (stream->free_list.prev,
1932                                          struct ehci_sitd, sitd_list);
1933                         list_del (&sitd->sitd_list);
1934                         sitd_dma = sitd->sitd_dma;
1935                 } else {
1936                         spin_unlock_irqrestore (&ehci->lock, flags);
1937                         sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags,
1938                                         &sitd_dma);
1939                         spin_lock_irqsave (&ehci->lock, flags);
1940                         if (!sitd) {
1941                                 iso_sched_free(stream, iso_sched);
1942                                 spin_unlock_irqrestore(&ehci->lock, flags);
1943                                 return -ENOMEM;
1944                         }
1945                 }
1947                 memset (sitd, 0, sizeof *sitd);
1948                 sitd->sitd_dma = sitd_dma;
1949                 list_add (&sitd->sitd_list, &iso_sched->td_list);
1950         }
1952         /* temporarily store schedule info in hcpriv */
1953         urb->hcpriv = iso_sched;
1954         urb->error_count = 0;
1956         spin_unlock_irqrestore (&ehci->lock, flags);
1957         return 0;
1960 /*-------------------------------------------------------------------------*/
1962 static inline void
1963 sitd_patch(
1964         struct ehci_hcd         *ehci,
1965         struct ehci_iso_stream  *stream,
1966         struct ehci_sitd        *sitd,
1967         struct ehci_iso_sched   *iso_sched,
1968         unsigned                index
1971         struct ehci_iso_packet  *uf = &iso_sched->packet [index];
1972         u64                     bufp = uf->bufp;
1974         sitd->hw_next = EHCI_LIST_END(ehci);
1975         sitd->hw_fullspeed_ep = stream->address;
1976         sitd->hw_uframe = stream->splits;
1977         sitd->hw_results = uf->transaction;
1978         sitd->hw_backpointer = EHCI_LIST_END(ehci);
1980         bufp = uf->bufp;
1981         sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp);
1982         sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32);
1984         sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1);
1985         if (uf->cross)
1986                 bufp += 4096;
1987         sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32);
1988         sitd->index = index;
1991 static inline void
1992 sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
1994         /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
1995         sitd->sitd_next = ehci->pshadow [frame];
1996         sitd->hw_next = ehci->periodic [frame];
1997         ehci->pshadow [frame].sitd = sitd;
1998         sitd->frame = frame;
1999         wmb ();
2000         ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
2003 /* fit urb's sitds into the selected schedule slot; activate as needed */
2004 static int
2005 sitd_link_urb (
2006         struct ehci_hcd         *ehci,
2007         struct urb              *urb,
2008         unsigned                mod,
2009         struct ehci_iso_stream  *stream
2012         int                     packet;
2013         unsigned                next_uframe;
2014         struct ehci_iso_sched   *sched = urb->hcpriv;
2015         struct ehci_sitd        *sitd;
2017         next_uframe = stream->next_uframe;
2019         if (list_empty(&stream->td_list)) {
2020                 /* usbfs ignores TT bandwidth */
2021                 ehci_to_hcd(ehci)->self.bandwidth_allocated
2022                                 += stream->bandwidth;
2023                 ehci_vdbg (ehci,
2024                         "sched devp %s ep%d%s-iso [%d] %dms/%04x\n",
2025                         urb->dev->devpath, stream->bEndpointAddress & 0x0f,
2026                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
2027                         (next_uframe >> 3) & (ehci->periodic_size - 1),
2028                         stream->interval, hc32_to_cpu(ehci, stream->splits));
2029         }
2030         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
2032         /* fill sITDs frame by frame */
2033         for (packet = 0, sitd = NULL;
2034                         packet < urb->number_of_packets;
2035                         packet++) {
2037                 /* ASSERT:  we have all necessary sitds */
2038                 BUG_ON (list_empty (&sched->td_list));
2040                 /* ASSERT:  no itds for this endpoint in this frame */
2042                 sitd = list_entry (sched->td_list.next,
2043                                 struct ehci_sitd, sitd_list);
2044                 list_move_tail (&sitd->sitd_list, &stream->td_list);
2045                 sitd->stream = iso_stream_get (stream);
2046                 sitd->urb = urb;
2048                 sitd_patch(ehci, stream, sitd, sched, packet);
2049                 sitd_link(ehci, (next_uframe >> 3) & (ehci->periodic_size - 1),
2050                                 sitd);
2052                 next_uframe += stream->interval << 3;
2053         }
2054         stream->next_uframe = next_uframe & (mod - 1);
2056         /* don't need that schedule data any more */
2057         iso_sched_free (stream, sched);
2058         urb->hcpriv = NULL;
2060         timer_action (ehci, TIMER_IO_WATCHDOG);
2061         return enable_periodic(ehci);
2064 /*-------------------------------------------------------------------------*/
2066 #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
2067                                 | SITD_STS_XACT | SITD_STS_MMF)
2069 /* Process and recycle a completed SITD.  Return true iff its urb completed,
2070  * and hence its completion callback probably added things to the hardware
2071  * schedule.
2073  * Note that we carefully avoid recycling this descriptor until after any
2074  * completion callback runs, so that it won't be reused quickly.  That is,
2075  * assuming (a) no more than two urbs per frame on this endpoint, and also
2076  * (b) only this endpoint's completions submit URBs.  It seems some silicon
2077  * corrupts things if you reuse completed descriptors very quickly...
2078  */
2079 static unsigned
2080 sitd_complete (
2081         struct ehci_hcd         *ehci,
2082         struct ehci_sitd        *sitd
2083 ) {
2084         struct urb                              *urb = sitd->urb;
2085         struct usb_iso_packet_descriptor        *desc;
2086         u32                                     t;
2087         int                                     urb_index = -1;
2088         struct ehci_iso_stream                  *stream = sitd->stream;
2089         struct usb_device                       *dev;
2090         unsigned                                retval = false;
2092         urb_index = sitd->index;
2093         desc = &urb->iso_frame_desc [urb_index];
2094         t = hc32_to_cpup(ehci, &sitd->hw_results);
2096         /* report transfer status */
2097         if (t & SITD_ERRS) {
2098                 urb->error_count++;
2099                 if (t & SITD_STS_DBE)
2100                         desc->status = usb_pipein (urb->pipe)
2101                                 ? -ENOSR  /* hc couldn't read */
2102                                 : -ECOMM; /* hc couldn't write */
2103                 else if (t & SITD_STS_BABBLE)
2104                         desc->status = -EOVERFLOW;
2105                 else /* XACT, MMF, etc */
2106                         desc->status = -EPROTO;
2107         } else {
2108                 desc->status = 0;
2109                 desc->actual_length = desc->length - SITD_LENGTH(t);
2110                 urb->actual_length += desc->actual_length;
2111         }
2113         /* handle completion now? */
2114         if ((urb_index + 1) != urb->number_of_packets)
2115                 goto done;
2117         /* ASSERT: it's really the last sitd for this urb
2118         list_for_each_entry (sitd, &stream->td_list, sitd_list)
2119                 BUG_ON (sitd->urb == urb);
2120          */
2122         /* give urb back to the driver; completion often (re)submits */
2123         dev = urb->dev;
2124         ehci_urb_done(ehci, urb, 0);
2125         retval = true;
2126         urb = NULL;
2127         (void) disable_periodic(ehci);
2128         ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
2130         if (list_is_singular(&stream->td_list)) {
2131                 ehci_to_hcd(ehci)->self.bandwidth_allocated
2132                                 -= stream->bandwidth;
2133                 ehci_vdbg (ehci,
2134                         "deschedule devp %s ep%d%s-iso\n",
2135                         dev->devpath, stream->bEndpointAddress & 0x0f,
2136                         (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
2137         }
2138         iso_stream_put (ehci, stream);
2140 done:
2141         sitd->urb = NULL;
2142         if (ehci->clock_frame != sitd->frame) {
2143                 /* OK to recycle this SITD now. */
2144                 sitd->stream = NULL;
2145                 list_move(&sitd->sitd_list, &stream->free_list);
2146                 iso_stream_put(ehci, stream);
2147         } else {
2148                 /* HW might remember this SITD, so we can't recycle it yet.
2149                  * Move it to a safe place until a new frame starts.
2150                  */
2151                 list_move(&sitd->sitd_list, &ehci->cached_sitd_list);
2152                 if (stream->refcount == 2) {
2153                         /* If iso_stream_put() were called here, stream
2154                          * would be freed.  Instead, just prevent reuse.
2155                          */
2156                         stream->ep->hcpriv = NULL;
2157                         stream->ep = NULL;
2158                 }
2159         }
2160         return retval;
2164 static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
2165         gfp_t mem_flags)
2167         int                     status = -EINVAL;
2168         unsigned long           flags;
2169         struct ehci_iso_stream  *stream;
2171         /* Get iso_stream head */
2172         stream = iso_stream_find (ehci, urb);
2173         if (stream == NULL) {
2174                 ehci_dbg (ehci, "can't get iso stream\n");
2175                 return -ENOMEM;
2176         }
2177         if (urb->interval != stream->interval) {
2178                 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
2179                         stream->interval, urb->interval);
2180                 goto done;
2181         }
2183 #ifdef EHCI_URB_TRACE
2184         ehci_dbg (ehci,
2185                 "submit %p dev%s ep%d%s-iso len %d\n",
2186                 urb, urb->dev->devpath,
2187                 usb_pipeendpoint (urb->pipe),
2188                 usb_pipein (urb->pipe) ? "in" : "out",
2189                 urb->transfer_buffer_length);
2190 #endif
2192         /* allocate SITDs */
2193         status = sitd_urb_transaction (stream, ehci, urb, mem_flags);
2194         if (status < 0) {
2195                 ehci_dbg (ehci, "can't init sitds\n");
2196                 goto done;
2197         }
2199         /* schedule ... need to lock */
2200         spin_lock_irqsave (&ehci->lock, flags);
2201         if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
2202                                &ehci_to_hcd(ehci)->flags))) {
2203                 status = -ESHUTDOWN;
2204                 goto done_not_linked;
2205         }
2206         status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
2207         if (unlikely(status))
2208                 goto done_not_linked;
2209         status = iso_stream_schedule(ehci, urb, stream);
2210         if (status == 0)
2211                 sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
2212         else
2213                 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
2214 done_not_linked:
2215         spin_unlock_irqrestore (&ehci->lock, flags);
2217 done:
2218         if (status < 0)
2219                 iso_stream_put (ehci, stream);
2220         return status;
2223 /*-------------------------------------------------------------------------*/
2225 static void free_cached_lists(struct ehci_hcd *ehci)
2227         struct ehci_itd *itd, *n;
2228         struct ehci_sitd *sitd, *sn;
2230         list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
2231                 struct ehci_iso_stream  *stream = itd->stream;
2232                 itd->stream = NULL;
2233                 list_move(&itd->itd_list, &stream->free_list);
2234                 iso_stream_put(ehci, stream);
2235         }
2237         list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) {
2238                 struct ehci_iso_stream  *stream = sitd->stream;
2239                 sitd->stream = NULL;
2240                 list_move(&sitd->sitd_list, &stream->free_list);
2241                 iso_stream_put(ehci, stream);
2242         }
2245 /*-------------------------------------------------------------------------*/
2247 static void
2248 scan_periodic (struct ehci_hcd *ehci)
2250         unsigned        now_uframe, frame, clock, clock_frame, mod;
2251         unsigned        modified;
2253         mod = ehci->periodic_size << 3;
2255         /*
2256          * When running, scan from last scan point up to "now"
2257          * else clean up by scanning everything that's left.
2258          * Touches as few pages as possible:  cache-friendly.
2259          */
2260         now_uframe = ehci->next_uframe;
2261         if (HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
2262                 clock = ehci_readl(ehci, &ehci->regs->frame_index);
2263                 clock_frame = (clock >> 3) & (ehci->periodic_size - 1);
2264         } else  {
2265                 clock = now_uframe + mod - 1;
2266                 clock_frame = -1;
2267         }
2268         if (ehci->clock_frame != clock_frame) {
2269                 free_cached_lists(ehci);
2270                 ehci->clock_frame = clock_frame;
2271         }
2272         clock &= mod - 1;
2273         clock_frame = clock >> 3;
2275         for (;;) {
2276                 union ehci_shadow       q, *q_p;
2277                 __hc32                  type, *hw_p;
2278                 unsigned                incomplete = false;
2280                 frame = now_uframe >> 3;
2282 restart:
2283                 /* scan each element in frame's queue for completions */
2284                 q_p = &ehci->pshadow [frame];
2285                 hw_p = &ehci->periodic [frame];
2286                 q.ptr = q_p->ptr;
2287                 type = Q_NEXT_TYPE(ehci, *hw_p);
2288                 modified = 0;
2290                 while (q.ptr != NULL) {
2291                         unsigned                uf;
2292                         union ehci_shadow       temp;
2293                         int                     live;
2295                         live = HC_IS_RUNNING (ehci_to_hcd(ehci)->state);
2296                         switch (hc32_to_cpu(ehci, type)) {
2297                         case Q_TYPE_QH:
2298                                 /* handle any completions */
2299                                 temp.qh = qh_get (q.qh);
2300                                 type = Q_NEXT_TYPE(ehci, q.qh->hw->hw_next);
2301                                 q = q.qh->qh_next;
2302                                 modified = qh_completions (ehci, temp.qh);
2303                                 if (unlikely(list_empty(&temp.qh->qtd_list) ||
2304                                                 temp.qh->needs_rescan))
2305                                         intr_deschedule (ehci, temp.qh);
2306                                 qh_put (temp.qh);
2307                                 break;
2308                         case Q_TYPE_FSTN:
2309                                 /* for "save place" FSTNs, look at QH entries
2310                                  * in the previous frame for completions.
2311                                  */
2312                                 if (q.fstn->hw_prev != EHCI_LIST_END(ehci)) {
2313                                         dbg ("ignoring completions from FSTNs");
2314                                 }
2315                                 type = Q_NEXT_TYPE(ehci, q.fstn->hw_next);
2316                                 q = q.fstn->fstn_next;
2317                                 break;
2318                         case Q_TYPE_ITD:
2319                                 /* If this ITD is still active, leave it for
2320                                  * later processing ... check the next entry.
2321                                  * No need to check for activity unless the
2322                                  * frame is current.
2323                                  */
2324                                 if (frame == clock_frame && live) {
2325                                         rmb();
2326                                         for (uf = 0; uf < 8; uf++) {
2327                                                 if (q.itd->hw_transaction[uf] &
2328                                                             ITD_ACTIVE(ehci))
2329                                                         break;
2330                                         }
2331                                         if (uf < 8) {
2332                                                 incomplete = true;
2333                                                 q_p = &q.itd->itd_next;
2334                                                 hw_p = &q.itd->hw_next;
2335                                                 type = Q_NEXT_TYPE(ehci,
2336                                                         q.itd->hw_next);
2337                                                 q = *q_p;
2338                                                 break;
2339                                         }
2340                                 }
2342                                 /* Take finished ITDs out of the schedule
2343                                  * and process them:  recycle, maybe report
2344                                  * URB completion.  HC won't cache the
2345                                  * pointer for much longer, if at all.
2346                                  */
2347                                 *q_p = q.itd->itd_next;
2348                                 if (!ehci->use_dummy_qh ||
2349                                     q.itd->hw_next != EHCI_LIST_END(ehci))
2350                                         *hw_p = q.itd->hw_next;
2351                                 else
2352                                         *hw_p = ehci->dummy->qh_dma;
2353                                 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2354                                 wmb();
2355                                 modified = itd_complete (ehci, q.itd);
2356                                 q = *q_p;
2357                                 break;
2358                         case Q_TYPE_SITD:
2359                                 /* If this SITD is still active, leave it for
2360                                  * later processing ... check the next entry.
2361                                  * No need to check for activity unless the
2362                                  * frame is current.
2363                                  */
2364                                 if (((frame == clock_frame) ||
2365                                      (((frame + 1) & (ehci->periodic_size - 1))
2366                                       == clock_frame))
2367                                     && live
2368                                     && (q.sitd->hw_results &
2369                                         SITD_ACTIVE(ehci))) {
2371                                         incomplete = true;
2372                                         q_p = &q.sitd->sitd_next;
2373                                         hw_p = &q.sitd->hw_next;
2374                                         type = Q_NEXT_TYPE(ehci,
2375                                                         q.sitd->hw_next);
2376                                         q = *q_p;
2377                                         break;
2378                                 }
2380                                 /* Take finished SITDs out of the schedule
2381                                  * and process them:  recycle, maybe report
2382                                  * URB completion.
2383                                  */
2384                                 *q_p = q.sitd->sitd_next;
2385                                 if (!ehci->use_dummy_qh ||
2386                                     q.sitd->hw_next != EHCI_LIST_END(ehci))
2387                                         *hw_p = q.sitd->hw_next;
2388                                 else
2389                                         *hw_p = ehci->dummy->qh_dma;
2390                                 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2391                                 wmb();
2392                                 modified = sitd_complete (ehci, q.sitd);
2393                                 q = *q_p;
2394                                 break;
2395                         default:
2396                                 dbg ("corrupt type %d frame %d shadow %p",
2397                                         type, frame, q.ptr);
2398                                 // BUG ();
2399                                 q.ptr = NULL;
2400                         }
2402                         /* assume completion callbacks modify the queue */
2403                         if (unlikely (modified)) {
2404                                 if (likely(ehci->periodic_sched > 0))
2405                                         goto restart;
2406                                 /* short-circuit this scan */
2407                                 now_uframe = clock;
2408                                 break;
2409                         }
2410                 }
2412                 /* If we can tell we caught up to the hardware, stop now.
2413                  * We can't advance our scan without collecting the ISO
2414                  * transfers that are still pending in this frame.
2415                  */
2416                 if (incomplete && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
2417                         ehci->next_uframe = now_uframe;
2418                         break;
2419                 }
2421                 // FIXME:  this assumes we won't get lapped when
2422                 // latencies climb; that should be rare, but...
2423                 // detect it, and just go all the way around.
2424                 // FLR might help detect this case, so long as latencies
2425                 // don't exceed periodic_size msec (default 1.024 sec).
2427                 // FIXME:  likewise assumes HC doesn't halt mid-scan
2429                 if (now_uframe == clock) {
2430                         unsigned        now;
2432                         if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
2433                                         || ehci->periodic_sched == 0)
2434                                 break;
2435                         ehci->next_uframe = now_uframe;
2436                         now = ehci_readl(ehci, &ehci->regs->frame_index) &
2437                                         (mod - 1);
2438                         if (now_uframe == now)
2439                                 break;
2441                         /* rescan the rest of this frame, then ... */
2442                         clock = now;
2443                         clock_frame = clock >> 3;
2444                         if (ehci->clock_frame != clock_frame) {
2445                                 free_cached_lists(ehci);
2446                                 ehci->clock_frame = clock_frame;
2447                         }
2448                 } else {
2449                         now_uframe++;
2450                         now_uframe &= mod - 1;
2451                 }
2452         }