release/src/router/openssl/crypto/sha/asm/sha512-mips.pl

   1 #!/usr/bin/env perl
   2
   3 # ====================================================================
   4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
   5 # project. The module is, however, dual licensed under OpenSSL and
   6 # CRYPTOGAMS licenses depending on where you obtain it. For further
   7 # details see http://www.openssl.org/~appro/cryptogams/.
   8 # ====================================================================
   9
  10 # SHA2 block procedures for MIPS.
  11
  12 # October 2010.
  13 #
  14 # SHA256 performance improvement on MIPS R5000 CPU is ~27% over gcc-
  15 # generated code in o32 build and ~55% in n32/64 build. SHA512 [which
  16 # for now can only be compiled for MIPS64 ISA] improvement is modest
  17 # ~17%, but it comes for free, because it's same instruction sequence.
  18 # Improvement coefficients are for aligned input.
  19
  20 # September 2012.
  21 #
  22 # Add MIPS[32|64]R2 code (>25% less instructions).
  23
  24 ######################################################################
  25 # There is a number of MIPS ABI in use, O32 and N32/64 are most
  26 # widely used. Then there is a new contender: NUBI. It appears that if
  27 # one picks the latter, it's possible to arrange code in ABI neutral
  28 # manner. Therefore let's stick to NUBI register layout:
  29 #
  30 ($zero,$at,$t0,$t1,$t2)=map("\$$_",(0..2,24,25));
  31 ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
  32 ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8,$s9,$s10,$s11)=map("\$$_",(12..23));
  33 ($gp,$tp,$sp,$fp,$ra)=map("\$$_",(3,28..31));
  34 #
  35 # The return value is placed in $a0. Following coding rules facilitate
  36 # interoperability:
  37 #
  38 # - never ever touch $tp, "thread pointer", former $gp [o32 can be
  39 #   excluded from the rule, because it's specified volatile];
  40 # - copy return value to $t0, former $v0 [or to $a0 if you're adapting
  41 #   old code];
  42 # - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;
  43 #
  44 # For reference here is register layout for N32/64 MIPS ABIs:
  45 #
  46 # ($zero,$at,$v0,$v1)=map("\$$_",(0..3));
  47 # ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$$_",(4..11));
  48 # ($t0,$t1,$t2,$t3,$t8,$t9)=map("\$$_",(12..15,24,25));
  49 # ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7)=map("\$$_",(16..23));
  50 # ($gp,$sp,$fp,$ra)=map("\$$_",(28..31));
  51 #
  52 $flavour = shift || "o32"; # supported flavours are o32,n32,64,nubi32,nubi64
  53
  54 if ($flavour =~ /64|n32/i) {
  55         $PTR_ADD="dadd";        # incidentally works even on n32
  56         $PTR_SUB="dsub";        # incidentally works even on n32
  57         $REG_S="sd";
  58         $REG_L="ld";
  59         $PTR_SLL="dsll";        # incidentally works even on n32
  60         $SZREG=8;
  61 } else {
  62         $PTR_ADD="add";
  63         $PTR_SUB="sub";
  64         $REG_S="sw";
  65         $REG_L="lw";
  66         $PTR_SLL="sll";
  67         $SZREG=4;
  68 }
  69 $pf = ($flavour =~ /nubi/i) ? $t0 : $t2;
  70 #
  71 # <appro@openssl.org>
  72 #
  73 ######################################################################
  74
  75 $big_endian=(`echo MIPSEL | $ENV{CC} -E -`=~/MIPSEL/)?1:0 if ($ENV{CC});
  76
  77 for (@ARGV) {   $output=$_ if (/^\w[\w\-]*\.\w+$/);     }
  78 open STDOUT,">$output";
  79
  80 if (!defined($big_endian)) { $big_endian=(unpack('L',pack('N',1))==1); }
  81
  82 if ($output =~ /512/) {
  83         $label="512";
  84         $SZ=8;
  85         $LD="ld";               # load from memory
  86         $ST="sd";               # store to memory
  87         $SLL="dsll";            # shift left logical
  88         $SRL="dsrl";            # shift right logical
  89         $ADDU="daddu";
  90         $ROTR="drotr";
  91         @Sigma0=(28,34,39);
  92         @Sigma1=(14,18,41);
  93         @sigma0=( 7, 1, 8);     # right shift first
  94         @sigma1=( 6,19,61);     # right shift first
  95         $lastK=0x817;
  96         $rounds=80;
  97 } else {
  98         $label="256";
  99         $SZ=4;
 100         $LD="lw";               # load from memory
 101         $ST="sw";               # store to memory
 102         $SLL="sll";             # shift left logical
 103         $SRL="srl";             # shift right logical
 104         $ADDU="addu";
 105         $ROTR="rotr";
 106         @Sigma0=( 2,13,22);
 107         @Sigma1=( 6,11,25);
 108         @sigma0=( 3, 7,18);     # right shift first
 109         @sigma1=(10,17,19);     # right shift first
 110         $lastK=0x8f2;
 111         $rounds=64;
 112 }
 113
 114 $MSB = $big_endian ? 0 : ($SZ-1);
 115 $LSB = ($SZ-1)&~$MSB;
 116
 117 @V=($A,$B,$C,$D,$E,$F,$G,$H)=map("\$$_",(1,2,3,7,24,25,30,31));
 118 @X=map("\$$_",(8..23));
 119
 120 $ctx=$a0;
 121 $inp=$a1;
 122 $len=$a2;       $Ktbl=$len;
 123
 124 sub BODY_00_15 {
 125 my ($i,$a,$b,$c,$d,$e,$f,$g,$h)=@_;
 126 my ($T1,$tmp0,$tmp1,$tmp2)=(@X[4],@X[5],@X[6],@X[7]);
 127
 128 $code.=<<___ if ($i<15);
 129         ${LD}l  @X[1],`($i+1)*$SZ+$MSB`($inp)
 130         ${LD}r  @X[1],`($i+1)*$SZ+$LSB`($inp)
 131 ___
 132 $code.=<<___    if (!$big_endian && $i<16 && $SZ==4);
 133 #if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
 134         wsbh    @X[0],@X[0]             # byte swap($i)
 135         rotr    @X[0],@X[0],16
 136 #else
 137         srl     $tmp0,@X[0],24          # byte swap($i)
 138         srl     $tmp1,@X[0],8
 139         andi    $tmp2,@X[0],0xFF00
 140         sll     @X[0],@X[0],24
 141         andi    $tmp1,0xFF00
 142         sll     $tmp2,$tmp2,8
 143         or      @X[0],$tmp0
 144         or      $tmp1,$tmp2
 145         or      @X[0],$tmp1
 146 #endif
 147 ___
 148 $code.=<<___    if (!$big_endian && $i<16 && $SZ==8);
 149 #if defined(_MIPS_ARCH_MIPS64R2)
 150         dsbh    @X[0],@X[0]             # byte swap($i)
 151         dshd    @X[0],@X[0]
 152 #else
 153         ori     $tmp0,$zero,0xFF
 154         dsll    $tmp2,$tmp0,32
 155         or      $tmp0,$tmp2             # 0x000000FF000000FF
 156         and     $tmp1,@X[0],$tmp0       # byte swap($i)
 157         dsrl    $tmp2,@X[0],24
 158         dsll    $tmp1,24
 159         and     $tmp2,$tmp0
 160         dsll    $tmp0,8                 # 0x0000FF000000FF00
 161         or      $tmp1,$tmp2
 162         and     $tmp2,@X[0],$tmp0
 163         dsrl    @X[0],8
 164         dsll    $tmp2,8
 165         and     @X[0],$tmp0
 166         or      $tmp1,$tmp2
 167         or      @X[0],$tmp1
 168         dsrl    $tmp1,@X[0],32
 169         dsll    @X[0],32
 170         or      @X[0],$tmp1
 171 #endif
 172 ___
 173 $code.=<<___;
 174 #if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
 175         xor     $tmp2,$f,$g                     # $i
 176         $ROTR   $tmp0,$e,@Sigma1[0]
 177         $ADDU   $T1,$X[0],$h
 178         $ROTR   $tmp1,$e,@Sigma1[1]
 179         and     $tmp2,$e
 180         $ROTR   $h,$e,@Sigma1[2]
 181         xor     $tmp0,$tmp1
 182         $ROTR   $tmp1,$a,@Sigma0[0]
 183         xor     $tmp2,$g                        # Ch(e,f,g)
 184         xor     $tmp0,$h                        # Sigma1(e)
 185
 186         $ROTR   $h,$a,@Sigma0[1]
 187         $ADDU   $T1,$tmp2
 188         $LD     $tmp2,`$i*$SZ`($Ktbl)           # K[$i]
 189         xor     $h,$tmp1
 190         $ROTR   $tmp1,$a,@Sigma0[2]
 191         $ADDU   $T1,$tmp0
 192         and     $tmp0,$b,$c
 193         xor     $h,$tmp1                        # Sigma0(a)
 194         xor     $tmp1,$b,$c
 195 #else
 196         $ADDU   $T1,$X[0],$h                    # $i
 197         $SRL    $h,$e,@Sigma1[0]
 198         xor     $tmp2,$f,$g
 199         $SLL    $tmp1,$e,`$SZ*8-@Sigma1[2]`
 200         and     $tmp2,$e
 201         $SRL    $tmp0,$e,@Sigma1[1]
 202         xor     $h,$tmp1
 203         $SLL    $tmp1,$e,`$SZ*8-@Sigma1[1]`
 204         xor     $h,$tmp0
 205         $SRL    $tmp0,$e,@Sigma1[2]
 206         xor     $h,$tmp1
 207         $SLL    $tmp1,$e,`$SZ*8-@Sigma1[0]`
 208         xor     $h,$tmp0
 209         xor     $tmp2,$g                        # Ch(e,f,g)
 210         xor     $tmp0,$tmp1,$h                  # Sigma1(e)
 211
 212         $SRL    $h,$a,@Sigma0[0]
 213         $ADDU   $T1,$tmp2
 214         $LD     $tmp2,`$i*$SZ`($Ktbl)           # K[$i]
 215         $SLL    $tmp1,$a,`$SZ*8-@Sigma0[2]`
 216         $ADDU   $T1,$tmp0
 217         $SRL    $tmp0,$a,@Sigma0[1]
 218         xor     $h,$tmp1
 219         $SLL    $tmp1,$a,`$SZ*8-@Sigma0[1]`
 220         xor     $h,$tmp0
 221         $SRL    $tmp0,$a,@Sigma0[2]
 222         xor     $h,$tmp1
 223         $SLL    $tmp1,$a,`$SZ*8-@Sigma0[0]`
 224         xor     $h,$tmp0
 225         and     $tmp0,$b,$c
 226         xor     $h,$tmp1                        # Sigma0(a)
 227         xor     $tmp1,$b,$c
 228 #endif
 229         $ST     @X[0],`($i%16)*$SZ`($sp)        # offload to ring buffer
 230         $ADDU   $h,$tmp0
 231         and     $tmp1,$a
 232         $ADDU   $T1,$tmp2                       # +=K[$i]
 233         $ADDU   $h,$tmp1                        # +=Maj(a,b,c)
 234         $ADDU   $d,$T1
 235         $ADDU   $h,$T1
 236 ___
 237 $code.=<<___ if ($i>=13);
 238         $LD     @X[3],`(($i+3)%16)*$SZ`($sp)    # prefetch from ring buffer
 239 ___
 240 }
 241
 242 sub BODY_16_XX {
 243 my $i=@_[0];
 244 my ($tmp0,$tmp1,$tmp2,$tmp3)=(@X[4],@X[5],@X[6],@X[7]);
 245
 246 $code.=<<___;
 247 #if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
 248         $SRL    $tmp2,@X[1],@sigma0[0]          # Xupdate($i)
 249         $ROTR   $tmp0,@X[1],@sigma0[1]
 250         $ADDU   @X[0],@X[9]                     # +=X[i+9]
 251         xor     $tmp2,$tmp0
 252         $ROTR   $tmp0,@X[1],@sigma0[2]
 253
 254         $SRL    $tmp3,@X[14],@sigma1[0]
 255         $ROTR   $tmp1,@X[14],@sigma1[1]
 256         xor     $tmp2,$tmp0                     # sigma0(X[i+1])
 257         $ROTR   $tmp0,@X[14],@sigma1[2]
 258         xor     $tmp3,$tmp1
 259         $ADDU   @X[0],$tmp2
 260 #else
 261         $SRL    $tmp2,@X[1],@sigma0[0]          # Xupdate($i)
 262         $ADDU   @X[0],@X[9]                     # +=X[i+9]
 263         $SLL    $tmp1,@X[1],`$SZ*8-@sigma0[2]`
 264         $SRL    $tmp0,@X[1],@sigma0[1]
 265         xor     $tmp2,$tmp1
 266         $SLL    $tmp1,`@sigma0[2]-@sigma0[1]`
 267         xor     $tmp2,$tmp0
 268         $SRL    $tmp0,@X[1],@sigma0[2]
 269         xor     $tmp2,$tmp1
 270
 271         $SRL    $tmp3,@X[14],@sigma1[0]
 272         xor     $tmp2,$tmp0                     # sigma0(X[i+1])
 273         $SLL    $tmp1,@X[14],`$SZ*8-@sigma1[2]`
 274         $ADDU   @X[0],$tmp2
 275         $SRL    $tmp0,@X[14],@sigma1[1]
 276         xor     $tmp3,$tmp1
 277         $SLL    $tmp1,`@sigma1[2]-@sigma1[1]`
 278         xor     $tmp3,$tmp0
 279         $SRL    $tmp0,@X[14],@sigma1[2]
 280         xor     $tmp3,$tmp1
 281 #endif
 282         xor     $tmp3,$tmp0                     # sigma1(X[i+14])
 283         $ADDU   @X[0],$tmp3
 284 ___
 285         &BODY_00_15(@_);
 286 }
 287
 288 $FRAMESIZE=16*$SZ+16*$SZREG;
 289 $SAVED_REGS_MASK = ($flavour =~ /nubi/i) ? 0xc0fff008 : 0xc0ff0000;
 290
 291 $code.=<<___;
 292 #ifdef OPENSSL_FIPSCANISTER
 293 # include <openssl/fipssyms.h>
 294 #endif
 295
 296 #if defined(__mips_smartmips) && !defined(_MIPS_ARCH_MIPS32R2)
 297 #define _MIPS_ARCH_MIPS32R2
 298 #endif
 299
 300 .text
 301 .set    noat
 302 #if !defined(__mips_eabi) && (!defined(__vxworks) || defined(__pic__))
 303 .option pic2
 304 #endif
 305
 306 .align  5
 307 .globl  sha${label}_block_data_order
 308 .ent    sha${label}_block_data_order
 309 sha${label}_block_data_order:
 310         .frame  $sp,$FRAMESIZE,$ra
 311         .mask   $SAVED_REGS_MASK,-$SZREG
 312         .set    noreorder
 313 ___
 314 $code.=<<___ if ($flavour =~ /o32/i);   # o32 PIC-ification
 315         .cpload $pf
 316 ___
 317 $code.=<<___;
 318         $PTR_SUB $sp,$FRAMESIZE
 319         $REG_S  $ra,$FRAMESIZE-1*$SZREG($sp)
 320         $REG_S  $fp,$FRAMESIZE-2*$SZREG($sp)
 321         $REG_S  $s11,$FRAMESIZE-3*$SZREG($sp)
 322         $REG_S  $s10,$FRAMESIZE-4*$SZREG($sp)
 323         $REG_S  $s9,$FRAMESIZE-5*$SZREG($sp)
 324         $REG_S  $s8,$FRAMESIZE-6*$SZREG($sp)
 325         $REG_S  $s7,$FRAMESIZE-7*$SZREG($sp)
 326         $REG_S  $s6,$FRAMESIZE-8*$SZREG($sp)
 327         $REG_S  $s5,$FRAMESIZE-9*$SZREG($sp)
 328         $REG_S  $s4,$FRAMESIZE-10*$SZREG($sp)
 329 ___
 330 $code.=<<___ if ($flavour =~ /nubi/i);  # optimize non-nubi prologue
 331         $REG_S  $s3,$FRAMESIZE-11*$SZREG($sp)
 332         $REG_S  $s2,$FRAMESIZE-12*$SZREG($sp)
 333         $REG_S  $s1,$FRAMESIZE-13*$SZREG($sp)
 334         $REG_S  $s0,$FRAMESIZE-14*$SZREG($sp)
 335         $REG_S  $gp,$FRAMESIZE-15*$SZREG($sp)
 336 ___
 337 $code.=<<___;
 338         $PTR_SLL @X[15],$len,`log(16*$SZ)/log(2)`
 339 ___
 340 $code.=<<___ if ($flavour !~ /o32/i);   # non-o32 PIC-ification
 341         .cplocal        $Ktbl
 342         .cpsetup        $pf,$zero,sha${label}_block_data_order
 343 ___
 344 $code.=<<___;
 345         .set    reorder
 346         la      $Ktbl,K${label}         # PIC-ified 'load address'
 347
 348         $LD     $A,0*$SZ($ctx)          # load context
 349         $LD     $B,1*$SZ($ctx)
 350         $LD     $C,2*$SZ($ctx)
 351         $LD     $D,3*$SZ($ctx)
 352         $LD     $E,4*$SZ($ctx)
 353         $LD     $F,5*$SZ($ctx)
 354         $LD     $G,6*$SZ($ctx)
 355         $LD     $H,7*$SZ($ctx)
 356
 357         $PTR_ADD @X[15],$inp            # pointer to the end of input
 358         $REG_S  @X[15],16*$SZ($sp)
 359         b       .Loop
 360
 361 .align  5
 362 .Loop:
 363         ${LD}l  @X[0],$MSB($inp)
 364         ${LD}r  @X[0],$LSB($inp)
 365 ___
 366 for ($i=0;$i<16;$i++)
 367 { &BODY_00_15($i,@V); unshift(@V,pop(@V)); push(@X,shift(@X)); }
 368 $code.=<<___;
 369         b       .L16_xx
 370 .align  4
 371 .L16_xx:
 372 ___
 373 for (;$i<32;$i++)
 374 { &BODY_16_XX($i,@V); unshift(@V,pop(@V)); push(@X,shift(@X)); }
 375 $code.=<<___;
 376         and     @X[6],0xfff
 377         li      @X[7],$lastK
 378         .set    noreorder
 379         bne     @X[6],@X[7],.L16_xx
 380         $PTR_ADD $Ktbl,16*$SZ           # Ktbl+=16
 381
 382         $REG_L  @X[15],16*$SZ($sp)      # restore pointer to the end of input
 383         $LD     @X[0],0*$SZ($ctx)
 384         $LD     @X[1],1*$SZ($ctx)
 385         $LD     @X[2],2*$SZ($ctx)
 386         $PTR_ADD $inp,16*$SZ
 387         $LD     @X[3],3*$SZ($ctx)
 388         $ADDU   $A,@X[0]
 389         $LD     @X[4],4*$SZ($ctx)
 390         $ADDU   $B,@X[1]
 391         $LD     @X[5],5*$SZ($ctx)
 392         $ADDU   $C,@X[2]
 393         $LD     @X[6],6*$SZ($ctx)
 394         $ADDU   $D,@X[3]
 395         $LD     @X[7],7*$SZ($ctx)
 396         $ADDU   $E,@X[4]
 397         $ST     $A,0*$SZ($ctx)
 398         $ADDU   $F,@X[5]
 399         $ST     $B,1*$SZ($ctx)
 400         $ADDU   $G,@X[6]
 401         $ST     $C,2*$SZ($ctx)
 402         $ADDU   $H,@X[7]
 403         $ST     $D,3*$SZ($ctx)
 404         $ST     $E,4*$SZ($ctx)
 405         $ST     $F,5*$SZ($ctx)
 406         $ST     $G,6*$SZ($ctx)
 407         $ST     $H,7*$SZ($ctx)
 408
 409         bne     $inp,@X[15],.Loop
 410         $PTR_SUB $Ktbl,`($rounds-16)*$SZ`       # rewind $Ktbl
 411
 412         $REG_L  $ra,$FRAMESIZE-1*$SZREG($sp)
 413         $REG_L  $fp,$FRAMESIZE-2*$SZREG($sp)
 414         $REG_L  $s11,$FRAMESIZE-3*$SZREG($sp)
 415         $REG_L  $s10,$FRAMESIZE-4*$SZREG($sp)
 416         $REG_L  $s9,$FRAMESIZE-5*$SZREG($sp)
 417         $REG_L  $s8,$FRAMESIZE-6*$SZREG($sp)
 418         $REG_L  $s7,$FRAMESIZE-7*$SZREG($sp)
 419         $REG_L  $s6,$FRAMESIZE-8*$SZREG($sp)
 420         $REG_L  $s5,$FRAMESIZE-9*$SZREG($sp)
 421         $REG_L  $s4,$FRAMESIZE-10*$SZREG($sp)
 422 ___
 423 $code.=<<___ if ($flavour =~ /nubi/i);
 424         $REG_L  $s3,$FRAMESIZE-11*$SZREG($sp)
 425         $REG_L  $s2,$FRAMESIZE-12*$SZREG($sp)
 426         $REG_L  $s1,$FRAMESIZE-13*$SZREG($sp)
 427         $REG_L  $s0,$FRAMESIZE-14*$SZREG($sp)
 428         $REG_L  $gp,$FRAMESIZE-15*$SZREG($sp)
 429 ___
 430 $code.=<<___;
 431         jr      $ra
 432         $PTR_ADD $sp,$FRAMESIZE
 433 .end    sha${label}_block_data_order
 434
 435 .rdata
 436 .align  5
 437 K${label}:
 438 ___
 439 if ($SZ==4) {
 440 $code.=<<___;
 441         .word   0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5
 442         .word   0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5
 443         .word   0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3
 444         .word   0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174
 445         .word   0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc
 446         .word   0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da
 447         .word   0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7
 448         .word   0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967
 449         .word   0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13
 450         .word   0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85
 451         .word   0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3
 452         .word   0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070
 453         .word   0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5
 454         .word   0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3
 455         .word   0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208
 456         .word   0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
 457 ___
 458 } else {
 459 $code.=<<___;
 460         .dword  0x428a2f98d728ae22, 0x7137449123ef65cd
 461         .dword  0xb5c0fbcfec4d3b2f, 0xe9b5dba58189dbbc
 462         .dword  0x3956c25bf348b538, 0x59f111f1b605d019
 463         .dword  0x923f82a4af194f9b, 0xab1c5ed5da6d8118
 464         .dword  0xd807aa98a3030242, 0x12835b0145706fbe
 465         .dword  0x243185be4ee4b28c, 0x550c7dc3d5ffb4e2
 466         .dword  0x72be5d74f27b896f, 0x80deb1fe3b1696b1
 467         .dword  0x9bdc06a725c71235, 0xc19bf174cf692694
 468         .dword  0xe49b69c19ef14ad2, 0xefbe4786384f25e3
 469         .dword  0x0fc19dc68b8cd5b5, 0x240ca1cc77ac9c65
 470         .dword  0x2de92c6f592b0275, 0x4a7484aa6ea6e483
 471         .dword  0x5cb0a9dcbd41fbd4, 0x76f988da831153b5
 472         .dword  0x983e5152ee66dfab, 0xa831c66d2db43210
 473         .dword  0xb00327c898fb213f, 0xbf597fc7beef0ee4
 474         .dword  0xc6e00bf33da88fc2, 0xd5a79147930aa725
 475         .dword  0x06ca6351e003826f, 0x142929670a0e6e70
 476         .dword  0x27b70a8546d22ffc, 0x2e1b21385c26c926
 477         .dword  0x4d2c6dfc5ac42aed, 0x53380d139d95b3df
 478         .dword  0x650a73548baf63de, 0x766a0abb3c77b2a8
 479         .dword  0x81c2c92e47edaee6, 0x92722c851482353b
 480         .dword  0xa2bfe8a14cf10364, 0xa81a664bbc423001
 481         .dword  0xc24b8b70d0f89791, 0xc76c51a30654be30
 482         .dword  0xd192e819d6ef5218, 0xd69906245565a910
 483         .dword  0xf40e35855771202a, 0x106aa07032bbd1b8
 484         .dword  0x19a4c116b8d2d0c8, 0x1e376c085141ab53
 485         .dword  0x2748774cdf8eeb99, 0x34b0bcb5e19b48a8
 486         .dword  0x391c0cb3c5c95a63, 0x4ed8aa4ae3418acb
 487         .dword  0x5b9cca4f7763e373, 0x682e6ff3d6b2b8a3
 488         .dword  0x748f82ee5defb2fc, 0x78a5636f43172f60
 489         .dword  0x84c87814a1f0ab72, 0x8cc702081a6439ec
 490         .dword  0x90befffa23631e28, 0xa4506cebde82bde9
 491         .dword  0xbef9a3f7b2c67915, 0xc67178f2e372532b
 492         .dword  0xca273eceea26619c, 0xd186b8c721c0c207
 493         .dword  0xeada7dd6cde0eb1e, 0xf57d4f7fee6ed178
 494         .dword  0x06f067aa72176fba, 0x0a637dc5a2c898a6
 495         .dword  0x113f9804bef90dae, 0x1b710b35131c471b
 496         .dword  0x28db77f523047d84, 0x32caab7b40c72493
 497         .dword  0x3c9ebe0a15c9bebc, 0x431d67c49c100d4c
 498         .dword  0x4cc5d4becb3e42b6, 0x597f299cfc657e2a
 499         .dword  0x5fcb6fab3ad6faec, 0x6c44198c4a475817
 500 ___
 501 }
 502 $code.=<<___;
 503 .asciiz "SHA${label} for MIPS, CRYPTOGAMS by <appro\@openssl.org>"
 504 .align  5
 505
 506 ___
 507
 508 $code =~ s/\`([^\`]*)\`/eval $1/gem;
 509 print $code;
 510 close STDOUT;