[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / arch / powerpc / boot / dts / mpc836x_mds.dts
| blob | 38c8594df3a4fd372e5d20e89792859e766f7a44 |
1 /*
2 * MPC8360E EMDS Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
13 /*
14 /memreserve/ 00000000 1000000;
15 */
17 / {
18 model = "MPC8360MDS";
19 compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
20 #address-cells = <1>;
21 #size-cells = <1>;
23 cpus {
24 #address-cells = <1>;
25 #size-cells = <0>;
27 PowerPC,8360@0 {
28 device_type = "cpu";
29 reg = <0>;
30 d-cache-line-size = <20>; // 32 bytes
31 i-cache-line-size = <20>; // 32 bytes
32 d-cache-size = <8000>; // L1, 32K
33 i-cache-size = <8000>; // L1, 32K
34 timebase-frequency = <3EF1480>;
35 bus-frequency = <FBC5200>;
36 clock-frequency = <1F78A400>;
37 32-bit;
38 };
39 };
41 memory {
42 device_type = "memory";
43 reg = <00000000 10000000>;
44 };
46 bcsr@f8000000 {
47 device_type = "board-control";
48 reg = <f8000000 8000>;
49 };
51 soc8360@e0000000 {
52 #address-cells = <1>;
53 #size-cells = <1>;
54 #interrupt-cells = <2>;
55 device_type = "soc";
56 ranges = <0 e0000000 00100000>;
57 reg = <e0000000 00000200>;
58 bus-frequency = <FBC5200>;
60 wdt@200 {
61 device_type = "watchdog";
62 compatible = "mpc83xx_wdt";
63 reg = <200 100>;
64 };
66 i2c@3000 {
67 device_type = "i2c";
68 compatible = "fsl-i2c";
69 reg = <3000 100>;
70 interrupts = <e 8>;
71 interrupt-parent = < &ipic >;
72 dfsrr;
73 };
75 i2c@3100 {
76 device_type = "i2c";
77 compatible = "fsl-i2c";
78 reg = <3100 100>;
79 interrupts = <f 8>;
80 interrupt-parent = < &ipic >;
81 dfsrr;
82 };
84 serial@4500 {
85 device_type = "serial";
86 compatible = "ns16550";
87 reg = <4500 100>;
88 clock-frequency = <FBC5200>;
89 interrupts = <9 8>;
90 interrupt-parent = < &ipic >;
91 };
93 serial@4600 {
94 device_type = "serial";
95 compatible = "ns16550";
96 reg = <4600 100>;
97 clock-frequency = <FBC5200>;
98 interrupts = <a 8>;
99 interrupt-parent = < &ipic >;
100 };
102 crypto@30000 {
103 device_type = "crypto";
104 model = "SEC2";
105 compatible = "talitos";
106 reg = <30000 10000>;
107 interrupts = <b 8>;
108 interrupt-parent = < &ipic >;
109 num-channels = <4>;
110 channel-fifo-len = <18>;
111 exec-units-mask = <0000007e>;
112 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
113 descriptor-types-mask = <01010ebf>;
114 };
116 pci@8500 {
117 interrupt-map-mask = <f800 0 0 7>;
118 interrupt-map = <
120 /* IDSEL 0x11 AD17 */
121 8800 0 0 1 &ipic 14 8
122 8800 0 0 2 &ipic 15 8
123 8800 0 0 3 &ipic 16 8
124 8800 0 0 4 &ipic 17 8
126 /* IDSEL 0x12 AD18 */
127 9000 0 0 1 &ipic 16 8
128 9000 0 0 2 &ipic 17 8
129 9000 0 0 3 &ipic 14 8
130 9000 0 0 4 &ipic 15 8
132 /* IDSEL 0x13 AD19 */
133 9800 0 0 1 &ipic 17 8
134 9800 0 0 2 &ipic 14 8
135 9800 0 0 3 &ipic 15 8
136 9800 0 0 4 &ipic 16 8
138 /* IDSEL 0x15 AD21*/
139 a800 0 0 1 &ipic 14 8
140 a800 0 0 2 &ipic 15 8
141 a800 0 0 3 &ipic 16 8
142 a800 0 0 4 &ipic 17 8
144 /* IDSEL 0x16 AD22*/
145 b000 0 0 1 &ipic 17 8
146 b000 0 0 2 &ipic 14 8
147 b000 0 0 3 &ipic 15 8
148 b000 0 0 4 &ipic 16 8
150 /* IDSEL 0x17 AD23*/
151 b800 0 0 1 &ipic 16 8
152 b800 0 0 2 &ipic 17 8
153 b800 0 0 3 &ipic 14 8
154 b800 0 0 4 &ipic 15 8
156 /* IDSEL 0x18 AD24*/
157 c000 0 0 1 &ipic 15 8
158 c000 0 0 2 &ipic 16 8
159 c000 0 0 3 &ipic 17 8
160 c000 0 0 4 &ipic 14 8>;
161 interrupt-parent = < &ipic >;
162 interrupts = <42 8>;
163 bus-range = <0 0>;
164 ranges = <02000000 0 a0000000 a0000000 0 10000000
165 42000000 0 80000000 80000000 0 10000000
166 01000000 0 00000000 e2000000 0 00100000>;
167 clock-frequency = <3f940aa>;
168 #interrupt-cells = <1>;
169 #size-cells = <2>;
170 #address-cells = <3>;
171 reg = <8500 100>;
172 compatible = "83xx";
173 device_type = "pci";
174 };
176 ipic: pic@700 {
177 interrupt-controller;
178 #address-cells = <0>;
179 #interrupt-cells = <2>;
180 reg = <700 100>;
181 built-in;
182 device_type = "ipic";
183 };
185 par_io@1400 {
186 reg = <1400 100>;
187 device_type = "par_io";
188 num-ports = <7>;
190 pio1: ucc_pin@01 {
191 pio-map = <
192 /* port pin dir open_drain assignment has_irq */
193 0 3 1 0 1 0 /* TxD0 */
194 0 4 1 0 1 0 /* TxD1 */
195 0 5 1 0 1 0 /* TxD2 */
196 0 6 1 0 1 0 /* TxD3 */
197 1 6 1 0 3 0 /* TxD4 */
198 1 7 1 0 1 0 /* TxD5 */
199 1 9 1 0 2 0 /* TxD6 */
200 1 a 1 0 2 0 /* TxD7 */
201 0 9 2 0 1 0 /* RxD0 */
202 0 a 2 0 1 0 /* RxD1 */
203 0 b 2 0 1 0 /* RxD2 */
204 0 c 2 0 1 0 /* RxD3 */
205 0 d 2 0 1 0 /* RxD4 */
206 1 1 2 0 2 0 /* RxD5 */
207 1 0 2 0 2 0 /* RxD6 */
208 1 4 2 0 2 0 /* RxD7 */
209 0 7 1 0 1 0 /* TX_EN */
210 0 8 1 0 1 0 /* TX_ER */
211 0 f 2 0 1 0 /* RX_DV */
212 0 10 2 0 1 0 /* RX_ER */
213 0 0 2 0 1 0 /* RX_CLK */
214 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
215 2 8 2 0 1 0>; /* GTX125 - CLK9 */
216 };
217 pio2: ucc_pin@02 {
218 pio-map = <
219 /* port pin dir open_drain assignment has_irq */
220 0 11 1 0 1 0 /* TxD0 */
221 0 12 1 0 1 0 /* TxD1 */
222 0 13 1 0 1 0 /* TxD2 */
223 0 14 1 0 1 0 /* TxD3 */
224 1 2 1 0 1 0 /* TxD4 */
225 1 3 1 0 2 0 /* TxD5 */
226 1 5 1 0 3 0 /* TxD6 */
227 1 8 1 0 3 0 /* TxD7 */
228 0 17 2 0 1 0 /* RxD0 */
229 0 18 2 0 1 0 /* RxD1 */
230 0 19 2 0 1 0 /* RxD2 */
231 0 1a 2 0 1 0 /* RxD3 */
232 0 1b 2 0 1 0 /* RxD4 */
233 1 c 2 0 2 0 /* RxD5 */
234 1 d 2 0 3 0 /* RxD6 */
235 1 b 2 0 2 0 /* RxD7 */
236 0 15 1 0 1 0 /* TX_EN */
237 0 16 1 0 1 0 /* TX_ER */
238 0 1d 2 0 1 0 /* RX_DV */
239 0 1e 2 0 1 0 /* RX_ER */
240 0 1f 2 0 1 0 /* RX_CLK */
241 2 2 1 0 2 0 /* GTX_CLK - CLK10 */
242 2 3 2 0 1 0 /* GTX125 - CLK4 */
243 0 1 3 0 2 0 /* MDIO */
244 0 2 1 0 1 0>; /* MDC */
245 };
247 };
248 };
250 qe@e0100000 {
251 #address-cells = <1>;
252 #size-cells = <1>;
253 device_type = "qe";
254 model = "QE";
255 ranges = <0 e0100000 00100000>;
256 reg = <e0100000 480>;
257 brg-frequency = <0>;
258 bus-frequency = <179A7B00>;
260 muram@10000 {
261 device_type = "muram";
262 ranges = <0 00010000 0000c000>;
264 data-only@0{
265 reg = <0 c000>;
266 };
267 };
269 spi@4c0 {
270 device_type = "spi";
271 compatible = "fsl_spi";
272 reg = <4c0 40>;
273 interrupts = <2>;
274 interrupt-parent = < &qeic >;
275 mode = "cpu";
276 };
278 spi@500 {
279 device_type = "spi";
280 compatible = "fsl_spi";
281 reg = <500 40>;
282 interrupts = <1>;
283 interrupt-parent = < &qeic >;
284 mode = "cpu";
285 };
287 usb@6c0 {
288 device_type = "usb";
289 compatible = "qe_udc";
290 reg = <6c0 40 8B00 100>;
291 interrupts = <b>;
292 interrupt-parent = < &qeic >;
293 mode = "slave";
294 };
296 ucc@2000 {
297 device_type = "network";
298 compatible = "ucc_geth";
299 model = "UCC";
300 device-id = <1>;
301 reg = <2000 200>;
302 interrupts = <20>;
303 interrupt-parent = < &qeic >;
304 mac-address = [ 00 04 9f 00 23 23 ];
305 rx-clock = <0>;
306 tx-clock = <19>;
307 phy-handle = < &phy0 >;
308 phy-connection-type = "rgmii-id";
309 pio-handle = < &pio1 >;
310 };
312 ucc@3000 {
313 device_type = "network";
314 compatible = "ucc_geth";
315 model = "UCC";
316 device-id = <2>;
317 reg = <3000 200>;
318 interrupts = <21>;
319 interrupt-parent = < &qeic >;
320 mac-address = [ 00 11 22 33 44 55 ];
321 rx-clock = <0>;
322 tx-clock = <14>;
323 phy-handle = < &phy1 >;
324 phy-connection-type = "rgmii-id";
325 pio-handle = < &pio2 >;
326 };
328 mdio@2120 {
329 #address-cells = <1>;
330 #size-cells = <0>;
331 reg = <2120 18>;
332 device_type = "mdio";
333 compatible = "ucc_geth_phy";
335 phy0: ethernet-phy@00 {
336 interrupt-parent = < &ipic >;
337 interrupts = <11 8>;
338 reg = <0>;
339 device_type = "ethernet-phy";
340 };
341 phy1: ethernet-phy@01 {
342 interrupt-parent = < &ipic >;
343 interrupts = <12 8>;
344 reg = <1>;
345 device_type = "ethernet-phy";
346 };
347 };
349 qeic: qeic@80 {
350 interrupt-controller;
351 device_type = "qeic";
352 #address-cells = <0>;
353 #interrupt-cells = <1>;
354 reg = <80 80>;
355 built-in;
356 big-endian;
357 interrupts = <20 8 21 8>; //high:32 low:33
358 interrupt-parent = < &ipic >;
359 };
361 };
362 };