allow coexistance of N build and AC build.
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / arch / mips / lib / dump_tlb.c
blob28d8aec5a34e060e32dbd137b739e981195044af
1 /*
2 * Dump R4x00 TLB for debugging purposes.
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc.
6 */
7 #include <linux/kernel.h>
8 #include <linux/mm.h>
9 #include <linux/sched.h>
10 #include <linux/string.h>
12 #include <asm/bootinfo.h>
13 #include <asm/cachectl.h>
14 #include <asm/cpu.h>
15 #include <asm/mipsregs.h>
16 #include <asm/page.h>
17 #include <asm/pgtable.h>
19 static inline const char *msk2str(unsigned int mask)
21 switch (mask) {
22 case PM_4K: return "4kb";
23 case PM_16K: return "16kb";
24 case PM_64K: return "64kb";
25 case PM_256K: return "256kb";
26 #ifndef CONFIG_CPU_VR41XX
27 case PM_1M: return "1Mb";
28 case PM_4M: return "4Mb";
29 case PM_16M: return "16Mb";
30 case PM_64M: return "64Mb";
31 case PM_256M: return "256Mb";
32 #endif
35 return "";
38 #define BARRIER() \
39 __asm__ __volatile__( \
40 ".set\tnoreorder\n\t" \
41 "nop;nop;nop;nop;nop;nop;nop\n\t" \
42 ".set\treorder");
44 void dump_tlb(int first, int last)
46 unsigned long s_entryhi, entryhi, asid;
47 unsigned long long entrylo0, entrylo1;
48 unsigned int s_index, pagemask, c0, c1, i;
50 s_entryhi = read_c0_entryhi();
51 s_index = read_c0_index();
52 asid = s_entryhi & 0xff;
54 for (i = first; i <= last; i++) {
55 write_c0_index(i);
56 BARRIER();
57 tlb_read();
58 BARRIER();
59 pagemask = read_c0_pagemask();
60 entryhi = read_c0_entryhi();
61 entrylo0 = read_c0_entrylo0();
62 entrylo1 = read_c0_entrylo1();
64 /* Unused entries have a virtual address of CKSEG0. */
65 if ((entryhi & ~0x1ffffUL) != CKSEG0
66 && (entryhi & 0xff) == asid) {
67 #ifdef CONFIG_32BIT
68 int width = 8;
69 #else
70 int width = 11;
71 #endif
73 * Only print entries in use
75 printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
77 c0 = (entrylo0 >> 3) & 7;
78 c1 = (entrylo1 >> 3) & 7;
80 printk("va=%0*lx asid=%02lx\n",
81 width, (entryhi & ~0x1fffUL),
82 entryhi & 0xff);
83 printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ",
84 width,
85 (entrylo0 << 6) & PAGE_MASK, c0,
86 (entrylo0 & 4) ? 1 : 0,
87 (entrylo0 & 2) ? 1 : 0,
88 (entrylo0 & 1) ? 1 : 0);
89 printk("[pa=%0*llx c=%d d=%d v=%d g=%d]\n",
90 width,
91 (entrylo1 << 6) & PAGE_MASK, c1,
92 (entrylo1 & 4) ? 1 : 0,
93 (entrylo1 & 2) ? 1 : 0,
94 (entrylo1 & 1) ? 1 : 0);
97 printk("\n");
99 write_c0_entryhi(s_entryhi);
100 write_c0_index(s_index);
103 void dump_tlb_all(void)
105 dump_tlb(0, current_cpu_data.tlbsize - 1);
108 void dump_tlb_wired(void)
110 int wired;
112 wired = read_c0_wired();
113 printk("Wired: %d", wired);
114 dump_tlb(0, read_c0_wired());
117 void dump_tlb_addr(unsigned long addr)
119 unsigned int flags, oldpid;
120 int index;
122 local_irq_save(flags);
123 oldpid = read_c0_entryhi() & 0xff;
124 BARRIER();
125 write_c0_entryhi((addr & PAGE_MASK) | oldpid);
126 BARRIER();
127 tlb_probe();
128 BARRIER();
129 index = read_c0_index();
130 write_c0_entryhi(oldpid);
131 local_irq_restore(flags);
133 if (index < 0) {
134 printk("No entry for address 0x%08lx in TLB\n", addr);
135 return;
138 printk("Entry %d maps address 0x%08lx\n", index, addr);
139 dump_tlb(index, index);
142 void dump_tlb_nonwired(void)
144 dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1);
147 void dump_list_process(struct task_struct *t, void *address)
149 pgd_t *page_dir, *pgd;
150 pud_t *pud;
151 pmd_t *pmd;
152 pte_t *pte, page;
153 unsigned long addr, val;
154 int width = sizeof(long) * 2;
156 addr = (unsigned long) address;
158 printk("Addr == %08lx\n", addr);
159 #ifdef CONFIG_64BIT
160 printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd);
161 #endif
163 #ifdef CONFIG_64BIT
164 page_dir = pgd_offset(t->mm, 0UL);
165 pgd = pgd_offset(t->mm, addr);
166 #else
167 if (addr > KSEG0) {
168 page_dir = pgd_offset_k(0);
169 pgd = pgd_offset_k(addr);
170 } else if (t->mm) {
171 page_dir = pgd_offset(t->mm, 0);
172 pgd = pgd_offset(t->mm, addr);
173 } else {
174 printk("Current thread has no mm\n");
175 return;
177 #endif
178 printk("page_dir == %0*lx\n", width, (unsigned long) page_dir);
179 printk("pgd == %0*lx\n", width, (unsigned long) pgd);
181 pud = pud_offset(pgd, addr);
182 printk("pud == %0*lx\n", width, (unsigned long) pud);
184 pmd = pmd_offset(pud, addr);
185 printk("pmd == %0*lx\n", width, (unsigned long) pmd);
187 pte = pte_offset(pmd, addr);
188 printk("pte == %0*lx\n", width, (unsigned long) pte);
190 page = *pte;
191 #ifdef CONFIG_64BIT_PHYS_ADDR
192 printk("page == %08Lx\n", pte_val(page));
193 #else
194 printk("page == %0*lx\n", width, pte_val(page));
195 #endif
197 val = pte_val(page);
198 if (val & _PAGE_PRESENT) printk("present ");
199 if (val & _PAGE_READ) printk("read ");
200 if (val & _PAGE_WRITE) printk("write ");
201 if (val & _PAGE_ACCESSED) printk("accessed ");
202 if (val & _PAGE_MODIFIED) printk("modified ");
203 if (val & _PAGE_R4KBUG) printk("r4kbug ");
204 if (val & _PAGE_GLOBAL) printk("global ");
205 if (val & _PAGE_VALID) printk("valid ");
206 printk("\n");
209 void dump_list_current(void *address)
211 dump_list_process(current, address);
214 unsigned long vtop(void *address)
216 pgd_t *pgd;
217 pud_t *pud;
218 pmd_t *pmd;
219 pte_t *pte;
220 unsigned long addr, paddr;
222 addr = (unsigned long) address;
223 pgd = pgd_offset(current->mm, addr);
224 pud = pud_offset(pgd, addr);
225 pmd = pmd_offset(pud, addr);
226 pte = pte_offset(pmd, addr);
227 paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
228 paddr |= (addr & ~PAGE_MASK);
230 return paddr;
233 void dump16(unsigned long *p)
235 int i;
237 for (i = 0; i < 8; i++) {
238 printk("*%08lx == %08lx, ", (unsigned long)p, *p);
239 p++;
240 printk("*%08lx == %08lx\n", (unsigned long)p, *p);
241 p++;