?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
allow coexistance of N build and AC build.
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / arch / arm / mach-at91 / at91sam9261_devices.c
blob9db58da0475435d79e7068e2681a612f373b346a
1 /*
2 * arch/arm/mach-at91/at91sam9261_devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/platform_device.h>
17
18 #include <asm/arch/board.h>
19 #include <asm/arch/gpio.h>
20 #include <asm/arch/at91sam9261.h>
21 #include <asm/arch/at91sam9261_matrix.h>
22 #include <asm/arch/at91sam926x_mc.h>
23
24 #include "generic.h"
25
26
27 /* --------------------------------------------------------------------
28 * USB Host
29 * -------------------------------------------------------------------- */
30
31 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
32 static u64 ohci_dmamask = 0xffffffffUL;
33 static struct at91_usbh_data usbh_data;
34
35 static struct resource usbh_resources[] = {
36 [0] = {
37 .start = AT91SAM9261_UHP_BASE,
38 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = AT91SAM9261_ID_UHP,
43 .end = AT91SAM9261_ID_UHP,
44 .flags = IORESOURCE_IRQ,
45 },
46 };
47
48 static struct platform_device at91sam9261_usbh_device = {
49 .name = "at91_ohci",
50 .id = -1,
51 .dev = {
52 .dma_mask = &ohci_dmamask,
53 .coherent_dma_mask = 0xffffffff,
54 .platform_data = &usbh_data,
55 },
56 .resource = usbh_resources,
57 .num_resources = ARRAY_SIZE(usbh_resources),
58 };
59
60 void __init at91_add_device_usbh(struct at91_usbh_data *data)
61 {
62 if (!data)
63 return;
64
65 usbh_data = *data;
66 platform_device_register(&at91sam9261_usbh_device);
67 }
68 #else
69 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
70 #endif
71
72
73 /* --------------------------------------------------------------------
74 * USB Device (Gadget)
75 * -------------------------------------------------------------------- */
76
77 #ifdef CONFIG_USB_GADGET_AT91
78 static struct at91_udc_data udc_data;
79
80 static struct resource udc_resources[] = {
81 [0] = {
82 .start = AT91SAM9261_BASE_UDP,
83 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
84 .flags = IORESOURCE_MEM,
85 },
86 [1] = {
87 .start = AT91SAM9261_ID_UDP,
88 .end = AT91SAM9261_ID_UDP,
89 .flags = IORESOURCE_IRQ,
90 },
91 };
92
93 static struct platform_device at91sam9261_udc_device = {
94 .name = "at91_udc",
95 .id = -1,
96 .dev = {
97 .platform_data = &udc_data,
98 },
99 .resource = udc_resources,
100 .num_resources = ARRAY_SIZE(udc_resources),
101 };
102
103 void __init at91_add_device_udc(struct at91_udc_data *data)
104 {
105 unsigned long x;
106
107 if (!data)
108 return;
109
110 if (data->vbus_pin) {
111 at91_set_gpio_input(data->vbus_pin, 0);
112 at91_set_deglitch(data->vbus_pin, 1);
113 }
114
115 /* Pullup pin is handled internally */
116 x = at91_sys_read(AT91_MATRIX_USBPUCR);
117 at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
118
119 udc_data = *data;
120 platform_device_register(&at91sam9261_udc_device);
121 }
122 #else
123 void __init at91_add_device_udc(struct at91_udc_data *data) {}
124 #endif
125
126 /* --------------------------------------------------------------------
127 * MMC / SD
128 * -------------------------------------------------------------------- */
129
130 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
131 static u64 mmc_dmamask = 0xffffffffUL;
132 static struct at91_mmc_data mmc_data;
133
134 static struct resource mmc_resources[] = {
135 [0] = {
136 .start = AT91SAM9261_BASE_MCI,
137 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
138 .flags = IORESOURCE_MEM,
139 },
140 [1] = {
141 .start = AT91SAM9261_ID_MCI,
142 .end = AT91SAM9261_ID_MCI,
143 .flags = IORESOURCE_IRQ,
144 },
145 };
146
147 static struct platform_device at91sam9261_mmc_device = {
148 .name = "at91_mci",
149 .id = -1,
150 .dev = {
151 .dma_mask = &mmc_dmamask,
152 .coherent_dma_mask = 0xffffffff,
153 .platform_data = &mmc_data,
154 },
155 .resource = mmc_resources,
156 .num_resources = ARRAY_SIZE(mmc_resources),
157 };
158
159 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
160 {
161 if (!data)
162 return;
163
164 /* input/irq */
165 if (data->det_pin) {
166 at91_set_gpio_input(data->det_pin, 1);
167 at91_set_deglitch(data->det_pin, 1);
168 }
169 if (data->wp_pin)
170 at91_set_gpio_input(data->wp_pin, 1);
171 if (data->vcc_pin)
172 at91_set_gpio_output(data->vcc_pin, 0);
173
174 /* CLK */
175 at91_set_B_periph(AT91_PIN_PA2, 0);
176
177 /* CMD */
178 at91_set_B_periph(AT91_PIN_PA1, 1);
179
180 /* DAT0, maybe DAT1..DAT3 */
181 at91_set_B_periph(AT91_PIN_PA0, 1);
182 if (data->wire4) {
183 at91_set_B_periph(AT91_PIN_PA4, 1);
184 at91_set_B_periph(AT91_PIN_PA5, 1);
185 at91_set_B_periph(AT91_PIN_PA6, 1);
186 }
187
188 mmc_data = *data;
189 platform_device_register(&at91sam9261_mmc_device);
190 }
191 #else
192 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
193 #endif
194
195
196 /* --------------------------------------------------------------------
197 * NAND / SmartMedia
198 * -------------------------------------------------------------------- */
199
200 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
201 static struct at91_nand_data nand_data;
202
203 #define NAND_BASE AT91_CHIPSELECT_3
204
205 static struct resource nand_resources[] = {
206 {
207 .start = NAND_BASE,
208 .end = NAND_BASE + SZ_256M - 1,
209 .flags = IORESOURCE_MEM,
210 }
211 };
212
213 static struct platform_device at91_nand_device = {
214 .name = "at91_nand",
215 .id = -1,
216 .dev = {
217 .platform_data = &nand_data,
218 },
219 .resource = nand_resources,
220 .num_resources = ARRAY_SIZE(nand_resources),
221 };
222
223 void __init at91_add_device_nand(struct at91_nand_data *data)
224 {
225 unsigned long csa, mode;
226
227 if (!data)
228 return;
229
230 csa = at91_sys_read(AT91_MATRIX_EBICSA);
231 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
232
233 /* set the bus interface characteristics */
234 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
235 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
236
237 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
238 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
239
240 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
241
242 if (data->bus_width_16)
243 mode = AT91_SMC_DBW_16;
244 else
245 mode = AT91_SMC_DBW_8;
246 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
247
248 /* enable pin */
249 if (data->enable_pin)
250 at91_set_gpio_output(data->enable_pin, 1);
251
252 /* ready/busy pin */
253 if (data->rdy_pin)
254 at91_set_gpio_input(data->rdy_pin, 1);
255
256 /* card detect pin */
257 if (data->det_pin)
258 at91_set_gpio_input(data->det_pin, 1);
259
260 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
261 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
262
263 nand_data = *data;
264 platform_device_register(&at91_nand_device);
265 }
266
267 #else
268 void __init at91_add_device_nand(struct at91_nand_data *data) {}
269 #endif
270
271
272 /* --------------------------------------------------------------------
273 * TWI (i2c)
274 * -------------------------------------------------------------------- */
275
276 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
277
278 static struct resource twi_resources[] = {
279 [0] = {
280 .start = AT91SAM9261_BASE_TWI,
281 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
282 .flags = IORESOURCE_MEM,
283 },
284 [1] = {
285 .start = AT91SAM9261_ID_TWI,
286 .end = AT91SAM9261_ID_TWI,
287 .flags = IORESOURCE_IRQ,
288 },
289 };
290
291 static struct platform_device at91sam9261_twi_device = {
292 .name = "at91_i2c",
293 .id = -1,
294 .resource = twi_resources,
295 .num_resources = ARRAY_SIZE(twi_resources),
296 };
297
298 void __init at91_add_device_i2c(void)
299 {
300 /* pins used for TWI interface */
301 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
302 at91_set_multi_drive(AT91_PIN_PA7, 1);
303
304 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
305 at91_set_multi_drive(AT91_PIN_PA8, 1);
306
307 platform_device_register(&at91sam9261_twi_device);
308 }
309 #else
310 void __init at91_add_device_i2c(void) {}
311 #endif
312
313
314 /* --------------------------------------------------------------------
315 * SPI
316 * -------------------------------------------------------------------- */
317
318 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
319 static u64 spi_dmamask = 0xffffffffUL;
320
321 static struct resource spi0_resources[] = {
322 [0] = {
323 .start = AT91SAM9261_BASE_SPI0,
324 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
325 .flags = IORESOURCE_MEM,
326 },
327 [1] = {
328 .start = AT91SAM9261_ID_SPI0,
329 .end = AT91SAM9261_ID_SPI0,
330 .flags = IORESOURCE_IRQ,
331 },
332 };
333
334 static struct platform_device at91sam9261_spi0_device = {
335 .name = "atmel_spi",
336 .id = 0,
337 .dev = {
338 .dma_mask = &spi_dmamask,
339 .coherent_dma_mask = 0xffffffff,
340 },
341 .resource = spi0_resources,
342 .num_resources = ARRAY_SIZE(spi0_resources),
343 };
344
345 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
346
347 static struct resource spi1_resources[] = {
348 [0] = {
349 .start = AT91SAM9261_BASE_SPI1,
350 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
351 .flags = IORESOURCE_MEM,
352 },
353 [1] = {
354 .start = AT91SAM9261_ID_SPI1,
355 .end = AT91SAM9261_ID_SPI1,
356 .flags = IORESOURCE_IRQ,
357 },
358 };
359
360 static struct platform_device at91sam9261_spi1_device = {
361 .name = "atmel_spi",
362 .id = 1,
363 .dev = {
364 .dma_mask = &spi_dmamask,
365 .coherent_dma_mask = 0xffffffff,
366 },
367 .resource = spi1_resources,
368 .num_resources = ARRAY_SIZE(spi1_resources),
369 };
370
371 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
372
373 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
374 {
375 int i;
376 unsigned long cs_pin;
377 short enable_spi0 = 0;
378 short enable_spi1 = 0;
379
380 /* Choose SPI chip-selects */
381 for (i = 0; i < nr_devices; i++) {
382 if (devices[i].controller_data)
383 cs_pin = (unsigned long) devices[i].controller_data;
384 else if (devices[i].bus_num == 0)
385 cs_pin = spi0_standard_cs[devices[i].chip_select];
386 else
387 cs_pin = spi1_standard_cs[devices[i].chip_select];
388
389 if (devices[i].bus_num == 0)
390 enable_spi0 = 1;
391 else
392 enable_spi1 = 1;
393
394 /* enable chip-select pin */
395 at91_set_gpio_output(cs_pin, 1);
396
397 /* pass chip-select pin to driver */
398 devices[i].controller_data = (void *) cs_pin;
399 }
400
401 spi_register_board_info(devices, nr_devices);
402
403 /* Configure SPI bus(es) */
404 if (enable_spi0) {
405 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
406 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
407 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
408
409 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
410 platform_device_register(&at91sam9261_spi0_device);
411 }
412 if (enable_spi1) {
413 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
414 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
415 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
416
417 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
418 platform_device_register(&at91sam9261_spi1_device);
419 }
420 }
421 #else
422 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
423 #endif
424
425
426 /* --------------------------------------------------------------------
427 * LCD Controller
428 * -------------------------------------------------------------------- */
429
430 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
431 static u64 lcdc_dmamask = 0xffffffffUL;
432 static struct atmel_lcdfb_info lcdc_data;
433
434 static struct resource lcdc_resources[] = {
435 [0] = {
436 .start = AT91SAM9261_LCDC_BASE,
437 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
438 .flags = IORESOURCE_MEM,
439 },
440 [1] = {
441 .start = AT91SAM9261_ID_LCDC,
442 .end = AT91SAM9261_ID_LCDC,
443 .flags = IORESOURCE_IRQ,
444 },
445 #if defined(CONFIG_FB_INTSRAM)
446 [2] = {
447 .start = AT91SAM9261_SRAM_BASE,
448 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
449 .flags = IORESOURCE_MEM,
450 },
451 #endif
452 };
453
454 static struct platform_device at91_lcdc_device = {
455 .name = "atmel_lcdfb",
456 .id = 0,
457 .dev = {
458 .dma_mask = &lcdc_dmamask,
459 .coherent_dma_mask = 0xffffffff,
460 .platform_data = &lcdc_data,
461 },
462 .resource = lcdc_resources,
463 .num_resources = ARRAY_SIZE(lcdc_resources),
464 };
465
466 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
467 {
468 if (!data) {
469 return;
470 }
471
472 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
473 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
474 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
475 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
476 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
477 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
478 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
479 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
480 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
481 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
482 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
483 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
484 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
485 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
486 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
487 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
488 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
489 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
490 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
491 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
492 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
493 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
494
495 lcdc_data = *data;
496 platform_device_register(&at91_lcdc_device);
497 }
498 #else
499 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
500 #endif
501
502
503 /* --------------------------------------------------------------------
504 * LEDs
505 * -------------------------------------------------------------------- */
506
507 #if defined(CONFIG_LEDS)
508 u8 at91_leds_cpu;
509 u8 at91_leds_timer;
510
511 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
512 {
513 /* Enable GPIO to access the LEDs */
514 at91_set_gpio_output(cpu_led, 1);
515 at91_set_gpio_output(timer_led, 1);
516
517 at91_leds_cpu = cpu_led;
518 at91_leds_timer = timer_led;
519 }
520 #else
521 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
522 #endif
523
524
525 /* --------------------------------------------------------------------
526 * UART
527 * -------------------------------------------------------------------- */
528
529 #if defined(CONFIG_SERIAL_ATMEL)
530 static struct resource dbgu_resources[] = {
531 [0] = {
532 .start = AT91_VA_BASE_SYS + AT91_DBGU,
533 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
534 .flags = IORESOURCE_MEM,
535 },
536 [1] = {
537 .start = AT91_ID_SYS,
538 .end = AT91_ID_SYS,
539 .flags = IORESOURCE_IRQ,
540 },
541 };
542
543 static struct atmel_uart_data dbgu_data = {
544 .use_dma_tx = 0,
545 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
546 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
547 };
548
549 static struct platform_device at91sam9261_dbgu_device = {
550 .name = "atmel_usart",
551 .id = 0,
552 .dev = {
553 .platform_data = &dbgu_data,
554 .coherent_dma_mask = 0xffffffff,
555 },
556 .resource = dbgu_resources,
557 .num_resources = ARRAY_SIZE(dbgu_resources),
558 };
559
560 static inline void configure_dbgu_pins(void)
561 {
562 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
563 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
564 }
565
566 static struct resource uart0_resources[] = {
567 [0] = {
568 .start = AT91SAM9261_BASE_US0,
569 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
570 .flags = IORESOURCE_MEM,
571 },
572 [1] = {
573 .start = AT91SAM9261_ID_US0,
574 .end = AT91SAM9261_ID_US0,
575 .flags = IORESOURCE_IRQ,
576 },
577 };
578
579 static struct atmel_uart_data uart0_data = {
580 .use_dma_tx = 1,
581 .use_dma_rx = 1,
582 };
583
584 static struct platform_device at91sam9261_uart0_device = {
585 .name = "atmel_usart",
586 .id = 1,
587 .dev = {
588 .platform_data = &uart0_data,
589 .coherent_dma_mask = 0xffffffff,
590 },
591 .resource = uart0_resources,
592 .num_resources = ARRAY_SIZE(uart0_resources),
593 };
594
595 static inline void configure_usart0_pins(void)
596 {
597 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
598 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
599 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
600 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
601 }
602
603 static struct resource uart1_resources[] = {
604 [0] = {
605 .start = AT91SAM9261_BASE_US1,
606 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
607 .flags = IORESOURCE_MEM,
608 },
609 [1] = {
610 .start = AT91SAM9261_ID_US1,
611 .end = AT91SAM9261_ID_US1,
612 .flags = IORESOURCE_IRQ,
613 },
614 };
615
616 static struct atmel_uart_data uart1_data = {
617 .use_dma_tx = 1,
618 .use_dma_rx = 1,
619 };
620
621 static struct platform_device at91sam9261_uart1_device = {
622 .name = "atmel_usart",
623 .id = 2,
624 .dev = {
625 .platform_data = &uart1_data,
626 .coherent_dma_mask = 0xffffffff,
627 },
628 .resource = uart1_resources,
629 .num_resources = ARRAY_SIZE(uart1_resources),
630 };
631
632 static inline void configure_usart1_pins(void)
633 {
634 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
635 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
636 }
637
638 static struct resource uart2_resources[] = {
639 [0] = {
640 .start = AT91SAM9261_BASE_US2,
641 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
642 .flags = IORESOURCE_MEM,
643 },
644 [1] = {
645 .start = AT91SAM9261_ID_US2,
646 .end = AT91SAM9261_ID_US2,
647 .flags = IORESOURCE_IRQ,
648 },
649 };
650
651 static struct atmel_uart_data uart2_data = {
652 .use_dma_tx = 1,
653 .use_dma_rx = 1,
654 };
655
656 static struct platform_device at91sam9261_uart2_device = {
657 .name = "atmel_usart",
658 .id = 3,
659 .dev = {
660 .platform_data = &uart2_data,
661 .coherent_dma_mask = 0xffffffff,
662 },
663 .resource = uart2_resources,
664 .num_resources = ARRAY_SIZE(uart2_resources),
665 };
666
667 static inline void configure_usart2_pins(void)
668 {
669 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
670 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
671 }
672
673 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
674 struct platform_device *atmel_default_console_device; /* the serial console device */
675
676 void __init at91_init_serial(struct at91_uart_config *config)
677 {
678 int i;
679
680 /* Fill in list of supported UARTs */
681 for (i = 0; i < config->nr_tty; i++) {
682 switch (config->tty_map[i]) {
683 case 0:
684 configure_usart0_pins();
685 at91_uarts[i] = &at91sam9261_uart0_device;
686 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
687 break;
688 case 1:
689 configure_usart1_pins();
690 at91_uarts[i] = &at91sam9261_uart1_device;
691 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
692 break;
693 case 2:
694 configure_usart2_pins();
695 at91_uarts[i] = &at91sam9261_uart2_device;
696 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
697 break;
698 case 3:
699 configure_dbgu_pins();
700 at91_uarts[i] = &at91sam9261_dbgu_device;
701 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
702 break;
703 default:
704 continue;
705 }
706 at91_uarts[i]->id = i; /* update ID number to mapped ID */
707 }
708
709 /* Set serial console device */
710 if (config->console_tty < ATMEL_MAX_UART)
711 atmel_default_console_device = at91_uarts[config->console_tty];
712 if (!atmel_default_console_device)
713 printk(KERN_INFO "AT91: No default serial console defined.\n");
714 }
715
716 void __init at91_add_device_serial(void)
717 {
718 int i;
719
720 for (i = 0; i < ATMEL_MAX_UART; i++) {
721 if (at91_uarts[i])
722 platform_device_register(at91_uarts[i]);
723 }
724 }
725 #else
726 void __init at91_init_serial(struct at91_uart_config *config) {}
727 void __init at91_add_device_serial(void) {}
728 #endif
729
730
731 /* -------------------------------------------------------------------- */
732
733 /*
734 * These devices are always present and don't need any board-specific
735 * setup.
736 */
737 static int __init at91_add_standard_devices(void)
738 {
739 return 0;
740 }
741
742 arch_initcall(at91_add_standard_devices);
Tomato firmware and modifications.