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129 .\" ========================================================================
132 .TH GCC 1 "2010-08-01" "gcc-4.2.4" "GNU"
134 gcc \- GNU project C and C++ compiler
136 .IX Header "SYNOPSIS"
137 gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
138 [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
139 [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
140 [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
141 [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
142 [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
143 [\fB\-o\fR \fIoutfile\fR] [@\fIfile\fR] \fIinfile\fR...
145 Only the most useful options are listed here; see below for the
146 remainder. \fBg++\fR accepts mostly the same options as \fBgcc\fR.
148 .IX Header "DESCRIPTION"
149 When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
150 assembly and linking. The \*(L"overall options\*(R" allow you to stop this
151 process at an intermediate stage. For example, the \fB\-c\fR option
152 says not to run the linker. Then the output consists of object files
153 output by the assembler.
155 Other options are passed on to one stage of processing. Some options
156 control the preprocessor and others the compiler itself. Yet other
157 options control the assembler and linker; most of these are not
158 documented here, since you rarely need to use any of them.
160 Most of the command line options that you can use with \s-1GCC\s0 are useful
161 for C programs; when an option is only useful with another language
162 (usually \*(C+), the explanation says so explicitly. If the description
163 for a particular option does not mention a source language, you can use
164 that option with all supported languages.
166 The \fBgcc\fR program accepts options and file names as operands. Many
167 options have multi-letter names; therefore multiple single-letter options
168 may \fInot\fR be grouped: \fB\-dr\fR is very different from \fB\-d\ \-r\fR.
170 You can mix options and other arguments. For the most part, the order
171 you use doesn't matter. Order does matter when you use several options
172 of the same kind; for example, if you specify \fB\-L\fR more than once,
173 the directories are searched in the order specified.
175 Many options have long names starting with \fB\-f\fR or with
176 \&\fB\-W\fR\-\-\-for example,
177 \&\fB\-fmove\-loop\-invariants\fR, \fB\-Wformat\fR and so on. Most of
178 these have both positive and negative forms; the negative form of
179 \&\fB\-ffoo\fR would be \fB\-fno\-foo\fR. This manual documents
180 only one of these two forms, whichever one is not the default.
184 .IX Subsection "Option Summary"
185 Here is a summary of all the options, grouped by type. Explanations are
186 in the following sections.
187 .IP "\fIOverall Options\fR" 4
188 .IX Item "Overall Options"
189 \&\fB\-c \-S \-E \-o\fR \fIfile\fR \fB\-combine \-pipe \-pass\-exit\-codes
190 \&\-x\fR \fIlanguage\fR \fB\-v \-### \-\-help \-\-target\-help \-\-version @\fR\fIfile\fR
191 .IP "\fIC Language Options\fR" 4
192 .IX Item "C Language Options"
193 \&\fB\-ansi \-std=\fR\fIstandard\fR \fB\-fgnu89\-inline
194 \&\-aux\-info\fR \fIfilename\fR
195 \&\fB\-fno\-asm \-fno\-builtin \-fno\-builtin\-\fR\fIfunction\fR
196 \&\fB\-fhosted \-ffreestanding \-fopenmp \-fms\-extensions
197 \&\-trigraphs \-no\-integrated\-cpp \-traditional \-traditional\-cpp
198 \&\-fallow\-single\-precision \-fcond\-mismatch
199 \&\-fsigned\-bitfields \-fsigned\-char
200 \&\-funsigned\-bitfields \-funsigned\-char\fR
201 .IP "\fI\*(C+ Language Options\fR" 4
202 .IX Item " Language Options"
203 \&\fB\-fabi\-version=\fR\fIn\fR \fB\-fno\-access\-control \-fcheck\-new
204 \&\-fconserve\-space \-ffriend\-injection
205 \&\-fno\-elide\-constructors
206 \&\-fno\-enforce\-eh\-specs
207 \&\-ffor\-scope \-fno\-for\-scope \-fno\-gnu\-keywords
208 \&\-fno\-implicit\-templates
209 \&\-fno\-implicit\-inline\-templates
210 \&\-fno\-implement\-inlines \-fms\-extensions
211 \&\-fno\-nonansi\-builtins \-fno\-operator\-names
212 \&\-fno\-optional\-diags \-fpermissive
213 \&\-frepo \-fno\-rtti \-fstats \-ftemplate\-depth\-\fR\fIn\fR
214 \&\fB\-fno\-threadsafe\-statics \-fuse\-cxa\-atexit \-fno\-weak \-nostdinc++
215 \&\-fno\-default\-inline \-fvisibility\-inlines\-hidden
216 \&\-Wabi \-Wctor\-dtor\-privacy
217 \&\-Wnon\-virtual\-dtor \-Wreorder
218 \&\-Weffc++ \-Wno\-deprecated \-Wstrict\-null\-sentinel
219 \&\-Wno\-non\-template\-friend \-Wold\-style\-cast
220 \&\-Woverloaded\-virtual \-Wno\-pmf\-conversions
222 .IP "\fIObjective-C and Objective\-\*(C+ Language Options\fR" 4
223 .IX Item "Objective-C and Objective- Language Options"
224 \&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR
225 \&\fB\-fgnu\-runtime \-fnext\-runtime
226 \&\-fno\-nil\-receivers
227 \&\-fobjc\-call\-cxx\-cdtors
228 \&\-fobjc\-direct\-dispatch
229 \&\-fobjc\-exceptions
231 \&\-freplace\-objc\-classes
234 \&\-Wassign\-intercept
235 \&\-Wno\-protocol \-Wselector
236 \&\-Wstrict\-selector\-match
237 \&\-Wundeclared\-selector\fR
238 .IP "\fILanguage Independent Options\fR" 4
239 .IX Item "Language Independent Options"
240 \&\fB\-fmessage\-length=\fR\fIn\fR
241 \&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]
242 \&\fB\-fdiagnostics\-show\-option\fR
243 .IP "\fIWarning Options\fR" 4
244 .IX Item "Warning Options"
245 \&\fB\-fsyntax\-only \-pedantic \-pedantic\-errors
246 \&\-w \-Wextra \-Wall \-Waddress \-Waggregate\-return \-Wno\-attributes
247 \&\-Wc++\-compat \-Wcast\-align \-Wcast\-qual \-Wchar\-subscripts \-Wcomment
248 \&\-Wconversion \-Wno\-deprecated\-declarations
249 \&\-Wdisabled\-optimization \-Wno\-div\-by\-zero \-Wno\-endif\-labels
250 \&\-Werror \-Werror\-maybe\-reset \-Werror=* \-Werror\-implicit\-function\-declaration
251 \&\-Wfatal\-errors \-Wfloat\-equal \-Wformat \-Wformat=2
252 \&\-Wno\-format\-extra\-args \-Wformat\-nonliteral
253 \&\-Wformat\-security \-Wformat\-y2k
254 \&\-Wimplicit \-Wimplicit\-function\-declaration \-Wimplicit\-int
255 \&\-Wimport \-Wno\-import \-Winit\-self \-Winline
256 \&\-Wno\-int\-to\-pointer\-cast
257 \&\-Wno\-invalid\-offsetof \-Winvalid\-pch
258 \&\-Wlarger\-than\-\fR\fIlen\fR \fB\-Wunsafe\-loop\-optimizations \-Wlong\-long
259 \&\-Wmain \-Wmissing\-braces \-Wmissing\-field\-initializers
260 \&\-Wmissing\-format\-attribute \-Wmissing\-include\-dirs
261 \&\-Wmissing\-noreturn
262 \&\-Wno\-multichar \-Wnonnull \-Wno\-overflow
263 \&\-Woverlength\-strings \-Wpacked \-Wpadded
264 \&\-Wparentheses \-Wpointer\-arith \-Wno\-pointer\-to\-int\-cast
265 \&\-Wredundant\-decls
266 \&\-Wreturn\-type \-Wsequence\-point \-Wshadow
267 \&\-Wsign\-compare \-Wstack\-protector
268 \&\-Wstrict\-aliasing \-Wstrict\-aliasing=2
269 \&\-Wstrict\-overflow \-Wstrict\-overflow=\fR\fIn\fR
270 \&\fB\-Wswitch \-Wswitch\-default \-Wswitch\-enum
271 \&\-Wsystem\-headers \-Wtrigraphs \-Wundef \-Wuninitialized
272 \&\-Wunknown\-pragmas \-Wno\-pragmas \-Wunreachable\-code
273 \&\-Wunused \-Wunused\-function \-Wunused\-label \-Wunused\-parameter
274 \&\-Wunused\-value \-Wunused\-variable \-Wvariadic\-macros
275 \&\-Wvolatile\-register\-var \-Wwrite\-strings\fR
276 .IP "\fIC\-only Warning Options\fR" 4
277 .IX Item "C-only Warning Options"
278 \&\fB\-Wbad\-function\-cast \-Wmissing\-declarations
279 \&\-Wmissing\-prototypes \-Wnested\-externs \-Wold\-style\-definition
280 \&\-Wstrict\-prototypes \-Wtraditional
281 \&\-Wdeclaration\-after\-statement \-Wpointer\-sign\fR
282 .IP "\fIDebugging Options\fR" 4
283 .IX Item "Debugging Options"
284 \&\fB\-d\fR\fIletters\fR \fB\-dumpspecs \-dumpmachine \-dumpversion
285 \&\-fdump\-noaddr \-fdump\-unnumbered \-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR]
286 \&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR]
287 \&\fB\-fdump\-ipa\-all \-fdump\-ipa\-cgraph \-fdump\-ipa\-inline
289 \&\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]
290 \&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR]
291 \&\fB\-fdump\-tree\-cfg \-fdump\-tree\-vcg \-fdump\-tree\-alias
293 \&\-fdump\-tree\-ssa\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-pre\fR[\fB\-\fR\fIn\fR]
294 \&\fB\-fdump\-tree\-ccp\fR[\fB\-\fR\fIn\fR] \fB\-fdump\-tree\-dce\fR[\fB\-\fR\fIn\fR]
295 \&\fB\-fdump\-tree\-gimple\fR[\fB\-raw\fR] \fB\-fdump\-tree\-mudflap\fR[\fB\-\fR\fIn\fR]
296 \&\fB\-fdump\-tree\-dom\fR[\fB\-\fR\fIn\fR]
297 \&\fB\-fdump\-tree\-dse\fR[\fB\-\fR\fIn\fR]
298 \&\fB\-fdump\-tree\-phiopt\fR[\fB\-\fR\fIn\fR]
299 \&\fB\-fdump\-tree\-forwprop\fR[\fB\-\fR\fIn\fR]
300 \&\fB\-fdump\-tree\-copyrename\fR[\fB\-\fR\fIn\fR]
301 \&\fB\-fdump\-tree\-nrv \-fdump\-tree\-vect
302 \&\-fdump\-tree\-sink
303 \&\-fdump\-tree\-sra\fR[\fB\-\fR\fIn\fR]
304 \&\fB\-fdump\-tree\-salias
305 \&\-fdump\-tree\-fre\fR[\fB\-\fR\fIn\fR]
306 \&\fB\-fdump\-tree\-vrp\fR[\fB\-\fR\fIn\fR]
307 \&\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR
308 \&\fB\-fdump\-tree\-storeccp\fR[\fB\-\fR\fIn\fR]
309 \&\fB\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types
310 \&\-feliminate\-unused\-debug\-symbols \-femit\-class\-debug\-always
311 \&\-fmem\-report \-fprofile\-arcs
312 \&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR
313 \&\fB\-ftest\-coverage \-ftime\-report \-fvar\-tracking
314 \&\-g \-g\fR\fIlevel\fR \fB\-gcoff \-gdwarf\-2
315 \&\-ggdb \-gstabs \-gstabs+ \-gvms \-gxcoff \-gxcoff+
316 \&\-p \-pg \-print\-file\-name=\fR\fIlibrary\fR \fB\-print\-libgcc\-file\-name
317 \&\-print\-multi\-directory \-print\-multi\-lib
318 \&\-print\-prog\-name=\fR\fIprogram\fR \fB\-print\-search\-dirs \-Q
319 \&\-save\-temps \-time\fR
320 .IP "\fIOptimization Options\fR" 4
321 .IX Item "Optimization Options"
322 \&\fB\-falign\-functions[=\fR\fIn\fR\fB] \-falign\-jumps[=\fR\fIn\fR\fB]
323 \&\-falign\-labels[=\fR\fIn\fR\fB] \-falign\-loops[=\fR\fIn\fR\fB]
324 \&\-fmudflap \-fmudflapth \-fmudflapir
325 \&\-fbranch\-probabilities \-fprofile\-values \-fvpt
326 \&\-fbranch\-target\-load\-optimize
327 \&\-fbranch\-target\-load\-optimize2 \-fbtr\-bb\-exclusive
328 \&\-fcaller\-saves \-fcprop\-registers \-fcse\-follow\-jumps
329 \&\-fcse\-skip\-blocks \-fcx\-limited\-range \-fdata\-sections
330 \&\-fdelayed\-branch \-fdelete\-null\-pointer\-checks \-fearly\-inlining
331 \&\-fexpensive\-optimizations \-ffast\-math \-ffloat\-store
332 \&\-fforce\-addr \-ffunction\-sections
333 \&\-fgcse \-fgcse\-lm \-fgcse\-sm \-fgcse\-las \-fgcse\-after\-reload
334 \&\-fcrossjumping \-fif\-conversion \-fif\-conversion2
335 \&\-finline\-functions \-finline\-functions\-called\-once
336 \&\-finline\-limit=\fR\fIn\fR \fB\-fkeep\-inline\-functions
337 \&\-fkeep\-static\-consts \-fmerge\-constants \-fmerge\-all\-constants
338 \&\-fmodulo\-sched \-fno\-branch\-count\-reg
339 \&\-fno\-default\-inline \-fno\-defer\-pop \-fmove\-loop\-invariants
340 \&\-fno\-function\-cse \-fno\-guess\-branch\-probability
341 \&\-fno\-inline \-fno\-math\-errno \-fno\-peephole \-fno\-peephole2
342 \&\-funsafe\-math\-optimizations \-funsafe\-loop\-optimizations \-ffinite\-math\-only
343 \&\-fno\-toplevel\-reorder \-fno\-trapping\-math \-fno\-zero\-initialized\-in\-bss
344 \&\-fomit\-frame\-pointer \-foptimize\-register\-move
345 \&\-foptimize\-sibling\-calls \-fprefetch\-loop\-arrays
346 \&\-fprofile\-generate \-fprofile\-use
347 \&\-fregmove \-frename\-registers
348 \&\-freorder\-blocks \-freorder\-blocks\-and\-partition \-freorder\-functions
349 \&\-frerun\-cse\-after\-loop
350 \&\-frounding\-math \-frtl\-abstract\-sequences
351 \&\-fschedule\-insns \-fschedule\-insns2
352 \&\-fno\-sched\-interblock \-fno\-sched\-spec \-fsched\-spec\-load
353 \&\-fsched\-spec\-load\-dangerous
354 \&\-fsched\-stalled\-insns[=\fR\fIn\fR\fB] \-fsched\-stalled\-insns\-dep[=\fR\fIn\fR\fB]
355 \&\-fsched2\-use\-superblocks
356 \&\-fsched2\-use\-traces \-fsee \-freschedule\-modulo\-scheduled\-loops
357 \&\-fsection\-anchors \-fsignaling\-nans \-fsingle\-precision\-constant
358 \&\-fstack\-protector \-fstack\-protector\-all
359 \&\-fstrict\-aliasing \-fstrict\-overflow \-ftracer \-fthread\-jumps
360 \&\-funroll\-all\-loops \-funroll\-loops \-fpeel\-loops
361 \&\-fsplit\-ivs\-in\-unroller \-funswitch\-loops
362 \&\-fvariable\-expansion\-in\-unroller
363 \&\-ftree\-pre \-ftree\-ccp \-ftree\-dce \-ftree\-loop\-optimize
364 \&\-ftree\-loop\-linear \-ftree\-loop\-im \-ftree\-loop\-ivcanon \-fivopts
365 \&\-ftree\-dominator\-opts \-ftree\-dse \-ftree\-copyrename \-ftree\-sink
366 \&\-ftree\-ch \-ftree\-sra \-ftree\-ter \-ftree\-lrs \-ftree\-fre \-ftree\-vectorize
367 \&\-ftree\-vect\-loop\-version \-ftree\-salias \-fipa\-pta \-fweb
368 \&\-ftree\-copy\-prop \-ftree\-store\-ccp \-ftree\-store\-copy\-prop \-ftree\-vrp
369 \&\-funit\-at\-a\-time \-fwhole\-program
370 \&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
371 \&\fB\-O \-O0 \-O1 \-O2 \-O3 \-Os\fR
372 .IP "\fIPreprocessor Options\fR" 4
373 .IX Item "Preprocessor Options"
374 \&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR
375 \&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR]
376 \&\fB\-C \-dD \-dI \-dM \-dN
377 \&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR] \fB\-E \-H
378 \&\-idirafter\fR \fIdir\fR
379 \&\fB\-include\fR \fIfile\fR \fB\-imacros\fR \fIfile\fR
380 \&\fB\-iprefix\fR \fIfile\fR \fB\-iwithprefix\fR \fIdir\fR
381 \&\fB\-iwithprefixbefore\fR \fIdir\fR \fB\-isystem\fR \fIdir\fR
382 \&\fB\-imultilib\fR \fIdir\fR \fB\-isysroot\fR \fIdir\fR
383 \&\fB\-M \-MM \-MF \-MG \-MP \-MQ \-MT \-nostdinc
384 \&\-P \-fworking\-directory \-remap
385 \&\-trigraphs \-undef \-U\fR\fImacro\fR \fB\-Wp,\fR\fIoption\fR
386 \&\fB\-Xpreprocessor\fR \fIoption\fR
387 .IP "\fIAssembler Option\fR" 4
388 .IX Item "Assembler Option"
389 \&\fB\-Wa,\fR\fIoption\fR \fB\-Xassembler\fR \fIoption\fR
390 .IP "\fILinker Options\fR" 4
391 .IX Item "Linker Options"
392 \&\fIobject-file-name\fR \fB\-l\fR\fIlibrary\fR
393 \&\fB\-nostartfiles \-nodefaultlibs \-nostdlib \-pie \-rdynamic
394 \&\-s \-static \-static\-libgcc \-shared \-shared\-libgcc \-symbolic
395 \&\-Wl,\fR\fIoption\fR \fB\-Xlinker\fR \fIoption\fR
396 \&\fB\-u\fR \fIsymbol\fR
397 .IP "\fIDirectory Options\fR" 4
398 .IX Item "Directory Options"
399 \&\fB\-B\fR\fIprefix\fR \fB\-I\fR\fIdir\fR \fB\-iquote\fR\fIdir\fR \fB\-L\fR\fIdir\fR
400 \&\fB\-specs=\fR\fIfile\fR \fB\-I\- \-\-sysroot=\fR\fIdir\fR
401 .IP "\fITarget Options\fR" 4
402 .IX Item "Target Options"
403 \&\fB\-V\fR \fIversion\fR \fB\-b\fR \fImachine\fR
404 .IP "\fIMachine Dependent Options\fR" 4
405 .IX Item "Machine Dependent Options"
406 \&\fI\s-1ARC\s0 Options\fR
408 \&\-mmangle\-cpu \-mcpu=\fR\fIcpu\fR \fB\-mtext=\fR\fItext-section\fR
409 \&\fB\-mdata=\fR\fIdata-section\fR \fB\-mrodata=\fR\fIreadonly-data-section\fR
411 \&\fI\s-1ARM\s0 Options\fR
412 \&\fB\-mapcs\-frame \-mno\-apcs\-frame
413 \&\-mabi=\fR\fIname\fR
414 \&\fB\-mapcs\-stack\-check \-mno\-apcs\-stack\-check
415 \&\-mapcs\-float \-mno\-apcs\-float
416 \&\-mapcs\-reentrant \-mno\-apcs\-reentrant
417 \&\-msched\-prolog \-mno\-sched\-prolog
418 \&\-mlittle\-endian \-mbig\-endian \-mwords\-little\-endian
419 \&\-mfloat\-abi=\fR\fIname\fR \fB\-msoft\-float \-mhard\-float \-mfpe
420 \&\-mthumb\-interwork \-mno\-thumb\-interwork
421 \&\-mcpu=\fR\fIname\fR \fB\-march=\fR\fIname\fR \fB\-mfpu=\fR\fIname\fR
422 \&\fB\-mstructure\-size\-boundary=\fR\fIn\fR
423 \&\fB\-mabort\-on\-noreturn
424 \&\-mlong\-calls \-mno\-long\-calls
425 \&\-msingle\-pic\-base \-mno\-single\-pic\-base
426 \&\-mpic\-register=\fR\fIreg\fR
427 \&\fB\-mnop\-fun\-dllimport
428 \&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns
429 \&\-mpoke\-function\-name
431 \&\-mtpcs\-frame \-mtpcs\-leaf\-frame
432 \&\-mcaller\-super\-interworking \-mcallee\-super\-interworking
433 \&\-mtp=\fR\fIname\fR
435 \&\fI\s-1AVR\s0 Options\fR
436 \&\fB\-mmcu=\fR\fImcu\fR \fB\-msize \-minit\-stack=\fR\fIn\fR \fB\-mno\-interrupts
437 \&\-mcall\-prologues \-mno\-tablejump \-mtiny\-stack \-mint8\fR
439 \&\fIBlackfin Options\fR
440 \&\fB\-momit\-leaf\-frame\-pointer \-mno\-omit\-leaf\-frame\-pointer
441 \&\-mspecld\-anomaly \-mno\-specld\-anomaly \-mcsync\-anomaly \-mno\-csync\-anomaly
442 \&\-mlow\-64k \-mno\-low64k \-mid\-shared\-library
443 \&\-mno\-id\-shared\-library \-mshared\-library\-id=\fR\fIn\fR
444 \&\fB\-mlong\-calls \-mno\-long\-calls\fR
446 \&\fI\s-1CRIS\s0 Options\fR
447 \&\fB\-mcpu=\fR\fIcpu\fR \fB\-march=\fR\fIcpu\fR \fB\-mtune=\fR\fIcpu\fR
448 \&\fB\-mmax\-stack\-frame=\fR\fIn\fR \fB\-melinux\-stacksize=\fR\fIn\fR
449 \&\fB\-metrax4 \-metrax100 \-mpdebug \-mcc\-init \-mno\-side\-effects
450 \&\-mstack\-align \-mdata\-align \-mconst\-align
451 \&\-m32\-bit \-m16\-bit \-m8\-bit \-mno\-prologue\-epilogue \-mno\-gotplt
452 \&\-melf \-maout \-melinux \-mlinux \-sim \-sim2
453 \&\-mmul\-bug\-workaround \-mno\-mul\-bug\-workaround\fR
455 \&\fI\s-1CRX\s0 Options\fR
456 \&\fB\-mmac \-mpush\-args\fR
458 \&\fIDarwin Options\fR
459 \&\fB\-all_load \-allowable_client \-arch \-arch_errors_fatal
460 \&\-arch_only \-bind_at_load \-bundle \-bundle_loader
461 \&\-client_name \-compatibility_version \-current_version
463 \&\-dependency\-file \-dylib_file \-dylinker_install_name
464 \&\-dynamic \-dynamiclib \-exported_symbols_list
465 \&\-filelist \-flat_namespace \-force_cpusubtype_ALL
466 \&\-force_flat_namespace \-headerpad_max_install_names
467 \&\-image_base \-init \-install_name \-keep_private_externs
468 \&\-multi_module \-multiply_defined \-multiply_defined_unused
469 \&\-noall_load \-no_dead_strip_inits_and_terms
470 \&\-nofixprebinding \-nomultidefs \-noprebind \-noseglinkedit
471 \&\-pagezero_size \-prebind \-prebind_all_twolevel_modules
472 \&\-private_bundle \-read_only_relocs \-sectalign
473 \&\-sectobjectsymbols \-whyload \-seg1addr
474 \&\-sectcreate \-sectobjectsymbols \-sectorder
475 \&\-segaddr \-segs_read_only_addr \-segs_read_write_addr
476 \&\-seg_addr_table \-seg_addr_table_filename \-seglinkedit
477 \&\-segprot \-segs_read_only_addr \-segs_read_write_addr
478 \&\-single_module \-static \-sub_library \-sub_umbrella
479 \&\-twolevel_namespace \-umbrella \-undefined
480 \&\-unexported_symbols_list \-weak_reference_mismatches
481 \&\-whatsloaded \-F \-gused \-gfull \-mmacosx\-version\-min=\fR\fIversion\fR
482 \&\fB\-mkernel \-mone\-byte\-bool\fR
484 \&\fI\s-1DEC\s0 Alpha Options\fR
485 \&\fB\-mno\-fp\-regs \-msoft\-float \-malpha\-as \-mgas
486 \&\-mieee \-mieee\-with\-inexact \-mieee\-conformant
487 \&\-mfp\-trap\-mode=\fR\fImode\fR \fB\-mfp\-rounding\-mode=\fR\fImode\fR
488 \&\fB\-mtrap\-precision=\fR\fImode\fR \fB\-mbuild\-constants
489 \&\-mcpu=\fR\fIcpu-type\fR \fB\-mtune=\fR\fIcpu-type\fR
490 \&\fB\-mbwx \-mmax \-mfix \-mcix
491 \&\-mfloat\-vax \-mfloat\-ieee
492 \&\-mexplicit\-relocs \-msmall\-data \-mlarge\-data
493 \&\-msmall\-text \-mlarge\-text
494 \&\-mmemory\-latency=\fR\fItime\fR
496 \&\fI\s-1DEC\s0 Alpha/VMS Options\fR
497 \&\fB\-mvms\-return\-codes\fR
499 \&\fI\s-1FRV\s0 Options\fR
500 \&\fB\-mgpr\-32 \-mgpr\-64 \-mfpr\-32 \-mfpr\-64
501 \&\-mhard\-float \-msoft\-float
502 \&\-malloc\-cc \-mfixed\-cc \-mdword \-mno\-dword
503 \&\-mdouble \-mno\-double
504 \&\-mmedia \-mno\-media \-mmuladd \-mno\-muladd
505 \&\-mfdpic \-minline\-plt \-mgprel\-ro \-multilib\-library\-pic
506 \&\-mlinked\-fp \-mlong\-calls \-malign\-labels
507 \&\-mlibrary\-pic \-macc\-4 \-macc\-8
508 \&\-mpack \-mno\-pack \-mno\-eflags \-mcond\-move \-mno\-cond\-move
509 \&\-moptimize\-membar \-mno\-optimize\-membar
510 \&\-mscc \-mno\-scc \-mcond\-exec \-mno\-cond\-exec
511 \&\-mvliw\-branch \-mno\-vliw\-branch
512 \&\-mmulti\-cond\-exec \-mno\-multi\-cond\-exec \-mnested\-cond\-exec
513 \&\-mno\-nested\-cond\-exec \-mtomcat\-stats
515 \&\-mcpu=\fR\fIcpu\fR
517 \&\fIGNU/Linux Options\fR
520 \&\fIH8/300 Options\fR
521 \&\fB\-mrelax \-mh \-ms \-mn \-mint32 \-malign\-300\fR
523 \&\fI\s-1HPPA\s0 Options\fR
524 \&\fB\-march=\fR\fIarchitecture-type\fR
525 \&\fB\-mbig\-switch \-mdisable\-fpregs \-mdisable\-indexing
526 \&\-mfast\-indirect\-calls \-mgas \-mgnu\-ld \-mhp\-ld
527 \&\-mfixed\-range=\fR\fIregister-range\fR
528 \&\fB\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls
529 \&\-mlong\-load\-store \-mno\-big\-switch \-mno\-disable\-fpregs
530 \&\-mno\-disable\-indexing \-mno\-fast\-indirect\-calls \-mno\-gas
531 \&\-mno\-jump\-in\-delay \-mno\-long\-load\-store
532 \&\-mno\-portable\-runtime \-mno\-soft\-float
533 \&\-mno\-space\-regs \-msoft\-float \-mpa\-risc\-1\-0
534 \&\-mpa\-risc\-1\-1 \-mpa\-risc\-2\-0 \-mportable\-runtime
535 \&\-mschedule=\fR\fIcpu-type\fR \fB\-mspace\-regs \-msio \-mwsio
536 \&\-munix=\fR\fIunix-std\fR \fB\-nolibdld \-static \-threads\fR
538 \&\fIi386 and x86\-64 Options\fR
539 \&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
540 \&\fB\-mfpmath=\fR\fIunit\fR
541 \&\fB\-masm=\fR\fIdialect\fR \fB\-mno\-fancy\-math\-387
542 \&\-mno\-fp\-ret\-in\-387 \-msoft\-float \-msvr3\-shlib
543 \&\-mno\-wide\-multiply \-mrtd \-malign\-double
544 \&\-mpreferred\-stack\-boundary=\fR\fInum\fR
545 \&\fB\-mmmx \-msse \-msse2 \-msse3 \-m3dnow
546 \&\-mthreads \-mno\-align\-stringops \-minline\-all\-stringops
547 \&\-mpush\-args \-maccumulate\-outgoing\-args \-m128bit\-long\-double
548 \&\-m96bit\-long\-double \-mregparm=\fR\fInum\fR \fB\-msseregparm
550 \&\-momit\-leaf\-frame\-pointer \-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs
551 \&\-mcmodel=\fR\fIcode-model\fR
552 \&\fB\-m32 \-m64 \-mlarge\-data\-threshold=\fR\fInum\fR
554 \&\fI\s-1IA\-64\s0 Options\fR
555 \&\fB\-mbig\-endian \-mlittle\-endian \-mgnu\-as \-mgnu\-ld \-mno\-pic
556 \&\-mvolatile\-asm\-stop \-mregister\-names \-mno\-sdata
557 \&\-mconstant\-gp \-mauto\-pic \-minline\-float\-divide\-min\-latency
558 \&\-minline\-float\-divide\-max\-throughput
559 \&\-minline\-int\-divide\-min\-latency
560 \&\-minline\-int\-divide\-max\-throughput
561 \&\-minline\-sqrt\-min\-latency \-minline\-sqrt\-max\-throughput
562 \&\-mno\-dwarf2\-asm \-mearly\-stop\-bits
563 \&\-mfixed\-range=\fR\fIregister-range\fR \fB\-mtls\-size=\fR\fItls-size\fR
564 \&\fB\-mtune=\fR\fIcpu-type\fR \fB\-mt \-pthread \-milp32 \-mlp64
565 \&\-mno\-sched\-br\-data\-spec \-msched\-ar\-data\-spec \-mno\-sched\-control\-spec
566 \&\-msched\-br\-in\-data\-spec \-msched\-ar\-in\-data\-spec \-msched\-in\-control\-spec
567 \&\-msched\-ldc \-mno\-sched\-control\-ldc \-mno\-sched\-spec\-verbose
568 \&\-mno\-sched\-prefer\-non\-data\-spec\-insns
569 \&\-mno\-sched\-prefer\-non\-control\-spec\-insns
570 \&\-mno\-sched\-count\-spec\-in\-critical\-path\fR
572 \&\fIM32R/D Options\fR
573 \&\fB\-m32r2 \-m32rx \-m32r
575 \&\-malign\-loops \-mno\-align\-loops
576 \&\-missue\-rate=\fR\fInumber\fR
577 \&\fB\-mbranch\-cost=\fR\fInumber\fR
578 \&\fB\-mmodel=\fR\fIcode-size-model-type\fR
579 \&\fB\-msdata=\fR\fIsdata-type\fR
580 \&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR
581 \&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR
582 \&\fB\-G\fR \fInum\fR
585 \&\fB\-mcpu=\fR\fIcpu\fR \fB\-msim \-memregs=\fR\fInumber\fR
587 \&\fIM680x0 Options\fR
588 \&\fB\-m68000 \-m68020 \-m68020\-40 \-m68020\-60 \-m68030 \-m68040
589 \&\-m68060 \-mcpu32 \-m5200 \-mcfv4e \-m68881 \-mbitfield
590 \&\-mc68000 \-mc68020
591 \&\-mnobitfield \-mrtd \-mshort \-msoft\-float \-mpcrel
592 \&\-malign\-int \-mstrict\-align \-msep\-data \-mno\-sep\-data
593 \&\-mshared\-library\-id=n \-mid\-shared\-library \-mno\-id\-shared\-library\fR
595 \&\fIM68hc1x Options\fR
596 \&\fB\-m6811 \-m6812 \-m68hc11 \-m68hc12 \-m68hcs12
597 \&\-mauto\-incdec \-minmax \-mlong\-calls \-mshort
598 \&\-msoft\-reg\-count=\fR\fIcount\fR
600 \&\fIMCore Options\fR
601 \&\fB\-mhardlit \-mno\-hardlit \-mdiv \-mno\-div \-mrelax\-immediates
602 \&\-mno\-relax\-immediates \-mwide\-bitfields \-mno\-wide\-bitfields
603 \&\-m4byte\-functions \-mno\-4byte\-functions \-mcallgraph\-data
604 \&\-mno\-callgraph\-data \-mslow\-bytes \-mno\-slow\-bytes \-mno\-lsim
605 \&\-mlittle\-endian \-mbig\-endian \-m210 \-m340 \-mstack\-increment\fR
607 \&\fI\s-1MIPS\s0 Options\fR
608 \&\fB\-EL \-EB \-march=\fR\fIarch\fR \fB\-mtune=\fR\fIarch\fR
609 \&\fB\-mips1 \-mips2 \-mips3 \-mips4 \-mips32 \-mips32r2 \-mips64
610 \&\-mips16 \-mno\-mips16 \-mabi=\fR\fIabi\fR \fB\-mabicalls \-mno\-abicalls
611 \&\-mshared \-mno\-shared \-mxgot \-mno\-xgot \-mgp32 \-mgp64
612 \&\-mfp32 \-mfp64 \-mhard\-float \-msoft\-float
613 \&\-msingle\-float \-mdouble\-float \-mdsp \-mpaired\-single \-mips3d
614 \&\-mlong64 \-mlong32 \-msym32 \-mno\-sym32
615 \&\-G\fR\fInum\fR \fB\-membedded\-data \-mno\-embedded\-data
616 \&\-muninit\-const\-in\-rodata \-mno\-uninit\-const\-in\-rodata
617 \&\-msplit\-addresses \-mno\-split\-addresses
618 \&\-mexplicit\-relocs \-mno\-explicit\-relocs
619 \&\-mcheck\-zero\-division \-mno\-check\-zero\-division
620 \&\-mdivide\-traps \-mdivide\-breaks
621 \&\-mmemcpy \-mno\-memcpy \-mlong\-calls \-mno\-long\-calls
622 \&\-mmad \-mno\-mad \-mfused\-madd \-mno\-fused\-madd \-nocpp
623 \&\-mfix\-r4000 \-mno\-fix\-r4000 \-mfix\-r4400 \-mno\-fix\-r4400
624 \&\-mfix\-vr4120 \-mno\-fix\-vr4120 \-mfix\-vr4130
625 \&\-mfix\-sb1 \-mno\-fix\-sb1
626 \&\-mflush\-func=\fR\fIfunc\fR \fB\-mno\-flush\-func
627 \&\-mbranch\-likely \-mno\-branch\-likely
628 \&\-mfp\-exceptions \-mno\-fp\-exceptions
629 \&\-mvr4130\-align \-mno\-vr4130\-align\fR
631 \&\fI\s-1MMIX\s0 Options\fR
632 \&\fB\-mlibfuncs \-mno\-libfuncs \-mepsilon \-mno\-epsilon \-mabi=gnu
633 \&\-mabi=mmixware \-mzero\-extend \-mknuthdiv \-mtoplevel\-symbols
634 \&\-melf \-mbranch\-predict \-mno\-branch\-predict \-mbase\-addresses
635 \&\-mno\-base\-addresses \-msingle\-exit \-mno\-single\-exit\fR
637 \&\fI\s-1MN10300\s0 Options\fR
638 \&\fB\-mmult\-bug \-mno\-mult\-bug
639 \&\-mam33 \-mno\-am33
640 \&\-mam33\-2 \-mno\-am33\-2
641 \&\-mreturn\-pointer\-on\-d0
642 \&\-mno\-crt0 \-mrelax\fR
644 \&\fI\s-1MT\s0 Options\fR
645 \&\fB\-mno\-crt0 \-mbacc \-msim
646 \&\-march=\fR\fIcpu-type\fR\fB \fR
648 \&\fI\s-1PDP\-11\s0 Options\fR
649 \&\fB\-mfpu \-msoft\-float \-mac0 \-mno\-ac0 \-m40 \-m45 \-m10
650 \&\-mbcopy \-mbcopy\-builtin \-mint32 \-mno\-int16
651 \&\-mint16 \-mno\-int32 \-mfloat32 \-mno\-float64
652 \&\-mfloat64 \-mno\-float32 \-mabshi \-mno\-abshi
653 \&\-mbranch\-expensive \-mbranch\-cheap
654 \&\-msplit \-mno\-split \-munix\-asm \-mdec\-asm\fR
656 \&\fIPowerPC Options\fR
657 See \s-1RS/6000\s0 and PowerPC Options.
659 \&\fI\s-1RS/6000\s0 and PowerPC Options\fR
660 \&\fB\-mcpu=\fR\fIcpu-type\fR
661 \&\fB\-mtune=\fR\fIcpu-type\fR
662 \&\fB\-mpower \-mno\-power \-mpower2 \-mno\-power2
663 \&\-mpowerpc \-mpowerpc64 \-mno\-powerpc
664 \&\-maltivec \-mno\-altivec
665 \&\-mpowerpc\-gpopt \-mno\-powerpc\-gpopt
666 \&\-mpowerpc\-gfxopt \-mno\-powerpc\-gfxopt
667 \&\-mmfcrf \-mno\-mfcrf \-mpopcntb \-mno\-popcntb \-mfprnd \-mno\-fprnd
668 \&\-mnew\-mnemonics \-mold\-mnemonics
669 \&\-mfull\-toc \-mminimal\-toc \-mno\-fp\-in\-toc \-mno\-sum\-in\-toc
670 \&\-m64 \-m32 \-mxl\-compat \-mno\-xl\-compat \-mpe
671 \&\-malign\-power \-malign\-natural
672 \&\-msoft\-float \-mhard\-float \-mmultiple \-mno\-multiple
673 \&\-mstring \-mno\-string \-mupdate \-mno\-update
674 \&\-mfused\-madd \-mno\-fused\-madd \-mbit\-align \-mno\-bit\-align
675 \&\-mstrict\-align \-mno\-strict\-align \-mrelocatable
676 \&\-mno\-relocatable \-mrelocatable\-lib \-mno\-relocatable\-lib
677 \&\-mtoc \-mno\-toc \-mlittle \-mlittle\-endian \-mbig \-mbig\-endian
678 \&\-mdynamic\-no\-pic \-maltivec \-mswdiv
679 \&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR
680 \&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR
681 \&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR
682 \&\fB\-mcall\-sysv \-mcall\-netbsd
683 \&\-maix\-struct\-return \-msvr4\-struct\-return
684 \&\-mabi=\fR\fIabi-type\fR \fB\-msecure\-plt \-mbss\-plt
685 \&\-misel \-mno\-isel
686 \&\-misel=yes \-misel=no
688 \&\-mspe=yes \-mspe=no
689 \&\-mvrsave \-mno\-vrsave
690 \&\-mmulhw \-mno\-mulhw
691 \&\-mdlmzb \-mno\-dlmzb
692 \&\-mfloat\-gprs=yes \-mfloat\-gprs=no \-mfloat\-gprs=single \-mfloat\-gprs=double
693 \&\-mprototype \-mno\-prototype
694 \&\-msim \-mmvme \-mads \-myellowknife \-memb \-msdata
695 \&\-msdata=\fR\fIopt\fR \fB\-mvxworks \-mwindiss \-G\fR \fInum\fR \fB\-pthread\fR
697 \&\fIS/390 and zSeries Options\fR
698 \&\fB\-mtune=\fR\fIcpu-type\fR \fB\-march=\fR\fIcpu-type\fR
699 \&\fB\-mhard\-float \-msoft\-float \-mlong\-double\-64 \-mlong\-double\-128
700 \&\-mbackchain \-mno\-backchain \-mpacked\-stack \-mno\-packed\-stack
701 \&\-msmall\-exec \-mno\-small\-exec \-mmvcle \-mno\-mvcle
702 \&\-m64 \-m31 \-mdebug \-mno\-debug \-mesa \-mzarch
703 \&\-mtpf\-trace \-mno\-tpf\-trace \-mfused\-madd \-mno\-fused\-madd
704 \&\-mwarn\-framesize \-mwarn\-dynamicstack \-mstack\-size \-mstack\-guard\fR
706 \&\fIScore Options\fR
711 \&\-mscore5 \-mscore5u \-mscore7 \-mscore7d\fR
713 \&\fI\s-1SH\s0 Options\fR
714 \&\fB\-m1 \-m2 \-m2e \-m3 \-m3e
715 \&\-m4\-nofpu \-m4\-single\-only \-m4\-single \-m4
716 \&\-m4a\-nofpu \-m4a\-single\-only \-m4a\-single \-m4a \-m4al
717 \&\-m5\-64media \-m5\-64media\-nofpu
718 \&\-m5\-32media \-m5\-32media\-nofpu
719 \&\-m5\-compact \-m5\-compact\-nofpu
720 \&\-mb \-ml \-mdalign \-mrelax
721 \&\-mbigtable \-mfmovd \-mhitachi \-mrenesas \-mno\-renesas \-mnomacsave
722 \&\-mieee \-misize \-mpadstruct \-mspace
723 \&\-mprefergot \-musermode \-multcost=\fR\fInumber\fR \fB\-mdiv=\fR\fIstrategy\fR
724 \&\fB\-mdivsi3_libfunc=\fR\fIname\fR
725 \&\fB\-madjust\-unroll \-mindexed\-addressing \-mgettrcost=\fR\fInumber\fR \fB\-mpt\-fixed
726 \-minvalid\-symbols\fR
728 \&\fI\s-1SPARC\s0 Options\fR
729 \&\fB\-mcpu=\fR\fIcpu-type\fR
730 \&\fB\-mtune=\fR\fIcpu-type\fR
731 \&\fB\-mcmodel=\fR\fIcode-model\fR
732 \&\fB\-m32 \-m64 \-mapp\-regs \-mno\-app\-regs
733 \&\-mfaster\-structs \-mno\-faster\-structs
734 \&\-mfpu \-mno\-fpu \-mhard\-float \-msoft\-float
735 \&\-mhard\-quad\-float \-msoft\-quad\-float
736 \&\-mimpure\-text \-mno\-impure\-text \-mlittle\-endian
737 \&\-mstack\-bias \-mno\-stack\-bias
738 \&\-munaligned\-doubles \-mno\-unaligned\-doubles
739 \&\-mv8plus \-mno\-v8plus \-mvis \-mno\-vis
740 \&\-threads \-pthreads \-pthread\fR
742 \&\fISystem V Options\fR
743 \&\fB\-Qy \-Qn \-YP,\fR\fIpaths\fR \fB\-Ym,\fR\fIdir\fR
745 \&\fITMS320C3x/C4x Options\fR
746 \&\fB\-mcpu=\fR\fIcpu\fR \fB\-mbig \-msmall \-mregparm \-mmemparm
747 \&\-mfast\-fix \-mmpyi \-mbk \-mti \-mdp\-isr\-reload
748 \&\-mrpts=\fR\fIcount\fR \fB\-mrptb \-mdb \-mloop\-unsigned
749 \&\-mparallel\-insns \-mparallel\-mpy \-mpreserve\-float\fR
752 \&\fB\-mlong\-calls \-mno\-long\-calls \-mep \-mno\-ep
753 \&\-mprolog\-function \-mno\-prolog\-function \-mspace
754 \&\-mtda=\fR\fIn\fR \fB\-msda=\fR\fIn\fR \fB\-mzda=\fR\fIn\fR
755 \&\fB\-mapp\-regs \-mno\-app\-regs
756 \&\-mdisable\-callt \-mno\-disable\-callt
759 \&\-mv850 \-mbig\-switch\fR
761 \&\fI\s-1VAX\s0 Options\fR
762 \&\fB\-mg \-mgnu \-munix\fR
764 \&\fIx86\-64 Options\fR
765 See i386 and x86\-64 Options.
767 \&\fIXstormy16 Options\fR
770 \&\fIXtensa Options\fR
771 \&\fB\-mconst16 \-mno\-const16
772 \&\-mfused\-madd \-mno\-fused\-madd
773 \&\-mtext\-section\-literals \-mno\-text\-section\-literals
774 \&\-mtarget\-align \-mno\-target\-align
775 \&\-mlongcalls \-mno\-longcalls\fR
777 \&\fIzSeries Options\fR
778 See S/390 and zSeries Options.
779 .IP "\fICode Generation Options\fR" 4
780 .IX Item "Code Generation Options"
781 \&\fB\-fcall\-saved\-\fR\fIreg\fR \fB\-fcall\-used\-\fR\fIreg\fR
782 \&\fB\-ffixed\-\fR\fIreg\fR \fB\-fexceptions
783 \&\-fnon\-call\-exceptions \-funwind\-tables
784 \&\-fasynchronous\-unwind\-tables
785 \&\-finhibit\-size\-directive \-finstrument\-functions
786 \&\-fno\-common \-fno\-ident
787 \&\-fpcc\-struct\-return \-fpic \-fPIC \-fpie \-fPIE
788 \&\-fno\-jump\-tables
789 \&\-freg\-struct\-return \-fshort\-enums
790 \&\-fshort\-double \-fshort\-wchar
791 \&\-fverbose\-asm \-fpack\-struct[=\fR\fIn\fR\fB] \-fstack\-check
792 \&\-fstack\-limit\-register=\fR\fIreg\fR \fB\-fstack\-limit\-symbol=\fR\fIsym\fR
793 \&\fB\-fno\-stack\-limit \-fargument\-alias \-fargument\-noalias
794 \&\-fargument\-noalias\-global \-fargument\-noalias\-anything
795 \&\-fleading\-underscore \-ftls\-model=\fR\fImodel\fR
796 \&\fB\-ftrapv \-fwrapv \-fbounds\-check
798 .Sh "Options Controlling the Kind of Output"
799 .IX Subsection "Options Controlling the Kind of Output"
800 Compilation can involve up to four stages: preprocessing, compilation
801 proper, assembly and linking, always in that order. \s-1GCC\s0 is capable of
802 preprocessing and compiling several files either into several
803 assembler input files, or into one assembler input file; then each
804 assembler input file produces an object file, and linking combines all
805 the object files (those newly compiled, and those specified as input)
806 into an executable file.
808 For any given input file, the file name suffix determines what kind of
810 .IP "\fIfile\fR\fB.c\fR" 4
812 C source code which must be preprocessed.
813 .IP "\fIfile\fR\fB.i\fR" 4
815 C source code which should not be preprocessed.
816 .IP "\fIfile\fR\fB.ii\fR" 4
818 \&\*(C+ source code which should not be preprocessed.
819 .IP "\fIfile\fR\fB.m\fR" 4
821 Objective-C source code. Note that you must link with the \fIlibobjc\fR
822 library to make an Objective-C program work.
823 .IP "\fIfile\fR\fB.mi\fR" 4
825 Objective-C source code which should not be preprocessed.
826 .IP "\fIfile\fR\fB.mm\fR" 4
829 .IP "\fIfile\fR\fB.M\fR" 4
832 Objective\-\*(C+ source code. Note that you must link with the \fIlibobjc\fR
833 library to make an Objective\-\*(C+ program work. Note that \fB.M\fR refers
834 to a literal capital M.
835 .IP "\fIfile\fR\fB.mii\fR" 4
837 Objective\-\*(C+ source code which should not be preprocessed.
838 .IP "\fIfile\fR\fB.h\fR" 4
840 C, \*(C+, Objective-C or Objective\-\*(C+ header file to be turned into a
842 .IP "\fIfile\fR\fB.cc\fR" 4
845 .IP "\fIfile\fR\fB.cp\fR" 4
847 .IP "\fIfile\fR\fB.cxx\fR" 4
849 .IP "\fIfile\fR\fB.cpp\fR" 4
851 .IP "\fIfile\fR\fB.CPP\fR" 4
853 .IP "\fIfile\fR\fB.c++\fR" 4
855 .IP "\fIfile\fR\fB.C\fR" 4
858 \&\*(C+ source code which must be preprocessed. Note that in \fB.cxx\fR,
859 the last two letters must both be literally \fBx\fR. Likewise,
860 \&\fB.C\fR refers to a literal capital C.
861 .IP "\fIfile\fR\fB.mm\fR" 4
864 .IP "\fIfile\fR\fB.M\fR" 4
867 Objective\-\*(C+ source code which must be preprocessed.
868 .IP "\fIfile\fR\fB.mii\fR" 4
870 Objective\-\*(C+ source code which should not be preprocessed.
871 .IP "\fIfile\fR\fB.hh\fR" 4
874 .IP "\fIfile\fR\fB.H\fR" 4
877 \&\*(C+ header file to be turned into a precompiled header.
878 .IP "\fIfile\fR\fB.f\fR" 4
881 .IP "\fIfile\fR\fB.for\fR" 4
883 .IP "\fIfile\fR\fB.FOR\fR" 4
886 Fixed form Fortran source code which should not be preprocessed.
887 .IP "\fIfile\fR\fB.F\fR" 4
890 .IP "\fIfile\fR\fB.fpp\fR" 4
892 .IP "\fIfile\fR\fB.FPP\fR" 4
895 Fixed form Fortran source code which must be preprocessed (with the traditional
897 .IP "\fIfile\fR\fB.f90\fR" 4
900 .IP "\fIfile\fR\fB.f95\fR" 4
903 Free form Fortran source code which should not be preprocessed.
904 .IP "\fIfile\fR\fB.F90\fR" 4
907 .IP "\fIfile\fR\fB.F95\fR" 4
910 Free form Fortran source code which must be preprocessed (with the
911 traditional preprocessor).
912 .IP "\fIfile\fR\fB.ads\fR" 4
914 Ada source code file which contains a library unit declaration (a
915 declaration of a package, subprogram, or generic, or a generic
916 instantiation), or a library unit renaming declaration (a package,
917 generic, or subprogram renaming declaration). Such files are also
919 .IP "\fIfile\fR\fB.adb\fR" 4
921 Ada source code file containing a library unit body (a subprogram or
922 package body). Such files are also called \fIbodies\fR.
923 .IP "\fIfile\fR\fB.s\fR" 4
926 .IP "\fIfile\fR\fB.S\fR" 4
928 Assembler code which must be preprocessed.
931 An object file to be fed straight into linking.
932 Any file name with no recognized suffix is treated this way.
934 You can specify the input language explicitly with the \fB\-x\fR option:
935 .IP "\fB\-x\fR \fIlanguage\fR" 4
936 .IX Item "-x language"
937 Specify explicitly the \fIlanguage\fR for the following input files
938 (rather than letting the compiler choose a default based on the file
939 name suffix). This option applies to all following input files until
940 the next \fB\-x\fR option. Possible values for \fIlanguage\fR are:
943 \& c c\-header c\-cpp\-output
944 \& c++ c++\-header c++\-cpp\-output
945 \& objective\-c objective\-c\-header objective\-c\-cpp\-output
946 \& objective\-c++ objective\-c++\-header objective\-c++\-cpp\-output
947 \& assembler assembler\-with\-cpp
949 \& f95 f95\-cpp\-input
953 .IP "\fB\-x none\fR" 4
955 Turn off any specification of a language, so that subsequent files are
956 handled according to their file name suffixes (as they are if \fB\-x\fR
957 has not been used at all).
958 .IP "\fB\-pass\-exit\-codes\fR" 4
959 .IX Item "-pass-exit-codes"
960 Normally the \fBgcc\fR program will exit with the code of 1 if any
961 phase of the compiler returns a non-success return code. If you specify
962 \&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
963 numerically highest error produced by any phase that returned an error
964 indication. The C, \*(C+, and Fortran frontends return 4, if an internal
965 compiler error is encountered.
967 If you only want some of the stages of compilation, you can use
968 \&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
969 one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
970 \&\fBgcc\fR is to stop. Note that some combinations (for example,
971 \&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
974 Compile or assemble the source files, but do not link. The linking
975 stage simply is not done. The ultimate output is in the form of an
976 object file for each source file.
978 By default, the object file name for a source file is made by replacing
979 the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
981 Unrecognized input files, not requiring compilation or assembly, are
985 Stop after the stage of compilation proper; do not assemble. The output
986 is in the form of an assembler code file for each non-assembler input
989 By default, the assembler file name for a source file is made by
990 replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
992 Input files that don't require compilation are ignored.
995 Stop after the preprocessing stage; do not run the compiler proper. The
996 output is in the form of preprocessed source code, which is sent to the
999 Input files which don't require preprocessing are ignored.
1000 .IP "\fB\-o\fR \fIfile\fR" 4
1002 Place output in file \fIfile\fR. This applies regardless to whatever
1003 sort of output is being produced, whether it be an executable file,
1004 an object file, an assembler file or preprocessed C code.
1006 If \fB\-o\fR is not specified, the default is to put an executable
1007 file in \fIa.out\fR, the object file for
1008 \&\fI\fIsource\fI.\fIsuffix\fI\fR in \fI\fIsource\fI.o\fR, its
1009 assembler file in \fI\fIsource\fI.s\fR, a precompiled header file in
1010 \&\fI\fIsource\fI.\fIsuffix\fI.gch\fR, and all preprocessed C source on
1014 Print (on standard error output) the commands executed to run the stages
1015 of compilation. Also print the version number of the compiler driver
1016 program and of the preprocessor and the compiler proper.
1019 Like \fB\-v\fR except the commands are not executed and all command
1020 arguments are quoted. This is useful for shell scripts to capture the
1021 driver-generated command lines.
1022 .IP "\fB\-pipe\fR" 4
1024 Use pipes rather than temporary files for communication between the
1025 various stages of compilation. This fails to work on some systems where
1026 the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
1028 .IP "\fB\-combine\fR" 4
1030 If you are compiling multiple source files, this option tells the driver
1031 to pass all the source files to the compiler at once (for those
1032 languages for which the compiler can handle this). This will allow
1033 intermodule analysis (\s-1IMA\s0) to be performed by the compiler. Currently the only
1034 language for which this is supported is C. If you pass source files for
1035 multiple languages to the driver, using this option, the driver will invoke
1036 the compiler(s) that support \s-1IMA\s0 once each, passing each compiler all the
1037 source files appropriate for it. For those languages that do not support
1038 \&\s-1IMA\s0 this option will be ignored, and the compiler will be invoked once for
1039 each source file in that language. If you use this option in conjunction
1040 with \fB\-save\-temps\fR, the compiler will generate multiple
1042 (one for each source file), but only one (combined) \fI.o\fR or
1044 .IP "\fB\-\-help\fR" 4
1046 Print (on the standard output) a description of the command line options
1047 understood by \fBgcc\fR. If the \fB\-v\fR option is also specified
1048 then \fB\-\-help\fR will also be passed on to the various processes
1049 invoked by \fBgcc\fR, so that they can display the command line options
1050 they accept. If the \fB\-Wextra\fR option is also specified then command
1051 line options which have no documentation associated with them will also
1053 .IP "\fB\-\-target\-help\fR" 4
1054 .IX Item "--target-help"
1055 Print (on the standard output) a description of target specific command
1056 line options for each tool.
1057 .IP "\fB\-\-version\fR" 4
1058 .IX Item "--version"
1059 Display the version number and copyrights of the invoked \s-1GCC\s0.
1060 .IP "\fB@\fR\fIfile\fR" 4
1062 Read command-line options from \fIfile\fR. The options read are
1063 inserted in place of the original @\fIfile\fR option. If \fIfile\fR
1064 does not exist, or cannot be read, then the option will be treated
1065 literally, and not removed.
1067 Options in \fIfile\fR are separated by whitespace. A whitespace
1068 character may be included in an option by surrounding the entire
1069 option in either single or double quotes. Any character (including a
1070 backslash) may be included by prefixing the character to be included
1071 with a backslash. The \fIfile\fR may itself contain additional
1072 @\fIfile\fR options; any such options will be processed recursively.
1073 .Sh "Compiling \*(C+ Programs"
1074 .IX Subsection "Compiling Programs"
1075 \&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
1076 \&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
1077 \&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR or \fB.H\fR; and
1078 preprocessed \*(C+ files use the suffix \fB.ii\fR. \s-1GCC\s0 recognizes
1079 files with these names and compiles them as \*(C+ programs even if you
1080 call the compiler the same way as for compiling C programs (usually
1081 with the name \fBgcc\fR).
1083 However, the use of \fBgcc\fR does not add the \*(C+ library.
1084 \&\fBg++\fR is a program that calls \s-1GCC\s0 and treats \fB.c\fR,
1085 \&\fB.h\fR and \fB.i\fR files as \*(C+ source files instead of C source
1086 files unless \fB\-x\fR is used, and automatically specifies linking
1087 against the \*(C+ library. This program is also useful when
1088 precompiling a C header file with a \fB.h\fR extension for use in \*(C+
1089 compilations. On many systems, \fBg++\fR is also installed with
1092 When you compile \*(C+ programs, you may specify many of the same
1093 command-line options that you use for compiling programs in any
1094 language; or command-line options meaningful for C and related
1095 languages; or options that are meaningful only for \*(C+ programs.
1096 .Sh "Options Controlling C Dialect"
1097 .IX Subsection "Options Controlling C Dialect"
1098 The following options control the dialect of C (or languages derived
1099 from C, such as \*(C+, Objective-C and Objective\-\*(C+) that the compiler
1101 .IP "\fB\-ansi\fR" 4
1103 In C mode, this is equivalent to \fB\-std=c89\fR. In \*(C+ mode, it is
1104 equivalent to \fB\-std=c++98\fR.
1106 This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
1107 C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
1108 such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
1109 predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
1110 type of system you are using. It also enables the undesirable and
1111 rarely used \s-1ISO\s0 trigraph feature. For the C compiler,
1112 it disables recognition of \*(C+ style \fB//\fR comments as well as
1113 the \f(CW\*(C`inline\*(C'\fR keyword.
1115 The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
1116 \&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
1117 \&\fB\-ansi\fR. You would not want to use them in an \s-1ISO\s0 C program, of
1118 course, but it is useful to put them in header files that might be included
1119 in compilations done with \fB\-ansi\fR. Alternate predefined macros
1120 such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
1121 without \fB\-ansi\fR.
1123 The \fB\-ansi\fR option does not cause non-ISO programs to be
1124 rejected gratuitously. For that, \fB\-pedantic\fR is required in
1125 addition to \fB\-ansi\fR.
1127 The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
1128 option is used. Some header files may notice this macro and refrain
1129 from declaring certain functions or defining certain macros that the
1130 \&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
1131 programs that might use these names for other things.
1133 Functions that would normally be built in but do not have semantics
1134 defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
1135 functions when \fB\-ansi\fR is used.
1136 .IP "\fB\-std=\fR" 4
1138 Determine the language standard. This option
1139 is currently only supported when compiling C or \*(C+.
1141 The compiler can accept several base standards, such as \fBc89\fR or
1142 \&\fBc++98\fR, and \s-1GNU\s0 dialects of those standards, such as
1143 \&\fBgnu89\fR or \fBgnu++98\fR. By specifing a base standard, the
1144 compiler will accept all programs following that standard and those
1145 using \s-1GNU\s0 extensions that do not contradict it. For example,
1146 \&\fB\-std=c89\fR turns off certain features of \s-1GCC\s0 that are
1147 incompatible with \s-1ISO\s0 C90, such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR
1148 keywords, but not other \s-1GNU\s0 extensions that do not have a meaning in
1149 \&\s-1ISO\s0 C90, such as omitting the middle term of a \f(CW\*(C`?:\*(C'\fR
1150 expression. On the other hand, by specifing a \s-1GNU\s0 dialect of a
1151 standard, all features the compiler support are enabled, even when
1152 those features change the meaning of the base standard and some
1153 strict-conforming programs may be rejected. The particular standard
1154 is used by \fB\-pedantic\fR to identify which features are \s-1GNU\s0
1155 extensions given that version of the standard. For example
1156 \&\fB\-std=gnu89 \-pedantic\fR would warn about \*(C+ style \fB//\fR
1157 comments, while \fB\-std=gnu99 \-pedantic\fR would not.
1159 A value for this option must be provided; possible values are
1164 .IP "\fBiso9899:1990\fR" 4
1165 .IX Item "iso9899:1990"
1167 Support all \s-1ISO\s0 C90 programs (certain \s-1GNU\s0 extensions that conflict
1168 with \s-1ISO\s0 C90 are disabled). Same as \fB\-ansi\fR for C code.
1169 .IP "\fBiso9899:199409\fR" 4
1170 .IX Item "iso9899:199409"
1171 \&\s-1ISO\s0 C90 as modified in amendment 1.
1177 .IP "\fBiso9899:1999\fR" 4
1178 .IX Item "iso9899:1999"
1179 .IP "\fBiso9899:199x\fR" 4
1180 .IX Item "iso9899:199x"
1182 \&\s-1ISO\s0 C99. Note that this standard is not yet fully supported; see
1183 <\fBhttp://gcc.gnu.org/gcc\-4.2/c99status.html\fR> for more information. The
1184 names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
1187 \&\s-1GNU\s0 dialect of \s-1ISO\s0 C90 (including some C99 features). This
1188 is the default for C code.
1195 \&\s-1GNU\s0 dialect of \s-1ISO\s0 C99. When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
1196 this will become the default. The name \fBgnu9x\fR is deprecated.
1199 The 1998 \s-1ISO\s0 \*(C+ standard plus amendments. Same as \fB\-ansi\fR for
1201 .IP "\fBgnu++98\fR" 4
1203 \&\s-1GNU\s0 dialect of \fB\-std=c++98\fR. This is the default for
1208 .IP "\fB\-fgnu89\-inline\fR" 4
1209 .IX Item "-fgnu89-inline"
1210 The option \fB\-fgnu89\-inline\fR tells \s-1GCC\s0 to use the traditional
1211 \&\s-1GNU\s0 semantics for \f(CW\*(C`inline\*(C'\fR functions when in C99 mode.
1213 option is roughly equivalent to adding the \f(CW\*(C`gnu_inline\*(C'\fR function
1214 attribute to all inline functions.
1216 This option is accepted by \s-1GCC\s0 versions 4.1.3 and up. In \s-1GCC\s0 versions
1217 prior to 4.3, C99 inline semantics are not supported, and thus this
1218 option is effectively assumed to be present regardless of whether or not
1219 it is specified; the only effect of specifying it explicitly is to
1220 disable warnings about using inline functions in C99 mode. Likewise,
1221 the option \fB\-fno\-gnu89\-inline\fR is not supported in versions of
1222 \&\s-1GCC\s0 before 4.3. It will be supported only in C99 or gnu99 mode, not in
1225 The preprocesor macros \f(CW\*(C`_\|_GNUC_GNU_INLINE_\|_\*(C'\fR and
1226 \&\f(CW\*(C`_\|_GNUC_STDC_INLINE_\|_\*(C'\fR may be used to check which semantics are
1227 in effect for \f(CW\*(C`inline\*(C'\fR functions.
1228 .IP "\fB\-aux\-info\fR \fIfilename\fR" 4
1229 .IX Item "-aux-info filename"
1230 Output to the given filename prototyped declarations for all functions
1231 declared and/or defined in a translation unit, including those in header
1232 files. This option is silently ignored in any language other than C.
1234 Besides declarations, the file indicates, in comments, the origin of
1235 each declaration (source file and line), whether the declaration was
1236 implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
1237 \&\fBO\fR for old, respectively, in the first character after the line
1238 number and the colon), and whether it came from a declaration or a
1239 definition (\fBC\fR or \fBF\fR, respectively, in the following
1240 character). In the case of function definitions, a K&R\-style list of
1241 arguments followed by their declarations is also provided, inside
1242 comments, after the declaration.
1243 .IP "\fB\-fno\-asm\fR" 4
1245 Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
1246 keyword, so that code can use these words as identifiers. You can use
1247 the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
1248 instead. \fB\-ansi\fR implies \fB\-fno\-asm\fR.
1250 In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
1251 \&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords. You may want to
1252 use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
1253 effect. In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
1254 switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
1255 \&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
1256 .IP "\fB\-fno\-builtin\fR" 4
1257 .IX Item "-fno-builtin"
1259 .IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
1260 .IX Item "-fno-builtin-function"
1262 Don't recognize built-in functions that do not begin with
1263 \&\fB_\|_builtin_\fR as prefix.
1265 \&\s-1GCC\s0 normally generates special code to handle certain built-in functions
1266 more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
1267 instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
1268 may become inline copy loops. The resulting code is often both smaller
1269 and faster, but since the function calls no longer appear as such, you
1270 cannot set a breakpoint on those calls, nor can you change the behavior
1271 of the functions by linking with a different library. In addition,
1272 when a function is recognized as a built-in function, \s-1GCC\s0 may use
1273 information about that function to warn about problems with calls to
1274 that function, or to generate more efficient code, even if the
1275 resulting code still contains calls to that function. For example,
1276 warnings are given with \fB\-Wformat\fR for bad calls to
1277 \&\f(CW\*(C`printf\*(C'\fR, when \f(CW\*(C`printf\*(C'\fR is built in, and \f(CW\*(C`strlen\*(C'\fR is
1278 known not to modify global memory.
1280 With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
1281 only the built-in function \fIfunction\fR is
1282 disabled. \fIfunction\fR must not begin with \fB_\|_builtin_\fR. If a
1283 function is named this is not built-in in this version of \s-1GCC\s0, this
1284 option is ignored. There is no corresponding
1285 \&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
1286 built-in functions selectively when using \fB\-fno\-builtin\fR or
1287 \&\fB\-ffreestanding\fR, you may define macros such as:
1290 \& #define abs(n) __builtin_abs ((n))
1291 \& #define strcpy(d, s) __builtin_strcpy ((d), (s))
1293 .IP "\fB\-fhosted\fR" 4
1295 Assert that compilation takes place in a hosted environment. This implies
1296 \&\fB\-fbuiltin\fR. A hosted environment is one in which the
1297 entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
1298 type of \f(CW\*(C`int\*(C'\fR. Examples are nearly everything except a kernel.
1299 This is equivalent to \fB\-fno\-freestanding\fR.
1300 .IP "\fB\-ffreestanding\fR" 4
1301 .IX Item "-ffreestanding"
1302 Assert that compilation takes place in a freestanding environment. This
1303 implies \fB\-fno\-builtin\fR. A freestanding environment
1304 is one in which the standard library may not exist, and program startup may
1305 not necessarily be at \f(CW\*(C`main\*(C'\fR. The most obvious example is an \s-1OS\s0 kernel.
1306 This is equivalent to \fB\-fno\-hosted\fR.
1307 .IP "\fB\-fopenmp\fR" 4
1309 Enable handling of OpenMP directives \f(CW\*(C`#pragma omp\*(C'\fR in C/\*(C+ and
1310 \&\f(CW\*(C`!$omp\*(C'\fR in Fortran. When \fB\-fopenmp\fR is specified, the
1311 compiler generates parallel code according to the OpenMP Application
1312 Program Interface v2.5 <\fBhttp://www.openmp.org/\fR>.
1313 .IP "\fB\-fms\-extensions\fR" 4
1314 .IX Item "-fms-extensions"
1315 Accept some non-standard constructs used in Microsoft header files.
1317 Some cases of unnamed fields in structures and unions are only
1318 accepted with this option.
1319 .IP "\fB\-trigraphs\fR" 4
1320 .IX Item "-trigraphs"
1321 Support \s-1ISO\s0 C trigraphs. The \fB\-ansi\fR option (and \fB\-std\fR
1322 options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
1323 .IP "\fB\-no\-integrated\-cpp\fR" 4
1324 .IX Item "-no-integrated-cpp"
1325 Performs a compilation in two passes: preprocessing and compiling. This
1326 option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
1327 \&\fB\-B\fR option. The user supplied compilation step can then add in
1328 an additional preprocessing step after normal preprocessing but before
1329 compiling. The default is to use the integrated cpp (internal cpp)
1331 The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
1332 \&\*(L"cc1obj\*(R" are merged.
1333 .IP "\fB\-traditional\fR" 4
1334 .IX Item "-traditional"
1336 .IP "\fB\-traditional\-cpp\fR" 4
1337 .IX Item "-traditional-cpp"
1339 Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
1340 C compiler. They are now only supported with the \fB\-E\fR switch.
1341 The preprocessor continues to support a pre-standard mode. See the \s-1GNU\s0
1342 \&\s-1CPP\s0 manual for details.
1343 .IP "\fB\-fcond\-mismatch\fR" 4
1344 .IX Item "-fcond-mismatch"
1345 Allow conditional expressions with mismatched types in the second and
1346 third arguments. The value of such an expression is void. This option
1347 is not supported for \*(C+.
1348 .IP "\fB\-funsigned\-char\fR" 4
1349 .IX Item "-funsigned-char"
1350 Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
1352 Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
1353 be. It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
1354 \&\f(CW\*(C`signed char\*(C'\fR by default.
1356 Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
1357 \&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
1358 But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
1359 expect it to be signed, or expect it to be unsigned, depending on the
1360 machines they were written for. This option, and its inverse, let you
1361 make such a program work with the opposite default.
1363 The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
1364 \&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
1365 is always just like one of those two.
1366 .IP "\fB\-fsigned\-char\fR" 4
1367 .IX Item "-fsigned-char"
1368 Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
1370 Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
1371 the negative form of \fB\-funsigned\-char\fR. Likewise, the option
1372 \&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
1373 .IP "\fB\-fsigned\-bitfields\fR" 4
1374 .IX Item "-fsigned-bitfields"
1376 .IP "\fB\-funsigned\-bitfields\fR" 4
1377 .IX Item "-funsigned-bitfields"
1378 .IP "\fB\-fno\-signed\-bitfields\fR" 4
1379 .IX Item "-fno-signed-bitfields"
1380 .IP "\fB\-fno\-unsigned\-bitfields\fR" 4
1381 .IX Item "-fno-unsigned-bitfields"
1383 These options control whether a bit-field is signed or unsigned, when the
1384 declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR. By
1385 default, such a bit-field is signed, because this is consistent: the
1386 basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
1387 .Sh "Options Controlling \*(C+ Dialect"
1388 .IX Subsection "Options Controlling Dialect"
1389 This section describes the command-line options that are only meaningful
1390 for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
1391 regardless of what language your program is in. For example, you
1392 might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
1395 \& g++ \-g \-frepo \-O \-c firstClass.C
1398 In this example, only \fB\-frepo\fR is an option meant
1399 only for \*(C+ programs; you can use the other options with any
1400 language supported by \s-1GCC\s0.
1402 Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
1403 .IP "\fB\-fabi\-version=\fR\fIn\fR" 4
1404 .IX Item "-fabi-version=n"
1405 Use version \fIn\fR of the \*(C+ \s-1ABI\s0. Version 2 is the version of the
1406 \&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4. Version 1 is the version of
1407 the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2. Version 0 will always be
1408 the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
1409 Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
1412 The default is version 2.
1413 .IP "\fB\-fno\-access\-control\fR" 4
1414 .IX Item "-fno-access-control"
1415 Turn off all access checking. This switch is mainly useful for working
1416 around bugs in the access control code.
1417 .IP "\fB\-fcheck\-new\fR" 4
1418 .IX Item "-fcheck-new"
1419 Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
1420 before attempting to modify the storage allocated. This check is
1421 normally unnecessary because the \*(C+ standard specifies that
1422 \&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
1423 \&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
1424 return value even without this option. In all other cases, when
1425 \&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
1426 exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR. See also
1427 \&\fBnew (nothrow)\fR.
1428 .IP "\fB\-fconserve\-space\fR" 4
1429 .IX Item "-fconserve-space"
1430 Put uninitialized or runtime-initialized global variables into the
1431 common segment, as C does. This saves space in the executable at the
1432 cost of not diagnosing duplicate definitions. If you compile with this
1433 flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
1434 completed, you may have an object that is being destroyed twice because
1435 two definitions were merged.
1437 This option is no longer useful on most targets, now that support has
1438 been added for putting variables into \s-1BSS\s0 without making them common.
1439 .IP "\fB\-ffriend\-injection\fR" 4
1440 .IX Item "-ffriend-injection"
1441 Inject friend functions into the enclosing namespace, so that they are
1442 visible outside the scope of the class in which they are declared.
1443 Friend functions were documented to work this way in the old Annotated
1444 \&\*(C+ Reference Manual, and versions of G++ before 4.1 always worked
1445 that way. However, in \s-1ISO\s0 \*(C+ a friend function which is not declared
1446 in an enclosing scope can only be found using argument dependent
1447 lookup. This option causes friends to be injected as they were in
1450 This option is for compatibility, and may be removed in a future
1452 .IP "\fB\-fno\-elide\-constructors\fR" 4
1453 .IX Item "-fno-elide-constructors"
1454 The \*(C+ standard allows an implementation to omit creating a temporary
1455 which is only used to initialize another object of the same type.
1456 Specifying this option disables that optimization, and forces G++ to
1457 call the copy constructor in all cases.
1458 .IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
1459 .IX Item "-fno-enforce-eh-specs"
1460 Don't generate code to check for violation of exception specifications
1461 at runtime. This option violates the \*(C+ standard, but may be useful
1462 for reducing code size in production builds, much like defining
1463 \&\fB\s-1NDEBUG\s0\fR. This does not give user code permission to throw
1464 exceptions in violation of the exception specifications; the compiler
1465 will still optimize based on the specifications, so throwing an
1466 unexpected exception will result in undefined behavior.
1467 .IP "\fB\-ffor\-scope\fR" 4
1468 .IX Item "-ffor-scope"
1470 .IP "\fB\-fno\-for\-scope\fR" 4
1471 .IX Item "-fno-for-scope"
1473 If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
1474 a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
1475 as specified by the \*(C+ standard.
1476 If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
1477 a \fIfor-init-statement\fR extends to the end of the enclosing scope,
1478 as was the case in old versions of G++, and other (traditional)
1479 implementations of \*(C+.
1481 The default if neither flag is given to follow the standard,
1482 but to allow and give a warning for old-style code that would
1483 otherwise be invalid, or have different behavior.
1484 .IP "\fB\-fno\-gnu\-keywords\fR" 4
1485 .IX Item "-fno-gnu-keywords"
1486 Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
1487 word as an identifier. You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
1488 \&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
1489 .IP "\fB\-fno\-implicit\-templates\fR" 4
1490 .IX Item "-fno-implicit-templates"
1491 Never emit code for non-inline templates which are instantiated
1492 implicitly (i.e. by use); only emit code for explicit instantiations.
1493 .IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
1494 .IX Item "-fno-implicit-inline-templates"
1495 Don't emit code for implicit instantiations of inline templates, either.
1496 The default is to handle inlines differently so that compiles with and
1497 without optimization will need the same set of explicit instantiations.
1498 .IP "\fB\-fno\-implement\-inlines\fR" 4
1499 .IX Item "-fno-implement-inlines"
1500 To save space, do not emit out-of-line copies of inline functions
1501 controlled by \fB#pragma implementation\fR. This will cause linker
1502 errors if these functions are not inlined everywhere they are called.
1503 .IP "\fB\-fms\-extensions\fR" 4
1504 .IX Item "-fms-extensions"
1505 Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
1506 int and getting a pointer to member function via non-standard syntax.
1507 .IP "\fB\-fno\-nonansi\-builtins\fR" 4
1508 .IX Item "-fno-nonansi-builtins"
1509 Disable built-in declarations of functions that are not mandated by
1510 \&\s-1ANSI/ISO\s0 C. These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
1511 \&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
1512 .IP "\fB\-fno\-operator\-names\fR" 4
1513 .IX Item "-fno-operator-names"
1514 Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
1515 \&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
1516 synonyms as keywords.
1517 .IP "\fB\-fno\-optional\-diags\fR" 4
1518 .IX Item "-fno-optional-diags"
1519 Disable diagnostics that the standard says a compiler does not need to
1520 issue. Currently, the only such diagnostic issued by G++ is the one for
1521 a name having multiple meanings within a class.
1522 .IP "\fB\-fpermissive\fR" 4
1523 .IX Item "-fpermissive"
1524 Downgrade some diagnostics about nonconformant code from errors to
1525 warnings. Thus, using \fB\-fpermissive\fR will allow some
1526 nonconforming code to compile.
1527 .IP "\fB\-frepo\fR" 4
1529 Enable automatic template instantiation at link time. This option also
1530 implies \fB\-fno\-implicit\-templates\fR.
1531 .IP "\fB\-fno\-rtti\fR" 4
1532 .IX Item "-fno-rtti"
1533 Disable generation of information about every class with virtual
1534 functions for use by the \*(C+ runtime type identification features
1535 (\fBdynamic_cast\fR and \fBtypeid\fR). If you don't use those parts
1536 of the language, you can save some space by using this flag. Note that
1537 exception handling uses the same information, but it will generate it as
1538 needed. The \fBdynamic_cast\fR operator can still be used for casts that
1539 do not require runtime type information, i.e. casts to \f(CW\*(C`void *\*(C'\fR or to
1540 unambiguous base classes.
1541 .IP "\fB\-fstats\fR" 4
1543 Emit statistics about front-end processing at the end of the compilation.
1544 This information is generally only useful to the G++ development team.
1545 .IP "\fB\-ftemplate\-depth\-\fR\fIn\fR" 4
1546 .IX Item "-ftemplate-depth-n"
1547 Set the maximum instantiation depth for template classes to \fIn\fR.
1548 A limit on the template instantiation depth is needed to detect
1549 endless recursions during template class instantiation. \s-1ANSI/ISO\s0 \*(C+
1550 conforming programs must not rely on a maximum depth greater than 17.
1551 .IP "\fB\-fno\-threadsafe\-statics\fR" 4
1552 .IX Item "-fno-threadsafe-statics"
1553 Do not emit the extra code to use the routines specified in the \*(C+
1554 \&\s-1ABI\s0 for thread-safe initialization of local statics. You can use this
1555 option to reduce code size slightly in code that doesn't need to be
1557 .IP "\fB\-fuse\-cxa\-atexit\fR" 4
1558 .IX Item "-fuse-cxa-atexit"
1559 Register destructors for objects with static storage duration with the
1560 \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
1561 This option is required for fully standards-compliant handling of static
1562 destructors, but will only work if your C library supports
1563 \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
1564 .IP "\fB\-fno\-use\-cxa\-get\-exception\-ptr\fR" 4
1565 .IX Item "-fno-use-cxa-get-exception-ptr"
1566 Don't use the \f(CW\*(C`_\|_cxa_get_exception_ptr\*(C'\fR runtime routine. This
1567 will cause \f(CW\*(C`std::uncaught_exception\*(C'\fR to be incorrect, but is necessary
1568 if the runtime routine is not available.
1569 .IP "\fB\-fvisibility\-inlines\-hidden\fR" 4
1570 .IX Item "-fvisibility-inlines-hidden"
1571 This switch declares that the user does not attempt to compare
1572 pointers to inline methods where the addresses of the two functions
1573 were taken in different shared objects.
1575 The effect of this is that \s-1GCC\s0 may, effectively, mark inline methods with
1576 \&\f(CW\*(C`_\|_attribute_\|_ ((visibility ("hidden")))\*(C'\fR so that they do not
1577 appear in the export table of a \s-1DSO\s0 and do not require a \s-1PLT\s0 indirection
1578 when used within the \s-1DSO\s0. Enabling this option can have a dramatic effect
1579 on load and link times of a \s-1DSO\s0 as it massively reduces the size of the
1580 dynamic export table when the library makes heavy use of templates.
1582 The behaviour of this switch is not quite the same as marking the
1583 methods as hidden directly, because it does not affect static variables
1584 local to the function or cause the compiler to deduce that
1585 the function is defined in only one shared object.
1587 You may mark a method as having a visibility explicitly to negate the
1588 effect of the switch for that method. For example, if you do want to
1589 compare pointers to a particular inline method, you might mark it as
1590 having default visibility. Marking the enclosing class with explicit
1591 visibility will have no effect.
1593 Explicitly instantiated inline methods are unaffected by this option
1594 as their linkage might otherwise cross a shared library boundary.
1595 .IP "\fB\-fno\-weak\fR" 4
1596 .IX Item "-fno-weak"
1597 Do not use weak symbol support, even if it is provided by the linker.
1598 By default, G++ will use weak symbols if they are available. This
1599 option exists only for testing, and should not be used by end\-users;
1600 it will result in inferior code and has no benefits. This option may
1601 be removed in a future release of G++.
1602 .IP "\fB\-nostdinc++\fR" 4
1603 .IX Item "-nostdinc++"
1604 Do not search for header files in the standard directories specific to
1605 \&\*(C+, but do still search the other standard directories. (This option
1606 is used when building the \*(C+ library.)
1608 In addition, these optimization, warning, and code generation options
1609 have meanings only for \*(C+ programs:
1610 .IP "\fB\-fno\-default\-inline\fR" 4
1611 .IX Item "-fno-default-inline"
1612 Do not assume \fBinline\fR for functions defined inside a class scope.
1614 functions will have linkage like inline functions; they just won't be
1616 .IP "\fB\-Wabi\fR (\*(C+ only)" 4
1617 .IX Item "-Wabi ( only)"
1618 Warn when G++ generates code that is probably not compatible with the
1619 vendor-neutral \*(C+ \s-1ABI\s0. Although an effort has been made to warn about
1620 all such cases, there are probably some cases that are not warned about,
1621 even though G++ is generating incompatible code. There may also be
1622 cases where warnings are emitted even though the code that is generated
1625 You should rewrite your code to avoid these warnings if you are
1626 concerned about the fact that code generated by G++ may not be binary
1627 compatible with code generated by other compilers.
1629 The known incompatibilities at this point include:
1632 Incorrect handling of tail-padding for bit\-fields. G++ may attempt to
1633 pack data into the same byte as a base class. For example:
1636 \& struct A { virtual void f(); int f1 : 1; };
1637 \& struct B : public A { int f2 : 1; };
1640 In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
1641 as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not. You can avoid this problem
1642 by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
1643 byte size on your platform; that will cause G++ and other compilers to
1644 layout \f(CW\*(C`B\*(C'\fR identically.
1646 Incorrect handling of tail-padding for virtual bases. G++ does not use
1647 tail padding when laying out virtual bases. For example:
1650 \& struct A { virtual void f(); char c1; };
1651 \& struct B { B(); char c2; };
1652 \& struct C : public A, public virtual B {};
1655 In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
1656 \&\f(CW\*(C`A\*(C'\fR; other compilers will. You can avoid this problem by
1657 explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
1658 alignment (ignoring virtual base classes); that will cause G++ and other
1659 compilers to layout \f(CW\*(C`C\*(C'\fR identically.
1661 Incorrect handling of bit-fields with declared widths greater than that
1662 of their underlying types, when the bit-fields appear in a union. For
1666 \& union U { int i : 4096; };
1669 Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
1670 union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
1672 Empty classes can be placed at incorrect offsets. For example:
1681 \& virtual void f ();
1686 \& struct C : public B, public A {};
1689 G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
1690 it should be placed at offset zero. G++ mistakenly believes that the
1691 \&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
1693 Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
1694 template template parameters can be mangled incorrectly.
1697 \& template <typename Q>
1698 \& void f(typename Q::X) {}
1702 \& template <template <typename> class Q>
1703 \& void f(typename Q<int>::X) {}
1706 Instantiations of these templates may be mangled incorrectly.
1710 .IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ only)" 4
1711 .IX Item "-Wctor-dtor-privacy ( only)"
1712 Warn when a class seems unusable because all the constructors or
1713 destructors in that class are private, and it has neither friends nor
1714 public static member functions.
1715 .IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ only)" 4
1716 .IX Item "-Wnon-virtual-dtor ( only)"
1717 Warn when a class appears to be polymorphic, thereby requiring a virtual
1718 destructor, yet it declares a non-virtual one. This warning is also
1719 enabled if \-Weffc++ is specified.
1720 .IP "\fB\-Wreorder\fR (\*(C+ only)" 4
1721 .IX Item "-Wreorder ( only)"
1722 Warn when the order of member initializers given in the code does not
1723 match the order in which they must be executed. For instance:
1729 \& A(): j (0), i (1) { }
1733 The compiler will rearrange the member initializers for \fBi\fR
1734 and \fBj\fR to match the declaration order of the members, emitting
1735 a warning to that effect. This warning is enabled by \fB\-Wall\fR.
1737 The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
1738 .IP "\fB\-Weffc++\fR (\*(C+ only)" 4
1739 .IX Item "-Weffc++ ( only)"
1740 Warn about violations of the following style guidelines from Scott Meyers'
1741 \&\fIEffective \*(C+\fR book:
1744 Item 11: Define a copy constructor and an assignment operator for classes
1745 with dynamically allocated memory.
1747 Item 12: Prefer initialization to assignment in constructors.
1749 Item 14: Make destructors virtual in base classes.
1751 Item 15: Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
1753 Item 23: Don't try to return a reference when you must return an object.
1757 Also warn about violations of the following style guidelines from
1758 Scott Meyers' \fIMore Effective \*(C+\fR book:
1760 Item 6: Distinguish between prefix and postfix forms of increment and
1761 decrement operators.
1763 Item 7: Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
1767 When selecting this option, be aware that the standard library
1768 headers do not obey all of these guidelines; use \fBgrep \-v\fR
1769 to filter out those warnings.
1771 .IP "\fB\-Wno\-deprecated\fR (\*(C+ only)" 4
1772 .IX Item "-Wno-deprecated ( only)"
1773 Do not warn about usage of deprecated features.
1774 .IP "\fB\-Wstrict\-null\-sentinel\fR (\*(C+ only)" 4
1775 .IX Item "-Wstrict-null-sentinel ( only)"
1776 Warn also about the use of an uncasted \f(CW\*(C`NULL\*(C'\fR as sentinel. When
1777 compiling only with \s-1GCC\s0 this is a valid sentinel, as \f(CW\*(C`NULL\*(C'\fR is defined
1778 to \f(CW\*(C`_\|_null\*(C'\fR. Although it is a null pointer constant not a null pointer,
1779 it is guaranteed to of the same size as a pointer. But this use is
1780 not portable across different compilers.
1781 .IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ only)" 4
1782 .IX Item "-Wno-non-template-friend ( only)"
1783 Disable warnings when non-templatized friend functions are declared
1784 within a template. Since the advent of explicit template specification
1785 support in G++, if the name of the friend is an unqualified-id (i.e.,
1786 \&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
1787 friend declare or define an ordinary, nontemplate function. (Section
1788 14.5.3). Before G++ implemented explicit specification, unqualified-ids
1789 could be interpreted as a particular specialization of a templatized
1790 function. Because this non-conforming behavior is no longer the default
1791 behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
1792 check existing code for potential trouble spots and is on by default.
1793 This new compiler behavior can be turned off with
1794 \&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
1795 but disables the helpful warning.
1796 .IP "\fB\-Wold\-style\-cast\fR (\*(C+ only)" 4
1797 .IX Item "-Wold-style-cast ( only)"
1798 Warn if an old-style (C\-style) cast to a non-void type is used within
1799 a \*(C+ program. The new-style casts (\fBdynamic_cast\fR,
1800 \&\fBstatic_cast\fR, \fBreinterpret_cast\fR, and \fBconst_cast\fR) are
1801 less vulnerable to unintended effects and much easier to search for.
1802 .IP "\fB\-Woverloaded\-virtual\fR (\*(C+ only)" 4
1803 .IX Item "-Woverloaded-virtual ( only)"
1804 Warn when a function declaration hides virtual functions from a
1805 base class. For example, in:
1809 \& virtual void f();
1814 \& struct B: public A {
1819 the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
1827 will fail to compile.
1828 .IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ only)" 4
1829 .IX Item "-Wno-pmf-conversions ( only)"
1830 Disable the diagnostic for converting a bound pointer to member function
1832 .IP "\fB\-Wsign\-promo\fR (\*(C+ only)" 4
1833 .IX Item "-Wsign-promo ( only)"
1834 Warn when overload resolution chooses a promotion from unsigned or
1835 enumerated type to a signed type, over a conversion to an unsigned type of
1836 the same size. Previous versions of G++ would try to preserve
1837 unsignedness, but the standard mandates the current behavior.
1842 \& A& operator = (int);
1854 In this example, G++ will synthesize a default \fBA& operator =
1855 (const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
1856 .Sh "Options Controlling Objective-C and Objective\-\*(C+ Dialects"
1857 .IX Subsection "Options Controlling Objective-C and Objective- Dialects"
1858 (\s-1NOTE:\s0 This manual does not describe the Objective-C and Objective\-\*(C+
1859 languages themselves. See
1861 This section describes the command-line options that are only meaningful
1862 for Objective-C and Objective\-\*(C+ programs, but you can also use most of
1863 the language-independent \s-1GNU\s0 compiler options.
1864 For example, you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
1867 \& gcc \-g \-fgnu\-runtime \-O \-c some_class.m
1870 In this example, \fB\-fgnu\-runtime\fR is an option meant only for
1871 Objective-C and Objective\-\*(C+ programs; you can use the other options with
1872 any language supported by \s-1GCC\s0.
1874 Note that since Objective-C is an extension of the C language, Objective-C
1875 compilations may also use options specific to the C front-end (e.g.,
1876 \&\fB\-Wtraditional\fR). Similarly, Objective\-\*(C+ compilations may use
1877 \&\*(C+\-specific options (e.g., \fB\-Wabi\fR).
1879 Here is a list of options that are \fIonly\fR for compiling Objective-C
1880 and Objective\-\*(C+ programs:
1881 .IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
1882 .IX Item "-fconstant-string-class=class-name"
1883 Use \fIclass-name\fR as the name of the class to instantiate for each
1884 literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR. The default
1885 class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
1886 \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below). The
1887 \&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
1888 \&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
1889 to be laid out as constant CoreFoundation strings.
1890 .IP "\fB\-fgnu\-runtime\fR" 4
1891 .IX Item "-fgnu-runtime"
1892 Generate object code compatible with the standard \s-1GNU\s0 Objective-C
1893 runtime. This is the default for most types of systems.
1894 .IP "\fB\-fnext\-runtime\fR" 4
1895 .IX Item "-fnext-runtime"
1896 Generate output compatible with the NeXT runtime. This is the default
1897 for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X. The macro
1898 \&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
1900 .IP "\fB\-fno\-nil\-receivers\fR" 4
1901 .IX Item "-fno-nil-receivers"
1902 Assume that all Objective-C message dispatches (e.g.,
1903 \&\f(CW\*(C`[receiver message:arg]\*(C'\fR) in this translation unit ensure that the receiver
1904 is not \f(CW\*(C`nil\*(C'\fR. This allows for more efficient entry points in the runtime
1905 to be used. Currently, this option is only available in conjunction with
1906 the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
1907 .IP "\fB\-fobjc\-call\-cxx\-cdtors\fR" 4
1908 .IX Item "-fobjc-call-cxx-cdtors"
1909 For each Objective-C class, check if any of its instance variables is a
1910 \&\*(C+ object with a non-trivial default constructor. If so, synthesize a
1911 special \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR instance method that will run
1912 non-trivial default constructors on any such instance variables, in order,
1913 and then return \f(CW\*(C`self\*(C'\fR. Similarly, check if any instance variable
1914 is a \*(C+ object with a non-trivial destructor, and if so, synthesize a
1915 special \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR method that will run
1916 all such default destructors, in reverse order.
1918 The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and/or \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods
1919 thusly generated will only operate on instance variables declared in the
1920 current Objective-C class, and not those inherited from superclasses. It
1921 is the responsibility of the Objective-C runtime to invoke all such methods
1922 in an object's inheritance hierarchy. The \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR methods
1923 will be invoked by the runtime immediately after a new object
1924 instance is allocated; the \f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods will
1925 be invoked immediately before the runtime deallocates an object instance.
1927 As of this writing, only the NeXT runtime on Mac \s-1OS\s0 X 10.4 and later has
1928 support for invoking the \f(CW\*(C`\- (id) .cxx_construct\*(C'\fR and
1929 \&\f(CW\*(C`\- (void) .cxx_destruct\*(C'\fR methods.
1930 .IP "\fB\-fobjc\-direct\-dispatch\fR" 4
1931 .IX Item "-fobjc-direct-dispatch"
1932 Allow fast jumps to the message dispatcher. On Darwin this is
1933 accomplished via the comm page.
1934 .IP "\fB\-fobjc\-exceptions\fR" 4
1935 .IX Item "-fobjc-exceptions"
1936 Enable syntactic support for structured exception handling in Objective\-C,
1937 similar to what is offered by \*(C+ and Java. This option is
1938 unavailable in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.2 and
1947 \& @catch (AnObjCClass *exc) {
1954 \& @catch (AnotherClass *exc) {
1957 \& @catch (id allOthers) {
1967 The \f(CW@throw\fR statement may appear anywhere in an Objective-C or
1968 Objective\-\*(C+ program; when used inside of a \f(CW@catch\fR block, the
1969 \&\f(CW@throw\fR may appear without an argument (as shown above), in which case
1970 the object caught by the \f(CW@catch\fR will be rethrown.
1972 Note that only (pointers to) Objective-C objects may be thrown and
1973 caught using this scheme. When an object is thrown, it will be caught
1974 by the nearest \f(CW@catch\fR clause capable of handling objects of that type,
1975 analogously to how \f(CW\*(C`catch\*(C'\fR blocks work in \*(C+ and Java. A
1976 \&\f(CW\*(C`@catch(id ...)\*(C'\fR clause (as shown above) may also be provided to catch
1977 any and all Objective-C exceptions not caught by previous \f(CW@catch\fR
1980 The \f(CW@finally\fR clause, if present, will be executed upon exit from the
1981 immediately preceding \f(CW\*(C`@try ... @catch\*(C'\fR section. This will happen
1982 regardless of whether any exceptions are thrown, caught or rethrown
1983 inside the \f(CW\*(C`@try ... @catch\*(C'\fR section, analogously to the behavior
1984 of the \f(CW\*(C`finally\*(C'\fR clause in Java.
1986 There are several caveats to using the new exception mechanism:
1989 Although currently designed to be binary compatible with \f(CW\*(C`NS_HANDLER\*(C'\fR\-style
1990 idioms provided by the \f(CW\*(C`NSException\*(C'\fR class, the new
1991 exceptions can only be used on Mac \s-1OS\s0 X 10.3 (Panther) and later
1992 systems, due to additional functionality needed in the (NeXT) Objective-C
1995 As mentioned above, the new exceptions do not support handling
1996 types other than Objective-C objects. Furthermore, when used from
1997 Objective\-\*(C+, the Objective-C exception model does not interoperate with \*(C+
1998 exceptions at this time. This means you cannot \f(CW@throw\fR an exception
1999 from Objective-C and \f(CW\*(C`catch\*(C'\fR it in \*(C+, or vice versa
2000 (i.e., \f(CW\*(C`throw ... @catch\*(C'\fR).
2004 The \fB\-fobjc\-exceptions\fR switch also enables the use of synchronization
2005 blocks for thread-safe execution:
2008 \& @synchronized (ObjCClass *guard) {
2013 Upon entering the \f(CW@synchronized\fR block, a thread of execution shall
2014 first check whether a lock has been placed on the corresponding \f(CW\*(C`guard\*(C'\fR
2015 object by another thread. If it has, the current thread shall wait until
2016 the other thread relinquishes its lock. Once \f(CW\*(C`guard\*(C'\fR becomes available,
2017 the current thread will place its own lock on it, execute the code contained in
2018 the \f(CW@synchronized\fR block, and finally relinquish the lock (thereby
2019 making \f(CW\*(C`guard\*(C'\fR available to other threads).
2021 Unlike Java, Objective-C does not allow for entire methods to be marked
2022 \&\f(CW@synchronized\fR. Note that throwing exceptions out of
2023 \&\f(CW@synchronized\fR blocks is allowed, and will cause the guarding object
2024 to be unlocked properly.
2026 .IP "\fB\-fobjc\-gc\fR" 4
2027 .IX Item "-fobjc-gc"
2028 Enable garbage collection (\s-1GC\s0) in Objective-C and Objective\-\*(C+ programs.
2029 .IP "\fB\-freplace\-objc\-classes\fR" 4
2030 .IX Item "-freplace-objc-classes"
2031 Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
2032 the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
2033 run time instead. This is used in conjunction with the Fix-and-Continue
2034 debugging mode, where the object file in question may be recompiled and
2035 dynamically reloaded in the course of program execution, without the need
2036 to restart the program itself. Currently, Fix-and-Continue functionality
2037 is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
2039 .IP "\fB\-fzero\-link\fR" 4
2040 .IX Item "-fzero-link"
2041 When compiling for the NeXT runtime, the compiler ordinarily replaces calls
2042 to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
2043 compile time) with static class references that get initialized at load time,
2044 which improves run-time performance. Specifying the \fB\-fzero\-link\fR flag
2045 suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
2046 to be retained. This is useful in Zero-Link debugging mode, since it allows
2047 for individual class implementations to be modified during program execution.
2048 .IP "\fB\-gen\-decls\fR" 4
2049 .IX Item "-gen-decls"
2050 Dump interface declarations for all classes seen in the source file to a
2051 file named \fI\fIsourcename\fI.decl\fR.
2052 .IP "\fB\-Wassign\-intercept\fR" 4
2053 .IX Item "-Wassign-intercept"
2054 Warn whenever an Objective-C assignment is being intercepted by the
2056 .IP "\fB\-Wno\-protocol\fR" 4
2057 .IX Item "-Wno-protocol"
2058 If a class is declared to implement a protocol, a warning is issued for
2059 every method in the protocol that is not implemented by the class. The
2060 default behavior is to issue a warning for every method not explicitly
2061 implemented in the class, even if a method implementation is inherited
2062 from the superclass. If you use the \fB\-Wno\-protocol\fR option, then
2063 methods inherited from the superclass are considered to be implemented,
2064 and no warning is issued for them.
2065 .IP "\fB\-Wselector\fR" 4
2066 .IX Item "-Wselector"
2067 Warn if multiple methods of different types for the same selector are
2068 found during compilation. The check is performed on the list of methods
2069 in the final stage of compilation. Additionally, a check is performed
2070 for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
2071 expression, and a corresponding method for that selector has been found
2072 during compilation. Because these checks scan the method table only at
2073 the end of compilation, these warnings are not produced if the final
2074 stage of compilation is not reached, for example because an error is
2075 found during compilation, or because the \fB\-fsyntax\-only\fR option is
2077 .IP "\fB\-Wstrict\-selector\-match\fR" 4
2078 .IX Item "-Wstrict-selector-match"
2079 Warn if multiple methods with differing argument and/or return types are
2080 found for a given selector when attempting to send a message using this
2081 selector to a receiver of type \f(CW\*(C`id\*(C'\fR or \f(CW\*(C`Class\*(C'\fR. When this flag
2082 is off (which is the default behavior), the compiler will omit such warnings
2083 if any differences found are confined to types which share the same size
2085 .IP "\fB\-Wundeclared\-selector\fR" 4
2086 .IX Item "-Wundeclared-selector"
2087 Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
2088 undeclared selector is found. A selector is considered undeclared if no
2089 method with that name has been declared before the
2090 \&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
2091 \&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
2092 an \f(CW@implementation\fR section. This option always performs its
2093 checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
2094 while \fB\-Wselector\fR only performs its checks in the final stage of
2095 compilation. This also enforces the coding style convention
2096 that methods and selectors must be declared before being used.
2097 .IP "\fB\-print\-objc\-runtime\-info\fR" 4
2098 .IX Item "-print-objc-runtime-info"
2099 Generate C header describing the largest structure that is passed by
2101 .Sh "Options to Control Diagnostic Messages Formatting"
2102 .IX Subsection "Options to Control Diagnostic Messages Formatting"
2103 Traditionally, diagnostic messages have been formatted irrespective of
2104 the output device's aspect (e.g. its width, ...). The options described
2105 below can be used to control the diagnostic messages formatting
2106 algorithm, e.g. how many characters per line, how often source location
2107 information should be reported. Right now, only the \*(C+ front end can
2108 honor these options. However it is expected, in the near future, that
2109 the remaining front ends would be able to digest them correctly.
2110 .IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
2111 .IX Item "-fmessage-length=n"
2112 Try to format error messages so that they fit on lines of about \fIn\fR
2113 characters. The default is 72 characters for \fBg++\fR and 0 for the rest of
2114 the front ends supported by \s-1GCC\s0. If \fIn\fR is zero, then no
2115 line-wrapping will be done; each error message will appear on a single
2117 .IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
2118 .IX Item "-fdiagnostics-show-location=once"
2119 Only meaningful in line-wrapping mode. Instructs the diagnostic messages
2120 reporter to emit \fIonce\fR source location information; that is, in
2121 case the message is too long to fit on a single physical line and has to
2122 be wrapped, the source location won't be emitted (as prefix) again,
2123 over and over, in subsequent continuation lines. This is the default
2125 .IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
2126 .IX Item "-fdiagnostics-show-location=every-line"
2127 Only meaningful in line-wrapping mode. Instructs the diagnostic
2128 messages reporter to emit the same source location information (as
2129 prefix) for physical lines that result from the process of breaking
2130 a message which is too long to fit on a single line.
2131 .IP "\fB\-fdiagnostics\-show\-option\fR" 4
2132 .IX Item "-fdiagnostics-show-option"
2133 This option instructs the diagnostic machinery to add text to each
2134 diagnostic emitted, which indicates which command line option directly
2135 controls that diagnostic, when such an option is known to the
2136 diagnostic machinery.
2137 .Sh "Options to Request or Suppress Warnings"
2138 .IX Subsection "Options to Request or Suppress Warnings"
2139 Warnings are diagnostic messages that report constructions which
2140 are not inherently erroneous but which are risky or suggest there
2141 may have been an error.
2143 You can request many specific warnings with options beginning \fB\-W\fR,
2144 for example \fB\-Wimplicit\fR to request warnings on implicit
2145 declarations. Each of these specific warning options also has a
2146 negative form beginning \fB\-Wno\-\fR to turn off warnings;
2147 for example, \fB\-Wno\-implicit\fR. This manual lists only one of the
2148 two forms, whichever is not the default.
2150 The following options control the amount and kinds of warnings produced
2151 by \s-1GCC\s0; for further, language-specific options also refer to
2152 \&\fB\*(C+ Dialect Options\fR and \fBObjective-C and Objective\-\*(C+ Dialect
2154 .IP "\fB\-fsyntax\-only\fR" 4
2155 .IX Item "-fsyntax-only"
2156 Check the code for syntax errors, but don't do anything beyond that.
2157 .IP "\fB\-pedantic\fR" 4
2158 .IX Item "-pedantic"
2159 Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
2160 reject all programs that use forbidden extensions, and some other
2161 programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+. For \s-1ISO\s0 C, follows the
2162 version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
2164 Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
2165 this option (though a rare few will require \fB\-ansi\fR or a
2166 \&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C). However,
2167 without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
2168 features are supported as well. With this option, they are rejected.
2170 \&\fB\-pedantic\fR does not cause warning messages for use of the
2171 alternate keywords whose names begin and end with \fB_\|_\fR. Pedantic
2172 warnings are also disabled in the expression that follows
2173 \&\f(CW\*(C`_\|_extension_\|_\*(C'\fR. However, only system header files should use
2174 these escape routes; application programs should avoid them.
2176 Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
2177 C conformance. They soon find that it does not do quite what they want:
2178 it finds some non-ISO practices, but not all\-\-\-only those for which
2179 \&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
2180 diagnostics have been added.
2182 A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
2183 some instances, but would require considerable additional work and would
2184 be quite different from \fB\-pedantic\fR. We don't have plans to
2185 support such a feature in the near future.
2187 Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
2188 extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a
2189 corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
2190 extended dialect is based. Warnings from \fB\-pedantic\fR are given
2191 where they are required by the base standard. (It would not make sense
2192 for such warnings to be given only for features not in the specified \s-1GNU\s0
2193 C dialect, since by definition the \s-1GNU\s0 dialects of C include all
2194 features the compiler supports with the given option, and there would be
2195 nothing to warn about.)
2196 .IP "\fB\-pedantic\-errors\fR" 4
2197 .IX Item "-pedantic-errors"
2198 Like \fB\-pedantic\fR, except that errors are produced rather than
2202 Inhibit all warning messages.
2203 .IP "\fB\-Wno\-import\fR" 4
2204 .IX Item "-Wno-import"
2205 Inhibit warning messages about the use of \fB#import\fR.
2206 .IP "\fB\-Wchar\-subscripts\fR" 4
2207 .IX Item "-Wchar-subscripts"
2208 Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR. This is a common cause
2209 of error, as programmers often forget that this type is signed on some
2211 This warning is enabled by \fB\-Wall\fR.
2212 .IP "\fB\-Wcomment\fR" 4
2213 .IX Item "-Wcomment"
2214 Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
2215 comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
2216 This warning is enabled by \fB\-Wall\fR.
2217 .IP "\fB\-Wfatal\-errors\fR" 4
2218 .IX Item "-Wfatal-errors"
2219 This option causes the compiler to abort compilation on the first error
2220 occurred rather than trying to keep going and printing further error
2222 .IP "\fB\-Wformat\fR" 4
2224 Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
2225 the arguments supplied have types appropriate to the format string
2226 specified, and that the conversions specified in the format string make
2227 sense. This includes standard functions, and others specified by format
2228 attributes, in the \f(CW\*(C`printf\*(C'\fR,
2229 \&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
2230 not in the C standard) families (or other target-specific families).
2231 Which functions are checked without format attributes having been
2232 specified depends on the standard version selected, and such checks of
2233 functions without the attribute specified are disabled by
2234 \&\fB\-ffreestanding\fR or \fB\-fno\-builtin\fR.
2236 The formats are checked against the format features supported by \s-1GNU\s0
2237 libc version 2.2. These include all \s-1ISO\s0 C90 and C99 features, as well
2238 as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
2239 extensions. Other library implementations may not support all these
2240 features; \s-1GCC\s0 does not support warning about features that go beyond a
2241 particular library's limitations. However, if \fB\-pedantic\fR is used
2242 with \fB\-Wformat\fR, warnings will be given about format features not
2243 in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
2244 since those are not in any version of the C standard).
2246 Since \fB\-Wformat\fR also checks for null format arguments for
2247 several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
2249 \&\fB\-Wformat\fR is included in \fB\-Wall\fR. For more control over some
2250 aspects of format checking, the options \fB\-Wformat\-y2k\fR,
2251 \&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
2252 \&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
2253 \&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
2254 .IP "\fB\-Wformat\-y2k\fR" 4
2255 .IX Item "-Wformat-y2k"
2256 If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
2257 formats which may yield only a two-digit year.
2258 .IP "\fB\-Wno\-format\-extra\-args\fR" 4
2259 .IX Item "-Wno-format-extra-args"
2260 If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
2261 \&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function. The C standard specifies
2262 that such arguments are ignored.
2264 Where the unused arguments lie between used arguments that are
2265 specified with \fB$\fR operand number specifications, normally
2266 warnings are still given, since the implementation could not know what
2267 type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments. However,
2268 in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
2269 warning if the unused arguments are all pointers, since the Single
2270 Unix Specification says that such unused arguments are allowed.
2271 .IP "\fB\-Wno\-format\-zero\-length\fR" 4
2272 .IX Item "-Wno-format-zero-length"
2273 If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
2274 The C standard specifies that zero-length formats are allowed.
2275 .IP "\fB\-Wformat\-nonliteral\fR" 4
2276 .IX Item "-Wformat-nonliteral"
2277 If \fB\-Wformat\fR is specified, also warn if the format string is not a
2278 string literal and so cannot be checked, unless the format function
2279 takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
2280 .IP "\fB\-Wformat\-security\fR" 4
2281 .IX Item "-Wformat-security"
2282 If \fB\-Wformat\fR is specified, also warn about uses of format
2283 functions that represent possible security problems. At present, this
2284 warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
2285 format string is not a string literal and there are no format arguments,
2286 as in \f(CW\*(C`printf (foo);\*(C'\fR. This may be a security hole if the format
2287 string came from untrusted input and contains \fB%n\fR. (This is
2288 currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
2289 in future warnings may be added to \fB\-Wformat\-security\fR that are not
2290 included in \fB\-Wformat\-nonliteral\fR.)
2291 .IP "\fB\-Wformat=2\fR" 4
2292 .IX Item "-Wformat=2"
2293 Enable \fB\-Wformat\fR plus format checks not included in
2294 \&\fB\-Wformat\fR. Currently equivalent to \fB\-Wformat
2295 \&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
2296 .IP "\fB\-Wnonnull\fR" 4
2297 .IX Item "-Wnonnull"
2298 Warn about passing a null pointer for arguments marked as
2299 requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
2301 \&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR. It
2302 can be disabled with the \fB\-Wno\-nonnull\fR option.
2303 .IP "\fB\-Winit\-self\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
2304 .IX Item "-Winit-self (C, , Objective-C and Objective- only)"
2305 Warn about uninitialized variables which are initialized with themselves.
2306 Note this option can only be used with the \fB\-Wuninitialized\fR option,
2307 which in turn only works with \fB\-O1\fR and above.
2309 For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
2310 following snippet only when \fB\-Winit\-self\fR has been specified:
2319 .IP "\fB\-Wimplicit\-int\fR" 4
2320 .IX Item "-Wimplicit-int"
2321 Warn when a declaration does not specify a type.
2322 This warning is enabled by \fB\-Wall\fR.
2323 .IP "\fB\-Wimplicit\-function\-declaration\fR" 4
2324 .IX Item "-Wimplicit-function-declaration"
2326 .IP "\fB\-Werror\-implicit\-function\-declaration\fR" 4
2327 .IX Item "-Werror-implicit-function-declaration"
2329 Give a warning (or error) whenever a function is used before being
2330 declared. The form \fB\-Wno\-error\-implicit\-function\-declaration\fR
2332 This warning is enabled by \fB\-Wall\fR (as a warning, not an error).
2333 .IP "\fB\-Wimplicit\fR" 4
2334 .IX Item "-Wimplicit"
2335 Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
2336 This warning is enabled by \fB\-Wall\fR.
2337 .IP "\fB\-Wmain\fR" 4
2339 Warn if the type of \fBmain\fR is suspicious. \fBmain\fR should be a
2340 function with external linkage, returning int, taking either zero
2341 arguments, two, or three arguments of appropriate types.
2342 This warning is enabled by \fB\-Wall\fR.
2343 .IP "\fB\-Wmissing\-braces\fR" 4
2344 .IX Item "-Wmissing-braces"
2345 Warn if an aggregate or union initializer is not fully bracketed. In
2346 the following example, the initializer for \fBa\fR is not fully
2347 bracketed, but that for \fBb\fR is fully bracketed.
2350 \& int a[2][2] = { 0, 1, 2, 3 };
2351 \& int b[2][2] = { { 0, 1 }, { 2, 3 } };
2354 This warning is enabled by \fB\-Wall\fR.
2355 .IP "\fB\-Wmissing\-include\-dirs\fR (C, \*(C+, Objective-C and Objective\-\*(C+ only)" 4
2356 .IX Item "-Wmissing-include-dirs (C, , Objective-C and Objective- only)"
2357 Warn if a user-supplied include directory does not exist.
2358 .IP "\fB\-Wparentheses\fR" 4
2359 .IX Item "-Wparentheses"
2360 Warn if parentheses are omitted in certain contexts, such
2361 as when there is an assignment in a context where a truth value
2362 is expected, or when operators are nested whose precedence people
2363 often get confused about. Only the warning for an assignment used as
2364 a truth value is supported when compiling \*(C+; the other warnings are
2365 only supported when compiling C.
2367 Also warn if a comparison like \fBx<=y<=z\fR appears; this is
2368 equivalent to \fB(x<=y ? 1 : 0) <= z\fR, which is a different
2369 interpretation from that of ordinary mathematical notation.
2371 Also warn about constructions where there may be confusion to which
2372 \&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs. Here is an example of
2385 In C, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible \f(CW\*(C`if\*(C'\fR
2386 statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR. This is often not
2387 what the programmer expected, as illustrated in the above example by
2388 indentation the programmer chose. When there is the potential for this
2389 confusion, \s-1GCC\s0 will issue a warning when this flag is specified.
2390 To eliminate the warning, add explicit braces around the innermost
2391 \&\f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR could belong to
2392 the enclosing \f(CW\*(C`if\*(C'\fR. The resulting code would look like this:
2406 This warning is enabled by \fB\-Wall\fR.
2407 .IP "\fB\-Wsequence\-point\fR" 4
2408 .IX Item "-Wsequence-point"
2409 Warn about code that may have undefined semantics because of violations
2410 of sequence point rules in the C and \*(C+ standards.
2412 The C and \*(C+ standards defines the order in which expressions in a C/\*(C+
2413 program are evaluated in terms of \fIsequence points\fR, which represent
2414 a partial ordering between the execution of parts of the program: those
2415 executed before the sequence point, and those executed after it. These
2416 occur after the evaluation of a full expression (one which is not part
2417 of a larger expression), after the evaluation of the first operand of a
2418 \&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
2419 function is called (but after the evaluation of its arguments and the
2420 expression denoting the called function), and in certain other places.
2421 Other than as expressed by the sequence point rules, the order of
2422 evaluation of subexpressions of an expression is not specified. All
2423 these rules describe only a partial order rather than a total order,
2424 since, for example, if two functions are called within one expression
2425 with no sequence point between them, the order in which the functions
2426 are called is not specified. However, the standards committee have
2427 ruled that function calls do not overlap.
2429 It is not specified when between sequence points modifications to the
2430 values of objects take effect. Programs whose behavior depends on this
2431 have undefined behavior; the C and \*(C+ standards specify that \*(L"Between
2432 the previous and next sequence point an object shall have its stored
2433 value modified at most once by the evaluation of an expression.
2434 Furthermore, the prior value shall be read only to determine the value
2435 to be stored.\*(R". If a program breaks these rules, the results on any
2436 particular implementation are entirely unpredictable.
2438 Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
2439 = b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR. Some more complicated cases are not
2440 diagnosed by this option, and it may give an occasional false positive
2441 result, but in general it has been found fairly effective at detecting
2442 this sort of problem in programs.
2444 The standard is worded confusingly, therefore there is some debate
2445 over the precise meaning of the sequence point rules in subtle cases.
2446 Links to discussions of the problem, including proposed formal
2447 definitions, may be found on the \s-1GCC\s0 readings page, at
2448 <\fBhttp://gcc.gnu.org/readings.html\fR>.
2450 This warning is enabled by \fB\-Wall\fR for C and \*(C+.
2451 .IP "\fB\-Wreturn\-type\fR" 4
2452 .IX Item "-Wreturn-type"
2453 Warn whenever a function is defined with a return-type that defaults to
2454 \&\f(CW\*(C`int\*(C'\fR. Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
2455 return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR.
2457 For C, also warn if the return type of a function has a type qualifier
2458 such as \f(CW\*(C`const\*(C'\fR. Such a type qualifier has no effect, since the
2459 value returned by a function is not an lvalue. \s-1ISO\s0 C prohibits
2460 qualified \f(CW\*(C`void\*(C'\fR return types on function definitions, so such
2461 return types always receive a warning even without this option.
2463 For \*(C+, a function without return type always produces a diagnostic
2464 message, even when \fB\-Wno\-return\-type\fR is specified. The only
2465 exceptions are \fBmain\fR and functions defined in system headers.
2467 This warning is enabled by \fB\-Wall\fR.
2468 .IP "\fB\-Wswitch\fR" 4
2470 Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
2471 and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
2472 enumeration. (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
2473 warning.) \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
2474 provoke warnings when this option is used.
2475 This warning is enabled by \fB\-Wall\fR.
2476 .IP "\fB\-Wswitch\-default\fR" 4
2477 .IX Item "-Wswitch-default"
2478 Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
2480 .IP "\fB\-Wswitch\-enum\fR" 4
2481 .IX Item "-Wswitch-enum"
2482 Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
2483 and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
2484 enumeration. \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
2485 provoke warnings when this option is used.
2486 .IP "\fB\-Wtrigraphs\fR" 4
2487 .IX Item "-Wtrigraphs"
2488 Warn if any trigraphs are encountered that might change the meaning of
2489 the program (trigraphs within comments are not warned about).
2490 This warning is enabled by \fB\-Wall\fR.
2491 .IP "\fB\-Wunused\-function\fR" 4
2492 .IX Item "-Wunused-function"
2493 Warn whenever a static function is declared but not defined or a
2494 non-inline static function is unused.
2495 This warning is enabled by \fB\-Wall\fR.
2496 .IP "\fB\-Wunused\-label\fR" 4
2497 .IX Item "-Wunused-label"
2498 Warn whenever a label is declared but not used.
2499 This warning is enabled by \fB\-Wall\fR.
2501 To suppress this warning use the \fBunused\fR attribute.
2502 .IP "\fB\-Wunused\-parameter\fR" 4
2503 .IX Item "-Wunused-parameter"
2504 Warn whenever a function parameter is unused aside from its declaration.
2506 To suppress this warning use the \fBunused\fR attribute.
2507 .IP "\fB\-Wunused\-variable\fR" 4
2508 .IX Item "-Wunused-variable"
2509 Warn whenever a local variable or non-constant static variable is unused
2510 aside from its declaration.
2511 This warning is enabled by \fB\-Wall\fR.
2513 To suppress this warning use the \fBunused\fR attribute.
2514 .IP "\fB\-Wunused\-value\fR" 4
2515 .IX Item "-Wunused-value"
2516 Warn whenever a statement computes a result that is explicitly not used.
2517 This warning is enabled by \fB\-Wall\fR.
2519 To suppress this warning cast the expression to \fBvoid\fR.
2520 .IP "\fB\-Wunused\fR" 4
2522 All the above \fB\-Wunused\fR options combined.
2524 In order to get a warning about an unused function parameter, you must
2525 either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
2526 \&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
2527 .IP "\fB\-Wuninitialized\fR" 4
2528 .IX Item "-Wuninitialized"
2529 Warn if an automatic variable is used without first being initialized or
2530 if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call.
2532 These warnings are possible only in optimizing compilation,
2533 because they require data flow information that is computed only
2534 when optimizing. If you do not specify \fB\-O\fR, you will not get
2535 these warnings. Instead, \s-1GCC\s0 will issue a warning about \fB\-Wuninitialized\fR
2536 requiring \fB\-O\fR.
2538 If you want to warn about code which uses the uninitialized value of the
2539 variable in its own initializer, use the \fB\-Winit\-self\fR option.
2541 These warnings occur for individual uninitialized or clobbered
2542 elements of structure, union or array variables as well as for
2543 variables which are uninitialized or clobbered as a whole. They do
2544 not occur for variables or elements declared \f(CW\*(C`volatile\*(C'\fR. Because
2545 these warnings depend on optimization, the exact variables or elements
2546 for which there are warnings will depend on the precise optimization
2547 options and version of \s-1GCC\s0 used.
2549 Note that there may be no warning about a variable that is used only
2550 to compute a value that itself is never used, because such
2551 computations may be deleted by data flow analysis before the warnings
2554 These warnings are made optional because \s-1GCC\s0 is not smart
2555 enough to see all the reasons why the code might be correct
2556 despite appearing to have an error. Here is one example of how
2574 If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
2575 always initialized, but \s-1GCC\s0 doesn't know this. Here is
2576 another common case:
2581 \& if (change_y) save_y = y, y = new_y;
2583 \& if (change_y) y = save_y;
2587 This has no bug because \f(CW\*(C`save_y\*(C'\fR is used only if it is set.
2589 This option also warns when a non-volatile automatic variable might be
2590 changed by a call to \f(CW\*(C`longjmp\*(C'\fR. These warnings as well are possible
2591 only in optimizing compilation.
2593 The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR. It cannot know
2594 where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
2595 call it at any point in the code. As a result, you may get a warning
2596 even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
2597 in fact be called at the place which would cause a problem.
2599 Some spurious warnings can be avoided if you declare all the functions
2600 you use that never return as \f(CW\*(C`noreturn\*(C'\fR.
2602 This warning is enabled by \fB\-Wall\fR.
2603 .IP "\fB\-Wunknown\-pragmas\fR" 4
2604 .IX Item "-Wunknown-pragmas"
2605 Warn when a #pragma directive is encountered which is not understood by
2606 \&\s-1GCC\s0. If this command line option is used, warnings will even be issued
2607 for unknown pragmas in system header files. This is not the case if
2608 the warnings were only enabled by the \fB\-Wall\fR command line option.
2609 .IP "\fB\-Wno\-pragmas\fR" 4
2610 .IX Item "-Wno-pragmas"
2611 Do not warn about misuses of pragmas, such as incorrect parameters,
2612 invalid syntax, or conflicts between pragmas. See also
2613 \&\fB\-Wunknown\-pragmas\fR.
2614 .IP "\fB\-Wstrict\-aliasing\fR" 4
2615 .IX Item "-Wstrict-aliasing"
2616 This option is only active when \fB\-fstrict\-aliasing\fR is active.
2617 It warns about code which might break the strict aliasing rules that the
2618 compiler is using for optimization. The warning does not catch all
2619 cases, but does attempt to catch the more common pitfalls. It is
2620 included in \fB\-Wall\fR.
2621 .IP "\fB\-Wstrict\-aliasing=2\fR" 4
2622 .IX Item "-Wstrict-aliasing=2"
2623 This option is only active when \fB\-fstrict\-aliasing\fR is active.
2624 It warns about code which might break the strict aliasing rules that the
2625 compiler is using for optimization. This warning catches more cases than
2626 \&\fB\-Wstrict\-aliasing\fR, but it will also give a warning for some ambiguous
2627 cases that are safe.
2628 .IP "\fB\-Wstrict\-overflow\fR" 4
2629 .IX Item "-Wstrict-overflow"
2631 .IP "\fB\-Wstrict\-overflow=\fR\fIn\fR" 4
2632 .IX Item "-Wstrict-overflow=n"
2634 This option is only active when \fB\-fstrict\-overflow\fR is active.
2635 It warns about cases where the compiler optimizes based on the
2636 assumption that signed overflow does not occur. Note that it does not
2637 warn about all cases where the code might overflow: it only warns
2638 about cases where the compiler implements some optimization. Thus
2639 this warning depends on the optimization level.
2641 An optimization which assumes that signed overflow does not occur is
2642 perfectly safe if the values of the variables involved are such that
2643 overflow never does, in fact, occur. Therefore this warning can
2644 easily give a false positive: a warning about code which is not
2645 actually a problem. To help focus on important issues, several
2646 warning levels are defined. No warnings are issued for the use of
2647 undefined signed overflow when estimating how many iterations a loop
2648 will require, in particular when determining whether a loop will be
2651 .IP "\fB\-Wstrict\-overflow=1\fR" 4
2652 .IX Item "-Wstrict-overflow=1"
2653 Warn about cases which are both questionable and easy to avoid. For
2654 example: \f(CW\*(C`x + 1 > x\*(C'\fR; with \fB\-fstrict\-overflow\fR, the
2655 compiler will simplify this to \f(CW1\fR. This level of
2656 \&\fB\-Wstrict\-overflow\fR is enabled by \fB\-Wall\fR; higher levels
2657 are not, and must be explicitly requested.
2658 .IP "\fB\-Wstrict\-overflow=2\fR" 4
2659 .IX Item "-Wstrict-overflow=2"
2660 Also warn about other cases where a comparison is simplified to a
2661 constant. For example: \f(CW\*(C`abs (x) >= 0\*(C'\fR. This can only be
2662 simplified when \fB\-fstrict\-overflow\fR is in effect, because
2663 \&\f(CW\*(C`abs (INT_MIN)\*(C'\fR overflows to \f(CW\*(C`INT_MIN\*(C'\fR, which is less than
2664 zero. \fB\-Wstrict\-overflow\fR (with no level) is the same as
2665 \&\fB\-Wstrict\-overflow=2\fR.
2666 .IP "\fB\-Wstrict\-overflow=3\fR" 4
2667 .IX Item "-Wstrict-overflow=3"
2668 Also warn about other cases where a comparison is simplified. For
2669 example: \f(CW\*(C`x + 1 > 1\*(C'\fR will be simplified to \f(CW\*(C`x > 0\*(C'\fR.
2670 .IP "\fB\-Wstrict\-overflow=4\fR" 4
2671 .IX Item "-Wstrict-overflow=4"
2672 Also warn about other simplifications not covered by the above cases.
2673 For example: \f(CW\*(C`(x * 10) / 5\*(C'\fR will be simplified to \f(CW\*(C`x * 2\*(C'\fR.
2674 .IP "\fB\-Wstrict\-overflow=5\fR" 4
2675 .IX Item "-Wstrict-overflow=5"
2676 Also warn about cases where the compiler reduces the magnitude of a
2677 constant involved in a comparison. For example: \f(CW\*(C`x + 2 > y\*(C'\fR will
2678 be simplified to \f(CW\*(C`x + 1 >= y\*(C'\fR. This is reported only at the
2679 highest warning level because this simplification applies to many
2680 comparisons, so this warning level will give a very large number of
2685 .IP "\fB\-Wall\fR" 4
2687 All of the above \fB\-W\fR options combined. This enables all the
2688 warnings about constructions that some users consider questionable, and
2689 that are easy to avoid (or modify to prevent the warning), even in
2690 conjunction with macros. This also enables some language-specific
2691 warnings described in \fB\*(C+ Dialect Options\fR and
2692 \&\fBObjective-C and Objective\-\*(C+ Dialect Options\fR.
2694 The following \fB\-W...\fR options are not implied by \fB\-Wall\fR.
2695 Some of them warn about constructions that users generally do not
2696 consider questionable, but which occasionally you might wish to check
2697 for; others warn about constructions that are necessary or hard to avoid
2698 in some cases, and there is no simple way to modify the code to suppress
2700 .IP "\fB\-Wextra\fR" 4
2702 (This option used to be called \fB\-W\fR. The older name is still
2703 supported, but the newer name is more descriptive.) Print extra warning
2704 messages for these events:
2707 A function can return either with or without a value. (Falling
2708 off the end of the function body is considered returning without
2709 a value.) For example, this function would evoke such a
2720 An expression-statement or the left-hand side of a comma expression
2721 contains no side effects.
2722 To suppress the warning, cast the unused expression to void.
2723 For example, an expression such as \fBx[i,j]\fR will cause a warning,
2724 but \fBx[(void)i,j]\fR will not.
2726 An unsigned value is compared against zero with \fB<\fR or \fB>=\fR.
2728 Storage-class specifiers like \f(CW\*(C`static\*(C'\fR are not the first things in
2729 a declaration. According to the C Standard, this usage is obsolescent.
2731 If \fB\-Wall\fR or \fB\-Wunused\fR is also specified, warn about unused
2734 A comparison between signed and unsigned values could produce an
2735 incorrect result when the signed value is converted to unsigned.
2736 (But don't warn if \fB\-Wno\-sign\-compare\fR is also specified.)
2738 An aggregate has an initializer which does not initialize all members.
2739 This warning can be independently controlled by
2740 \&\fB\-Wmissing\-field\-initializers\fR.
2742 An initialized field without side effects is overridden when using
2743 designated initializers. This warning can be independently controlled by
2744 \&\fB\-Woverride\-init\fR.
2746 A function parameter is declared without a type specifier in K&R\-style
2750 \& void foo(bar) { }
2753 An empty body occurs in an \fBif\fR or \fBelse\fR statement.
2755 A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
2756 \&\fB>\fR, or \fB>=\fR.
2758 A variable might be changed by \fBlongjmp\fR or \fBvfork\fR.
2759 .IP "*<(\*(C+ only)>" 4
2760 .IX Item "*<( only)>"
2761 An enumerator and a non-enumerator both appear in a conditional expression.
2762 .IP "*<(\*(C+ only)>" 4
2763 .IX Item "*<( only)>"
2764 A non-static reference or non-static \fBconst\fR member appears in a
2765 class without constructors.
2766 .IP "*<(\*(C+ only)>" 4
2767 .IX Item "*<( only)>"
2768 Ambiguous virtual bases.
2769 .IP "*<(\*(C+ only)>" 4
2770 .IX Item "*<( only)>"
2771 Subscripting an array which has been declared \fBregister\fR.
2772 .IP "*<(\*(C+ only)>" 4
2773 .IX Item "*<( only)>"
2774 Taking the address of a variable which has been declared \fBregister\fR.
2775 .IP "*<(\*(C+ only)>" 4
2776 .IX Item "*<( only)>"
2777 A base class is not initialized in a derived class' copy constructor.
2781 .IP "\fB\-Wno\-div\-by\-zero\fR" 4
2782 .IX Item "-Wno-div-by-zero"
2783 Do not warn about compile-time integer division by zero. Floating point
2784 division by zero is not warned about, as it can be a legitimate way of
2785 obtaining infinities and NaNs.
2786 .IP "\fB\-Wsystem\-headers\fR" 4
2787 .IX Item "-Wsystem-headers"
2788 Print warning messages for constructs found in system header files.
2789 Warnings from system headers are normally suppressed, on the assumption
2790 that they usually do not indicate real problems and would only make the
2791 compiler output harder to read. Using this command line option tells
2792 \&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
2793 code. However, note that using \fB\-Wall\fR in conjunction with this
2794 option will \fInot\fR warn about unknown pragmas in system
2795 headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
2796 .IP "\fB\-Wfloat\-equal\fR" 4
2797 .IX Item "-Wfloat-equal"
2798 Warn if floating point values are used in equality comparisons.
2800 The idea behind this is that sometimes it is convenient (for the
2801 programmer) to consider floating-point values as approximations to
2802 infinitely precise real numbers. If you are doing this, then you need
2803 to compute (by analyzing the code, or in some other way) the maximum or
2804 likely maximum error that the computation introduces, and allow for it
2805 when performing comparisons (and when producing output, but that's a
2806 different problem). In particular, instead of testing for equality, you
2807 would check to see whether the two values have ranges that overlap; and
2808 this is done with the relational operators, so equality comparisons are
2810 .IP "\fB\-Wtraditional\fR (C only)" 4
2811 .IX Item "-Wtraditional (C only)"
2812 Warn about certain constructs that behave differently in traditional and
2813 \&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
2814 equivalent, and/or problematic constructs which should be avoided.
2817 Macro parameters that appear within string literals in the macro body.
2818 In traditional C macro replacement takes place within string literals,
2819 but does not in \s-1ISO\s0 C.
2821 In traditional C, some preprocessor directives did not exist.
2822 Traditional preprocessors would only consider a line to be a directive
2823 if the \fB#\fR appeared in column 1 on the line. Therefore
2824 \&\fB\-Wtraditional\fR warns about directives that traditional C
2825 understands but would ignore because the \fB#\fR does not appear as the
2826 first character on the line. It also suggests you hide directives like
2827 \&\fB#pragma\fR not understood by traditional C by indenting them. Some
2828 traditional implementations would not recognize \fB#elif\fR, so it
2829 suggests avoiding it altogether.
2831 A function-like macro that appears without arguments.
2833 The unary plus operator.
2835 The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
2836 constant suffixes. (Traditional C does support the \fBL\fR suffix on integer
2837 constants.) Note, these suffixes appear in macros defined in the system
2838 headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR.
2839 Use of these macros in user code might normally lead to spurious
2840 warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
2841 avoid warning in these cases.
2843 A function declared external in one block and then used after the end of
2846 A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
2848 A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
2849 This construct is not accepted by some traditional C compilers.
2851 The \s-1ISO\s0 type of an integer constant has a different width or
2852 signedness from its traditional type. This warning is only issued if
2853 the base of the constant is ten. I.e. hexadecimal or octal values, which
2854 typically represent bit patterns, are not warned about.
2856 Usage of \s-1ISO\s0 string concatenation is detected.
2858 Initialization of automatic aggregates.
2860 Identifier conflicts with labels. Traditional C lacks a separate
2861 namespace for labels.
2863 Initialization of unions. If the initializer is zero, the warning is
2864 omitted. This is done under the assumption that the zero initializer in
2865 user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
2866 initializer warnings and relies on default initialization to zero in the
2869 Conversions by prototypes between fixed/floating point values and vice
2870 versa. The absence of these prototypes when compiling with traditional
2871 C would cause serious problems. This is a subset of the possible
2872 conversion warnings, for the full set use \fB\-Wconversion\fR.
2874 Use of \s-1ISO\s0 C style function definitions. This warning intentionally is
2875 \&\fInot\fR issued for prototype declarations or variadic functions
2876 because these \s-1ISO\s0 C features will appear in your code when using
2877 libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
2878 \&\f(CW\*(C`VPARAMS\*(C'\fR. This warning is also bypassed for nested functions
2879 because that feature is already a \s-1GCC\s0 extension and thus not relevant to
2880 traditional C compatibility.
2884 .IP "\fB\-Wdeclaration\-after\-statement\fR (C only)" 4
2885 .IX Item "-Wdeclaration-after-statement (C only)"
2886 Warn when a declaration is found after a statement in a block. This
2887 construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
2888 allowed in \s-1GCC\s0. It is not supported by \s-1ISO\s0 C90 and was not supported by
2889 \&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.
2890 .IP "\fB\-Wundef\fR" 4
2892 Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
2893 .IP "\fB\-Wno\-endif\-labels\fR" 4
2894 .IX Item "-Wno-endif-labels"
2895 Do not warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
2896 .IP "\fB\-Wshadow\fR" 4
2898 Warn whenever a local variable shadows another local variable, parameter or
2899 global variable or whenever a built-in function is shadowed.
2900 .IP "\fB\-Wlarger\-than\-\fR\fIlen\fR" 4
2901 .IX Item "-Wlarger-than-len"
2902 Warn whenever an object of larger than \fIlen\fR bytes is defined.
2903 .IP "\fB\-Wunsafe\-loop\-optimizations\fR" 4
2904 .IX Item "-Wunsafe-loop-optimizations"
2905 Warn if the loop cannot be optimized because the compiler could not
2906 assume anything on the bounds of the loop indices. With
2907 \&\fB\-funsafe\-loop\-optimizations\fR warn if the compiler made
2909 .IP "\fB\-Wpointer\-arith\fR" 4
2910 .IX Item "-Wpointer-arith"
2911 Warn about anything that depends on the \*(L"size of\*(R" a function type or
2912 of \f(CW\*(C`void\*(C'\fR. \s-1GNU\s0 C assigns these types a size of 1, for
2913 convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
2915 .IP "\fB\-Wbad\-function\-cast\fR (C only)" 4
2916 .IX Item "-Wbad-function-cast (C only)"
2917 Warn whenever a function call is cast to a non-matching type.
2918 For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
2919 .IP "\fB\-Wc++\-compat\fR" 4
2920 .IX Item "-Wc++-compat"
2921 Warn about \s-1ISO\s0 C constructs that are outside of the common subset of
2922 \&\s-1ISO\s0 C and \s-1ISO\s0 \*(C+, e.g. request for implicit conversion from
2923 \&\f(CW\*(C`void *\*(C'\fR to a pointer to non\-\f(CW\*(C`void\*(C'\fR type.
2924 .IP "\fB\-Wcast\-qual\fR" 4
2925 .IX Item "-Wcast-qual"
2926 Warn whenever a pointer is cast so as to remove a type qualifier from
2927 the target type. For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
2928 to an ordinary \f(CW\*(C`char *\*(C'\fR.
2929 .IP "\fB\-Wcast\-align\fR" 4
2930 .IX Item "-Wcast-align"
2931 Warn whenever a pointer is cast such that the required alignment of the
2932 target is increased. For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
2933 an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
2934 two\- or four-byte boundaries.
2935 .IP "\fB\-Wwrite\-strings\fR" 4
2936 .IX Item "-Wwrite-strings"
2937 When compiling C, give string constants the type \f(CW\*(C`const
2938 char[\f(CIlength\f(CW]\*(C'\fR so that
2939 copying the address of one into a non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR
2940 pointer will get a warning; when compiling \*(C+, warn about the
2941 deprecated conversion from string literals to \f(CW\*(C`char *\*(C'\fR. This
2942 warning, by default, is enabled for \*(C+ programs.
2943 These warnings will help you find at
2944 compile time code that can try to write into a string constant, but
2945 only if you have been very careful about using \f(CW\*(C`const\*(C'\fR in
2946 declarations and prototypes. Otherwise, it will just be a nuisance;
2947 this is why we did not make \fB\-Wall\fR request these warnings.
2948 .IP "\fB\-Wconversion\fR" 4
2949 .IX Item "-Wconversion"
2950 Warn if a prototype causes a type conversion that is different from what
2951 would happen to the same argument in the absence of a prototype. This
2952 includes conversions of fixed point to floating and vice versa, and
2953 conversions changing the width or signedness of a fixed point argument
2954 except when the same as the default promotion.
2956 Also, warn if a negative integer constant expression is implicitly
2957 converted to an unsigned type. For example, warn about the assignment
2958 \&\f(CW\*(C`x = \-1\*(C'\fR if \f(CW\*(C`x\*(C'\fR is unsigned. But do not warn about explicit
2959 casts like \f(CW\*(C`(unsigned) \-1\*(C'\fR.
2960 .IP "\fB\-Wsign\-compare\fR" 4
2961 .IX Item "-Wsign-compare"
2962 Warn when a comparison between signed and unsigned values could produce
2963 an incorrect result when the signed value is converted to unsigned.
2964 This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
2965 of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
2966 .IP "\fB\-Waddress\fR" 4
2967 .IX Item "-Waddress"
2968 Warn about suspicious uses of memory addresses. These include using
2969 the address of a function in a conditional expression, such as
2970 \&\f(CW\*(C`void func(void); if (func)\*(C'\fR, and comparisons against the memory
2971 address of a string literal, such as \f(CW\*(C`if (x == "abc")\*(C'\fR. Such
2972 uses typically indicate a programmer error: the address of a function
2973 always evaluates to true, so their use in a conditional usually
2974 indicate that the programmer forgot the parentheses in a function
2975 call; and comparisons against string literals result in unspecified
2976 behavior and are not portable in C, so they usually indicate that the
2977 programmer intended to use \f(CW\*(C`strcmp\*(C'\fR. This warning is enabled by
2979 .IP "\fB\-Waggregate\-return\fR" 4
2980 .IX Item "-Waggregate-return"
2981 Warn if any functions that return structures or unions are defined or
2982 called. (In languages where you can return an array, this also elicits
2984 .IP "\fB\-Wno\-attributes\fR" 4
2985 .IX Item "-Wno-attributes"
2986 Do not warn if an unexpected \f(CW\*(C`_\|_attribute_\|_\*(C'\fR is used, such as
2987 unrecognized attributes, function attributes applied to variables,
2988 etc. This will not stop errors for incorrect use of supported
2990 .IP "\fB\-Wstrict\-prototypes\fR (C only)" 4
2991 .IX Item "-Wstrict-prototypes (C only)"
2992 Warn if a function is declared or defined without specifying the
2993 argument types. (An old-style function definition is permitted without
2994 a warning if preceded by a declaration which specifies the argument
2996 .IP "\fB\-Wold\-style\-definition\fR (C only)" 4
2997 .IX Item "-Wold-style-definition (C only)"
2998 Warn if an old-style function definition is used. A warning is given
2999 even if there is a previous prototype.
3000 .IP "\fB\-Wmissing\-prototypes\fR (C only)" 4
3001 .IX Item "-Wmissing-prototypes (C only)"
3002 Warn if a global function is defined without a previous prototype
3003 declaration. This warning is issued even if the definition itself
3004 provides a prototype. The aim is to detect global functions that fail
3005 to be declared in header files.
3006 .IP "\fB\-Wmissing\-declarations\fR (C only)" 4
3007 .IX Item "-Wmissing-declarations (C only)"
3008 Warn if a global function is defined without a previous declaration.
3009 Do so even if the definition itself provides a prototype.
3010 Use this option to detect global functions that are not declared in
3012 .IP "\fB\-Wmissing\-field\-initializers\fR" 4
3013 .IX Item "-Wmissing-field-initializers"
3014 Warn if a structure's initializer has some fields missing. For
3015 example, the following code would cause such a warning, because
3016 \&\f(CW\*(C`x.h\*(C'\fR is implicitly zero:
3019 \& struct s { int f, g, h; };
3020 \& struct s x = { 3, 4 };
3023 This option does not warn about designated initializers, so the following
3024 modification would not trigger a warning:
3027 \& struct s { int f, g, h; };
3028 \& struct s x = { .f = 3, .g = 4 };
3031 This warning is included in \fB\-Wextra\fR. To get other \fB\-Wextra\fR
3032 warnings without this one, use \fB\-Wextra \-Wno\-missing\-field\-initializers\fR.
3033 .IP "\fB\-Wmissing\-noreturn\fR" 4
3034 .IX Item "-Wmissing-noreturn"
3035 Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR.
3036 Note these are only possible candidates, not absolute ones. Care should
3037 be taken to manually verify functions actually do not ever return before
3038 adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation
3039 bugs could be introduced. You will not get a warning for \f(CW\*(C`main\*(C'\fR in
3040 hosted C environments.
3041 .IP "\fB\-Wmissing\-format\-attribute\fR" 4
3042 .IX Item "-Wmissing-format-attribute"
3043 Warn about function pointers which might be candidates for \f(CW\*(C`format\*(C'\fR
3044 attributes. Note these are only possible candidates, not absolute ones.
3045 \&\s-1GCC\s0 will guess that function pointers with \f(CW\*(C`format\*(C'\fR attributes that
3046 are used in assignment, initialization, parameter passing or return
3047 statements should have a corresponding \f(CW\*(C`format\*(C'\fR attribute in the
3048 resulting type. I.e. the left-hand side of the assignment or
3049 initialization, the type of the parameter variable, or the return type
3050 of the containing function respectively should also have a \f(CW\*(C`format\*(C'\fR
3051 attribute to avoid the warning.
3053 \&\s-1GCC\s0 will also warn about function definitions which might be
3054 candidates for \f(CW\*(C`format\*(C'\fR attributes. Again, these are only
3055 possible candidates. \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR attributes
3056 might be appropriate for any function that calls a function like
3057 \&\f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
3058 case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
3059 appropriate may not be detected.
3060 .IP "\fB\-Wno\-multichar\fR" 4
3061 .IX Item "-Wno-multichar"
3062 Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
3063 Usually they indicate a typo in the user's code, as they have
3064 implementation-defined values, and should not be used in portable code.
3065 .IP "\fB\-Wnormalized=<none|id|nfc|nfkc>\fR" 4
3066 .IX Item "-Wnormalized=<none|id|nfc|nfkc>"
3067 In \s-1ISO\s0 C and \s-1ISO\s0 \*(C+, two identifiers are different if they are
3068 different sequences of characters. However, sometimes when characters
3069 outside the basic \s-1ASCII\s0 character set are used, you can have two
3070 different character sequences that look the same. To avoid confusion,
3071 the \s-1ISO\s0 10646 standard sets out some \fInormalization rules\fR which
3072 when applied ensure that two sequences that look the same are turned into
3073 the same sequence. \s-1GCC\s0 can warn you if you are using identifiers which
3074 have not been normalized; this option controls that warning.
3076 There are four levels of warning that \s-1GCC\s0 supports. The default is
3077 \&\fB\-Wnormalized=nfc\fR, which warns about any identifier which is
3078 not in the \s-1ISO\s0 10646 \*(L"C\*(R" normalized form, \fI\s-1NFC\s0\fR. \s-1NFC\s0 is the
3079 recommended form for most uses.
3081 Unfortunately, there are some characters which \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ allow
3082 in identifiers that when turned into \s-1NFC\s0 aren't allowable as
3083 identifiers. That is, there's no way to use these symbols in portable
3084 \&\s-1ISO\s0 C or \*(C+ and have all your identifiers in \s-1NFC\s0.
3085 \&\fB\-Wnormalized=id\fR suppresses the warning for these characters.
3086 It is hoped that future versions of the standards involved will correct
3087 this, which is why this option is not the default.
3089 You can switch the warning off for all characters by writing
3090 \&\fB\-Wnormalized=none\fR. You would only want to do this if you
3091 were using some other normalization scheme (like \*(L"D\*(R"), because
3092 otherwise you can easily create bugs that are literally impossible to see.
3094 Some characters in \s-1ISO\s0 10646 have distinct meanings but look identical
3095 in some fonts or display methodologies, especially once formatting has
3096 been applied. For instance \f(CW\*(C`\eu207F\*(C'\fR, \*(L"\s-1SUPERSCRIPT\s0 \s-1LATIN\s0 \s-1SMALL\s0
3097 \&\s-1LETTER\s0 N\*(R", will display just like a regular \f(CW\*(C`n\*(C'\fR which has been
3098 placed in a superscript. \s-1ISO\s0 10646 defines the \fI\s-1NFKC\s0\fR
3099 normalization scheme to convert all these into a standard form as
3100 well, and \s-1GCC\s0 will warn if your code is not in \s-1NFKC\s0 if you use
3101 \&\fB\-Wnormalized=nfkc\fR. This warning is comparable to warning
3102 about every identifier that contains the letter O because it might be
3103 confused with the digit 0, and so is not the default, but may be
3104 useful as a local coding convention if the programming environment is
3105 unable to be fixed to display these characters distinctly.
3106 .IP "\fB\-Wno\-deprecated\-declarations\fR" 4
3107 .IX Item "-Wno-deprecated-declarations"
3108 Do not warn about uses of functions,
3109 variables, and types marked as deprecated by using the \f(CW\*(C`deprecated\*(C'\fR
3111 .IP "\fB\-Wno\-overflow\fR" 4
3112 .IX Item "-Wno-overflow"
3113 Do not warn about compile-time overflow in constant expressions.
3114 .IP "\fB\-Woverride\-init\fR" 4
3115 .IX Item "-Woverride-init"
3116 Warn if an initialized field without side effects is overridden when
3117 using designated initializers.
3119 This warning is included in \fB\-Wextra\fR. To get other
3120 \&\fB\-Wextra\fR warnings without this one, use \fB\-Wextra
3121 \&\-Wno\-override\-init\fR.
3122 .IP "\fB\-Wpacked\fR" 4
3124 Warn if a structure is given the packed attribute, but the packed
3125 attribute has no effect on the layout or size of the structure.
3126 Such structures may be mis-aligned for little benefit. For
3127 instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
3128 will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
3129 have the packed attribute:
3135 \& } __attribute__((packed));
3141 .IP "\fB\-Wpadded\fR" 4
3143 Warn if padding is included in a structure, either to align an element
3144 of the structure or to align the whole structure. Sometimes when this
3145 happens it is possible to rearrange the fields of the structure to
3146 reduce the padding and so make the structure smaller.
3147 .IP "\fB\-Wredundant\-decls\fR" 4
3148 .IX Item "-Wredundant-decls"
3149 Warn if anything is declared more than once in the same scope, even in
3150 cases where multiple declaration is valid and changes nothing.
3151 .IP "\fB\-Wnested\-externs\fR (C only)" 4
3152 .IX Item "-Wnested-externs (C only)"
3153 Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
3154 .IP "\fB\-Wunreachable\-code\fR" 4
3155 .IX Item "-Wunreachable-code"
3156 Warn if the compiler detects that code will never be executed.
3158 This option is intended to warn when the compiler detects that at
3159 least a whole line of source code will never be executed, because
3160 some condition is never satisfied or because it is after a
3161 procedure that never returns.
3163 It is possible for this option to produce a warning even though there
3164 are circumstances under which part of the affected line can be executed,
3165 so care should be taken when removing apparently-unreachable code.
3167 For instance, when a function is inlined, a warning may mean that the
3168 line is unreachable in only one inlined copy of the function.
3170 This option is not made part of \fB\-Wall\fR because in a debugging
3171 version of a program there is often substantial code which checks
3172 correct functioning of the program and is, hopefully, unreachable
3173 because the program does work. Another common use of unreachable
3174 code is to provide behavior which is selectable at compile\-time.
3175 .IP "\fB\-Winline\fR" 4
3177 Warn if a function can not be inlined and it was declared as inline.
3178 Even with this option, the compiler will not warn about failures to
3179 inline functions declared in system headers.
3181 The compiler uses a variety of heuristics to determine whether or not
3182 to inline a function. For example, the compiler takes into account
3183 the size of the function being inlined and the amount of inlining
3184 that has already been done in the current function. Therefore,
3185 seemingly insignificant changes in the source program can cause the
3186 warnings produced by \fB\-Winline\fR to appear or disappear.
3187 .IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ only)" 4
3188 .IX Item "-Wno-invalid-offsetof ( only)"
3189 Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
3190 type. According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
3191 to a non-POD type is undefined. In existing \*(C+ implementations,
3192 however, \fBoffsetof\fR typically gives meaningful results even when
3193 applied to certain kinds of non-POD types. (Such as a simple
3194 \&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
3195 constructor.) This flag is for users who are aware that they are
3196 writing nonportable code and who have deliberately chosen to ignore the
3199 The restrictions on \fBoffsetof\fR may be relaxed in a future version
3200 of the \*(C+ standard.
3201 .IP "\fB\-Wno\-int\-to\-pointer\-cast\fR (C only)" 4
3202 .IX Item "-Wno-int-to-pointer-cast (C only)"
3203 Suppress warnings from casts to pointer type of an integer of a
3205 .IP "\fB\-Wno\-pointer\-to\-int\-cast\fR (C only)" 4
3206 .IX Item "-Wno-pointer-to-int-cast (C only)"
3207 Suppress warnings from casts from a pointer to an integer type of a
3209 .IP "\fB\-Winvalid\-pch\fR" 4
3210 .IX Item "-Winvalid-pch"
3211 Warn if a precompiled header is found in
3212 the search path but can't be used.
3213 .IP "\fB\-Wlong\-long\fR" 4
3214 .IX Item "-Wlong-long"
3215 Warn if \fBlong long\fR type is used. This is default. To inhibit
3216 the warning messages, use \fB\-Wno\-long\-long\fR. Flags
3217 \&\fB\-Wlong\-long\fR and \fB\-Wno\-long\-long\fR are taken into account
3218 only when \fB\-pedantic\fR flag is used.
3219 .IP "\fB\-Wvariadic\-macros\fR" 4
3220 .IX Item "-Wvariadic-macros"
3221 Warn if variadic macros are used in pedantic \s-1ISO\s0 C90 mode, or the \s-1GNU\s0
3222 alternate syntax when in pedantic \s-1ISO\s0 C99 mode. This is default.
3223 To inhibit the warning messages, use \fB\-Wno\-variadic\-macros\fR.
3224 .IP "\fB\-Wvolatile\-register\-var\fR" 4
3225 .IX Item "-Wvolatile-register-var"
3226 Warn if a register variable is declared volatile. The volatile
3227 modifier does not inhibit all optimizations that may eliminate reads
3228 and/or writes to register variables.
3229 .IP "\fB\-Wdisabled\-optimization\fR" 4
3230 .IX Item "-Wdisabled-optimization"
3231 Warn if a requested optimization pass is disabled. This warning does
3232 not generally indicate that there is anything wrong with your code; it
3233 merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
3234 effectively. Often, the problem is that your code is too big or too
3235 complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
3236 itself is likely to take inordinate amounts of time.
3237 .IP "\fB\-Wpointer\-sign\fR" 4
3238 .IX Item "-Wpointer-sign"
3239 Warn for pointer argument passing or assignment with different signedness.
3240 This option is only supported for C and Objective\-C. It is implied by
3241 \&\fB\-Wall\fR and by \fB\-pedantic\fR, which can be disabled with
3242 \&\fB\-Wno\-pointer\-sign\fR.
3243 .IP "\fB\-Werror\fR" 4
3245 Make all warnings into errors.
3246 .IP "\fB\-Werror=\fR" 4
3248 Make the specified warning into an errors. The specifier for a
3249 warning is appended, for example \fB\-Werror=switch\fR turns the
3250 warnings controlled by \fB\-Wswitch\fR into errors. This switch
3251 takes a negative form, to be used to negate \fB\-Werror\fR for
3252 specific warnings, for example \fB\-Wno\-error=switch\fR makes
3253 \&\fB\-Wswitch\fR warnings not be errors, even when \fB\-Werror\fR
3254 is in effect. You can use the \fB\-fdiagnostics\-show\-option\fR
3255 option to have each controllable warning amended with the option which
3256 controls it, to determine what to use with this option.
3258 Note that specifying \fB\-Werror=\fR\fIfoo\fR automatically implies
3259 \&\fB\-W\fR\fIfoo\fR. However, \fB\-Wno\-error=\fR\fIfoo\fR does not
3261 .IP "\fB\-Werror\-maybe\-reset\fR" 4
3262 .IX Item "-Werror-maybe-reset"
3263 Act like \fB\-Wno\-error\fR if the \fB\s-1GCC_NO_WERROR\s0\fR environment
3264 variable is set to anything other than 0 or empty.
3265 .IP "\fB\-fhonour\-copts\fR" 4
3266 .IX Item "-fhonour-copts"
3267 If \fB\s-1GCC_HONOUR_COPTS\s0\fR is set to 1, abort if this option is not
3268 given at least once, and warn if it is given more than once.
3269 If \fB\s-1GCC_HONOUR_COPTS\s0\fR is set to 2, abort if this option is not
3271 If \fB\s-1GCC_HONOUR_COPTS\s0\fR is set to 0 or unset, warn if this option
3272 is not given exactly once.
3273 The warning is quelled if \fB\s-1GCC_HONOUR_COPTS\s0\fR is set to \fBs\fR.
3274 This flag and environment variable only affect the C language.
3275 .IP "\fB\-Wstack\-protector\fR" 4
3276 .IX Item "-Wstack-protector"
3277 This option is only active when \fB\-fstack\-protector\fR is active. It
3278 warns about functions that will not be protected against stack smashing.
3279 .IP "\fB\-Woverlength\-strings\fR" 4
3280 .IX Item "-Woverlength-strings"
3281 Warn about string constants which are longer than the \*(L"minimum
3282 maximum\*(R" length specified in the C standard. Modern compilers
3283 generally allow string constants which are much longer than the
3284 standard's minimum limit, but very portable programs should avoid
3285 using longer strings.
3287 The limit applies \fIafter\fR string constant concatenation, and does
3288 not count the trailing \s-1NUL\s0. In C89, the limit was 509 characters; in
3289 C99, it was raised to 4095. \*(C+98 does not specify a normative
3290 minimum maximum, so we do not diagnose overlength strings in \*(C+.
3292 This option is implied by \fB\-pedantic\fR, and can be disabled with
3293 \&\fB\-Wno\-overlength\-strings\fR.
3294 .Sh "Options for Debugging Your Program or \s-1GCC\s0"
3295 .IX Subsection "Options for Debugging Your Program or GCC"
3296 \&\s-1GCC\s0 has various special options that are used for debugging
3297 either your program or \s-1GCC:\s0
3300 Produce debugging information in the operating system's native format
3301 (stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0 2). \s-1GDB\s0 can work with this debugging
3304 On most systems that use stabs format, \fB\-g\fR enables use of extra
3305 debugging information that only \s-1GDB\s0 can use; this extra information
3306 makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
3308 refuse to read the program. If you want to control for certain whether
3309 to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
3310 \&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
3312 \&\s-1GCC\s0 allows you to use \fB\-g\fR with
3313 \&\fB\-O\fR. The shortcuts taken by optimized code may occasionally
3314 produce surprising results: some variables you declared may not exist
3315 at all; flow of control may briefly move where you did not expect it;
3316 some statements may not be executed because they compute constant
3317 results or their values were already at hand; some statements may
3318 execute in different places because they were moved out of loops.
3320 Nevertheless it proves possible to debug optimized output. This makes
3321 it reasonable to use the optimizer for programs that might have bugs.
3323 The following options are useful when \s-1GCC\s0 is generated with the
3324 capability for more than one debugging format.
3325 .IP "\fB\-ggdb\fR" 4
3327 Produce debugging information for use by \s-1GDB\s0. This means to use the
3328 most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
3329 if neither of those are supported), including \s-1GDB\s0 extensions if at all
3331 .IP "\fB\-gstabs\fR" 4
3333 Produce debugging information in stabs format (if that is supported),
3334 without \s-1GDB\s0 extensions. This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
3335 systems. On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
3336 produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
3337 On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
3338 .IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
3339 .IX Item "-feliminate-unused-debug-symbols"
3340 Produce debugging information in stabs format (if that is supported),
3341 for only symbols that are actually used.
3342 .IP "\fB\-femit\-class\-debug\-always\fR" 4
3343 .IX Item "-femit-class-debug-always"
3344 Instead of emitting debugging information for a \*(C+ class in only one
3345 object file, emit it in all object files using the class. This option
3346 should be used only with debuggers that are unable to handle the way \s-1GCC\s0
3347 normally emits debugging information for classes because using this
3348 option will increase the size of debugging information by as much as a
3350 .IP "\fB\-gstabs+\fR" 4
3352 Produce debugging information in stabs format (if that is supported),
3353 using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
3354 use of these extensions is likely to make other debuggers crash or
3355 refuse to read the program.
3356 .IP "\fB\-gcoff\fR" 4
3358 Produce debugging information in \s-1COFF\s0 format (if that is supported).
3359 This is the format used by \s-1SDB\s0 on most System V systems prior to
3361 .IP "\fB\-gxcoff\fR" 4
3363 Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
3364 This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
3365 .IP "\fB\-gxcoff+\fR" 4
3367 Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
3368 using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0). The
3369 use of these extensions is likely to make other debuggers crash or
3370 refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
3371 assembler (\s-1GAS\s0) to fail with an error.
3372 .IP "\fB\-gdwarf\-2\fR" 4
3373 .IX Item "-gdwarf-2"
3374 Produce debugging information in \s-1DWARF\s0 version 2 format (if that is
3375 supported). This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6. With this
3376 option, \s-1GCC\s0 uses features of \s-1DWARF\s0 version 3 when they are useful;
3377 version 3 is upward compatible with version 2, but may still cause
3378 problems for older debuggers.
3379 .IP "\fB\-gvms\fR" 4
3381 Produce debugging information in \s-1VMS\s0 debug format (if that is
3382 supported). This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
3383 .IP "\fB\-g\fR\fIlevel\fR" 4
3386 .IP "\fB\-ggdb\fR\fIlevel\fR" 4
3387 .IX Item "-ggdblevel"
3388 .IP "\fB\-gstabs\fR\fIlevel\fR" 4
3389 .IX Item "-gstabslevel"
3390 .IP "\fB\-gcoff\fR\fIlevel\fR" 4
3391 .IX Item "-gcofflevel"
3392 .IP "\fB\-gxcoff\fR\fIlevel\fR" 4
3393 .IX Item "-gxcofflevel"
3394 .IP "\fB\-gvms\fR\fIlevel\fR" 4
3395 .IX Item "-gvmslevel"
3397 Request debugging information and also use \fIlevel\fR to specify how
3398 much information. The default level is 2.
3400 Level 1 produces minimal information, enough for making backtraces in
3401 parts of the program that you don't plan to debug. This includes
3402 descriptions of functions and external variables, but no information
3403 about local variables and no line numbers.
3405 Level 3 includes extra information, such as all the macro definitions
3406 present in the program. Some debuggers support macro expansion when
3409 \&\fB\-gdwarf\-2\fR does not accept a concatenated debug level, because
3410 \&\s-1GCC\s0 used to support an option \fB\-gdwarf\fR that meant to generate
3411 debug information in version 1 of the \s-1DWARF\s0 format (which is very
3412 different from version 2), and it would have been too confusing. That
3413 debug format is long obsolete, but the option cannot be changed now.
3414 Instead use an additional \fB\-g\fR\fIlevel\fR option to change the
3415 debug level for \s-1DWARF2\s0.
3416 .IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
3417 .IX Item "-feliminate-dwarf2-dups"
3418 Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
3419 information about each symbol. This option only makes sense when
3420 generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
3423 Generate extra code to write profile information suitable for the
3424 analysis program \fBprof\fR. You must use this option when compiling
3425 the source files you want data about, and you must also use it when
3429 Generate extra code to write profile information suitable for the
3430 analysis program \fBgprof\fR. You must use this option when compiling
3431 the source files you want data about, and you must also use it when
3435 Makes the compiler print out each function name as it is compiled, and
3436 print some statistics about each pass when it finishes.
3437 .IP "\fB\-ftime\-report\fR" 4
3438 .IX Item "-ftime-report"
3439 Makes the compiler print some statistics about the time consumed by each
3440 pass when it finishes.
3441 .IP "\fB\-fmem\-report\fR" 4
3442 .IX Item "-fmem-report"
3443 Makes the compiler print some statistics about permanent memory
3444 allocation when it finishes.
3445 .IP "\fB\-fprofile\-arcs\fR" 4
3446 .IX Item "-fprofile-arcs"
3447 Add code so that program flow \fIarcs\fR are instrumented. During
3448 execution the program records how many times each branch and call is
3449 executed and how many times it is taken or returns. When the compiled
3450 program exits it saves this data to a file called
3451 \&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for
3452 profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
3453 test coverage analysis (\fB\-ftest\-coverage\fR). Each object file's
3454 \&\fIauxname\fR is generated from the name of the output file, if
3455 explicitly specified and it is not the final executable, otherwise it is
3456 the basename of the source file. In both cases any suffix is removed
3457 (e.g. \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
3458 \&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
3459 .IP "\fB\-\-coverage\fR" 4
3460 .IX Item "--coverage"
3461 This option is used to compile and link code instrumented for coverage
3462 analysis. The option is a synonym for \fB\-fprofile\-arcs\fR
3463 \&\fB\-ftest\-coverage\fR (when compiling) and \fB\-lgcov\fR (when
3464 linking). See the documentation for those options for more details.
3467 Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
3468 and code generation options. For test coverage analysis, use the
3469 additional \fB\-ftest\-coverage\fR option. You do not need to profile
3470 every source file in a program.
3472 Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
3473 (the latter implies the former).
3475 Run the program on a representative workload to generate the arc profile
3476 information. This may be repeated any number of times. You can run
3477 concurrent instances of your program, and provided that the file system
3478 supports locking, the data files will be correctly updated. Also
3479 \&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
3482 For profile-directed optimizations, compile the source files again with
3483 the same optimization and code generation options plus
3484 \&\fB\-fbranch\-probabilities\fR.
3486 For test coverage analysis, use \fBgcov\fR to produce human readable
3487 information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the
3488 \&\fBgcov\fR documentation for further information.
3492 With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
3493 creates a program flow graph, then finds a spanning tree for the graph.
3494 Only arcs that are not on the spanning tree have to be instrumented: the
3495 compiler adds code to count the number of times that these arcs are
3496 executed. When an arc is the only exit or only entrance to a block, the
3497 instrumentation code can be added to the block; otherwise, a new basic
3498 block must be created to hold the instrumentation code.
3500 .IP "\fB\-ftest\-coverage\fR" 4
3501 .IX Item "-ftest-coverage"
3502 Produce a notes file that the \fBgcov\fR code-coverage utility can use to
3503 show program coverage. Each source file's note file is called
3504 \&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile\-arcs\fR option
3505 above for a description of \fIauxname\fR and instructions on how to
3506 generate test coverage data. Coverage data will match the source files
3507 more closely, if you do not optimize.
3508 .IP "\fB\-d\fR\fIletters\fR" 4
3509 .IX Item "-dletters"
3511 .IP "\fB\-fdump\-rtl\-\fR\fIpass\fR" 4
3512 .IX Item "-fdump-rtl-pass"
3514 Says to make debugging dumps during compilation at times specified by
3515 \&\fIletters\fR. This is used for debugging the RTL-based passes of the
3516 compiler. The file names for most of the dumps are made by appending a
3517 pass number and a word to the \fIdumpname\fR. \fIdumpname\fR is generated
3518 from the name of the output file, if explicitly specified and it is not
3519 an executable, otherwise it is the basename of the source file.
3521 Most debug dumps can be enabled either passing a letter to the \fB\-d\fR
3522 option, or with a long \fB\-fdump\-rtl\fR switch; here are the possible
3523 letters for use in \fIletters\fR and \fIpass\fR, and their meanings:
3527 Annotate the assembler output with miscellaneous debugging information.
3531 .IP "\fB\-fdump\-rtl\-bbro\fR" 4
3532 .IX Item "-fdump-rtl-bbro"
3534 Dump after block reordering, to \fI\fIfile\fI.148r.bbro\fR.
3538 .IP "\fB\-fdump\-rtl\-combine\fR" 4
3539 .IX Item "-fdump-rtl-combine"
3541 Dump after instruction combination, to the file \fI\fIfile\fI.129r.combine\fR.
3545 .IP "\fB\-fdump\-rtl\-ce1\fR" 4
3546 .IX Item "-fdump-rtl-ce1"
3547 .IP "\fB\-fdump\-rtl\-ce2\fR" 4
3548 .IX Item "-fdump-rtl-ce2"
3550 \&\fB\-dC\fR and \fB\-fdump\-rtl\-ce1\fR enable dumping after the
3551 first if conversion, to the file \fI\fIfile\fI.117r.ce1\fR. \fB\-dC\fR
3552 and \fB\-fdump\-rtl\-ce2\fR enable dumping after the second if
3553 conversion, to the file \fI\fIfile\fI.130r.ce2\fR.
3557 .IP "\fB\-fdump\-rtl\-btl\fR" 4
3558 .IX Item "-fdump-rtl-btl"
3559 .IP "\fB\-fdump\-rtl\-dbr\fR" 4
3560 .IX Item "-fdump-rtl-dbr"
3562 \&\fB\-dd\fR and \fB\-fdump\-rtl\-btl\fR enable dumping after branch
3563 target load optimization, to \fI\fIfile\fI.31.btl\fR. \fB\-dd\fR
3564 and \fB\-fdump\-rtl\-dbr\fR enable dumping after delayed branch
3565 scheduling, to \fI\fIfile\fI.36.dbr\fR.
3568 Dump all macro definitions, at the end of preprocessing, in addition to
3573 .IP "\fB\-fdump\-rtl\-ce3\fR" 4
3574 .IX Item "-fdump-rtl-ce3"
3576 Dump after the third if conversion, to \fI\fIfile\fI.146r.ce3\fR.
3580 .IP "\fB\-fdump\-rtl\-cfg\fR" 4
3581 .IX Item "-fdump-rtl-cfg"
3582 .IP "\fB\-fdump\-rtl\-life\fR" 4
3583 .IX Item "-fdump-rtl-life"
3585 \&\fB\-df\fR and \fB\-fdump\-rtl\-cfg\fR enable dumping after control
3586 and data flow analysis, to \fI\fIfile\fI.116r.cfg\fR. \fB\-df\fR
3587 and \fB\-fdump\-rtl\-cfg\fR enable dumping dump after life analysis,
3588 to \fI\fIfile\fI.128r.life1\fR and \fI\fIfile\fI.135r.life2\fR.
3592 .IP "\fB\-fdump\-rtl\-greg\fR" 4
3593 .IX Item "-fdump-rtl-greg"
3595 Dump after global register allocation, to \fI\fIfile\fI.139r.greg\fR.
3599 .IP "\fB\-fdump\-rtl\-gcse\fR" 4
3600 .IX Item "-fdump-rtl-gcse"
3601 .IP "\fB\-fdump\-rtl\-bypass\fR" 4
3602 .IX Item "-fdump-rtl-bypass"
3604 \&\fB\-dG\fR and \fB\-fdump\-rtl\-gcse\fR enable dumping after \s-1GCSE\s0, to
3605 \&\fI\fIfile\fI.114r.gcse\fR. \fB\-dG\fR and \fB\-fdump\-rtl\-bypass\fR
3606 enable dumping after jump bypassing and control flow optimizations, to
3607 \&\fI\fIfile\fI.115r.bypass\fR.
3611 .IP "\fB\-fdump\-rtl\-eh\fR" 4
3612 .IX Item "-fdump-rtl-eh"
3614 Dump after finalization of \s-1EH\s0 handling code, to \fI\fIfile\fI.02.eh\fR.
3618 .IP "\fB\-fdump\-rtl\-sibling\fR" 4
3619 .IX Item "-fdump-rtl-sibling"
3621 Dump after sibling call optimizations, to \fI\fIfile\fI.106r.sibling\fR.
3625 .IP "\fB\-fdump\-rtl\-jump\fR" 4
3626 .IX Item "-fdump-rtl-jump"
3628 Dump after the first jump optimization, to \fI\fIfile\fI.112r.jump\fR.
3632 .IP "\fB\-fdump\-rtl\-stack\fR" 4
3633 .IX Item "-fdump-rtl-stack"
3635 Dump after conversion from registers to stack, to \fI\fIfile\fI.152r.stack\fR.
3639 .IP "\fB\-fdump\-rtl\-lreg\fR" 4
3640 .IX Item "-fdump-rtl-lreg"
3642 Dump after local register allocation, to \fI\fIfile\fI.138r.lreg\fR.
3646 .IP "\fB\-fdump\-rtl\-loop2\fR" 4
3647 .IX Item "-fdump-rtl-loop2"
3649 \&\fB\-dL\fR and \fB\-fdump\-rtl\-loop2\fR enable dumping after the
3650 loop optimization pass, to \fI\fIfile\fI.119r.loop2\fR,
3651 \&\fI\fIfile\fI.120r.loop2_init\fR,
3652 \&\fI\fIfile\fI.121r.loop2_invariant\fR, and
3653 \&\fI\fIfile\fI.125r.loop2_done\fR.
3657 .IP "\fB\-fdump\-rtl\-sms\fR" 4
3658 .IX Item "-fdump-rtl-sms"
3660 Dump after modulo scheduling, to \fI\fIfile\fI.136r.sms\fR.
3664 .IP "\fB\-fdump\-rtl\-mach\fR" 4
3665 .IX Item "-fdump-rtl-mach"
3667 Dump after performing the machine dependent reorganization pass, to
3668 \&\fI\fIfile\fI.155r.mach\fR.
3672 .IP "\fB\-fdump\-rtl\-rnreg\fR" 4
3673 .IX Item "-fdump-rtl-rnreg"
3675 Dump after register renumbering, to \fI\fIfile\fI.147r.rnreg\fR.
3679 .IP "\fB\-fdump\-rtl\-regmove\fR" 4
3680 .IX Item "-fdump-rtl-regmove"
3682 Dump after the register move pass, to \fI\fIfile\fI.132r.regmove\fR.
3686 .IP "\fB\-fdump\-rtl\-postreload\fR" 4
3687 .IX Item "-fdump-rtl-postreload"
3689 Dump after post-reload optimizations, to \fI\fIfile\fI.24.postreload\fR.
3693 .IP "\fB\-fdump\-rtl\-expand\fR" 4
3694 .IX Item "-fdump-rtl-expand"
3696 Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.104r.expand\fR.
3700 .IP "\fB\-fdump\-rtl\-sched2\fR" 4
3701 .IX Item "-fdump-rtl-sched2"
3703 Dump after the second scheduling pass, to \fI\fIfile\fI.150r.sched2\fR.
3707 .IP "\fB\-fdump\-rtl\-cse\fR" 4
3708 .IX Item "-fdump-rtl-cse"
3710 Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows
3711 \&\s-1CSE\s0), to \fI\fIfile\fI.113r.cse\fR.
3715 .IP "\fB\-fdump\-rtl\-sched\fR" 4
3716 .IX Item "-fdump-rtl-sched"
3718 Dump after the first scheduling pass, to \fI\fIfile\fI.21.sched\fR.
3722 .IP "\fB\-fdump\-rtl\-cse2\fR" 4
3723 .IX Item "-fdump-rtl-cse2"
3725 Dump after the second \s-1CSE\s0 pass (including the jump optimization that
3726 sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.127r.cse2\fR.
3730 .IP "\fB\-fdump\-rtl\-tracer\fR" 4
3731 .IX Item "-fdump-rtl-tracer"
3733 Dump after running tracer, to \fI\fIfile\fI.118r.tracer\fR.
3737 .IP "\fB\-fdump\-rtl\-vpt\fR" 4
3738 .IX Item "-fdump-rtl-vpt"
3739 .IP "\fB\-fdump\-rtl\-vartrack\fR" 4
3740 .IX Item "-fdump-rtl-vartrack"
3742 \&\fB\-dV\fR and \fB\-fdump\-rtl\-vpt\fR enable dumping after the value
3743 profile transformations, to \fI\fIfile\fI.10.vpt\fR. \fB\-dV\fR
3744 and \fB\-fdump\-rtl\-vartrack\fR enable dumping after variable tracking,
3745 to \fI\fIfile\fI.154r.vartrack\fR.
3749 .IP "\fB\-fdump\-rtl\-flow2\fR" 4
3750 .IX Item "-fdump-rtl-flow2"
3752 Dump after the second flow pass, to \fI\fIfile\fI.142r.flow2\fR.
3756 .IP "\fB\-fdump\-rtl\-peephole2\fR" 4
3757 .IX Item "-fdump-rtl-peephole2"
3759 Dump after the peephole pass, to \fI\fIfile\fI.145r.peephole2\fR.
3763 .IP "\fB\-fdump\-rtl\-web\fR" 4
3764 .IX Item "-fdump-rtl-web"
3766 Dump after live range splitting, to \fI\fIfile\fI.126r.web\fR.
3770 .IP "\fB\-fdump\-rtl\-all\fR" 4
3771 .IX Item "-fdump-rtl-all"
3773 Produce all the dumps listed above.
3776 Produce a core dump whenever an error occurs.
3779 Print statistics on memory usage, at the end of the run, to
3783 Annotate the assembler output with a comment indicating which
3784 pattern and alternative was used. The length of each instruction is
3788 Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
3789 Also turns on \fB\-dp\fR annotation.
3792 For each of the other indicated dump files (either with \fB\-d\fR or
3793 \&\fB\-fdump\-rtl\-\fR\fIpass\fR), dump a representation of the control flow
3794 graph suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
3797 Just generate \s-1RTL\s0 for a function instead of compiling it. Usually used
3798 with \fBr\fR (\fB\-fdump\-rtl\-expand\fR).
3801 Dump debugging information during parsing, to standard error.
3805 .IP "\fB\-fdump\-noaddr\fR" 4
3806 .IX Item "-fdump-noaddr"
3807 When doing debugging dumps (see \fB\-d\fR option above), suppress
3808 address output. This makes it more feasible to use diff on debugging
3809 dumps for compiler invocations with different compiler binaries and/or
3810 different text / bss / data / heap / stack / dso start locations.
3811 .IP "\fB\-fdump\-unnumbered\fR" 4
3812 .IX Item "-fdump-unnumbered"
3813 When doing debugging dumps (see \fB\-d\fR option above), suppress instruction
3814 numbers, line number note and address output. This makes it more feasible to
3815 use diff on debugging dumps for compiler invocations with different
3816 options, in particular with and without \fB\-g\fR.
3817 .IP "\fB\-fdump\-translation\-unit\fR (\*(C+ only)" 4
3818 .IX Item "-fdump-translation-unit ( only)"
3820 .IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
3821 .IX Item "-fdump-translation-unit-options ( only)"
3823 Dump a representation of the tree structure for the entire translation
3824 unit to a file. The file name is made by appending \fI.tu\fR to the
3825 source file name. If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
3826 controls the details of the dump as described for the
3827 \&\fB\-fdump\-tree\fR options.
3828 .IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
3829 .IX Item "-fdump-class-hierarchy ( only)"
3831 .IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
3832 .IX Item "-fdump-class-hierarchy-options ( only)"
3834 Dump a representation of each class's hierarchy and virtual function
3835 table layout to a file. The file name is made by appending \fI.class\fR
3836 to the source file name. If the \fB\-\fR\fIoptions\fR form is used,
3837 \&\fIoptions\fR controls the details of the dump as described for the
3838 \&\fB\-fdump\-tree\fR options.
3839 .IP "\fB\-fdump\-ipa\-\fR\fIswitch\fR" 4
3840 .IX Item "-fdump-ipa-switch"
3841 Control the dumping at various stages of inter-procedural analysis
3842 language tree to a file. The file name is generated by appending a switch
3843 specific suffix to the source file name. The following dumps are possible:
3847 Enables all inter-procedural analysis dumps.
3848 .IP "\fBcgraph\fR" 4
3850 Dumps information about call-graph optimization, unused function removal,
3851 and inlining decisions.
3852 .IP "\fBinline\fR" 4
3854 Dump after function inlining.
3858 .IP "\fB\-fdump\-tree\-\fR\fIswitch\fR" 4
3859 .IX Item "-fdump-tree-switch"
3861 .IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR" 4
3862 .IX Item "-fdump-tree-switch-options"
3864 Control the dumping at various stages of processing the intermediate
3865 language tree to a file. The file name is generated by appending a switch
3866 specific suffix to the source file name. If the \fB\-\fR\fIoptions\fR
3867 form is used, \fIoptions\fR is a list of \fB\-\fR separated options that
3868 control the details of the dump. Not all options are applicable to all
3869 dumps, those which are not meaningful will be ignored. The following
3870 options are available
3872 .IP "\fBaddress\fR" 4
3874 Print the address of each node. Usually this is not meaningful as it
3875 changes according to the environment and source file. Its primary use
3876 is for tying up a dump file with a debug environment.
3879 Inhibit dumping of members of a scope or body of a function merely
3880 because that scope has been reached. Only dump such items when they
3881 are directly reachable by some other path. When dumping pretty-printed
3882 trees, this option inhibits dumping the bodies of control structures.
3885 Print a raw representation of the tree. By default, trees are
3886 pretty-printed into a C\-like representation.
3887 .IP "\fBdetails\fR" 4
3889 Enable more detailed dumps (not honored by every dump option).
3892 Enable dumping various statistics about the pass (not honored by every dump
3894 .IP "\fBblocks\fR" 4
3896 Enable showing basic block boundaries (disabled in raw dumps).
3899 Enable showing virtual operands for every statement.
3900 .IP "\fBlineno\fR" 4
3902 Enable showing line numbers for statements.
3905 Enable showing the unique \s-1ID\s0 (\f(CW\*(C`DECL_UID\*(C'\fR) for each variable.
3908 Turn on all options, except \fBraw\fR, \fBslim\fR and \fBlineno\fR.
3912 The following tree dumps are possible:
3913 .IP "\fBoriginal\fR" 4
3915 Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
3916 .IP "\fBoptimized\fR" 4
3917 .IX Item "optimized"
3918 Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
3919 .IP "\fBgimple\fR" 4
3921 Dump each function before and after the gimplification pass to a file. The
3922 file name is made by appending \fI.gimple\fR to the source file name.
3925 Dump the control flow graph of each function to a file. The file name is
3926 made by appending \fI.cfg\fR to the source file name.
3929 Dump the control flow graph of each function to a file in \s-1VCG\s0 format. The
3930 file name is made by appending \fI.vcg\fR to the source file name. Note
3931 that if the file contains more than one function, the generated file cannot
3932 be used directly by \s-1VCG\s0. You will need to cut and paste each function's
3933 graph into its own separate file first.
3936 Dump each function after copying loop headers. The file name is made by
3937 appending \fI.ch\fR to the source file name.
3940 Dump \s-1SSA\s0 related information to a file. The file name is made by appending
3941 \&\fI.ssa\fR to the source file name.
3942 .IP "\fBsalias\fR" 4
3944 Dump structure aliasing variable information to a file. This file name
3945 is made by appending \fI.salias\fR to the source file name.
3948 Dump aliasing information for each function. The file name is made by
3949 appending \fI.alias\fR to the source file name.
3952 Dump each function after \s-1CCP\s0. The file name is made by appending
3953 \&\fI.ccp\fR to the source file name.
3954 .IP "\fBstoreccp\fR" 4
3956 Dump each function after \s-1STORE\-CCP\s0. The file name is made by appending
3957 \&\fI.storeccp\fR to the source file name.
3960 Dump trees after partial redundancy elimination. The file name is made
3961 by appending \fI.pre\fR to the source file name.
3964 Dump trees after full redundancy elimination. The file name is made
3965 by appending \fI.fre\fR to the source file name.
3966 .IP "\fBcopyprop\fR" 4
3968 Dump trees after copy propagation. The file name is made
3969 by appending \fI.copyprop\fR to the source file name.
3970 .IP "\fBstore_copyprop\fR" 4
3971 .IX Item "store_copyprop"
3972 Dump trees after store copy\-propagation. The file name is made
3973 by appending \fI.store_copyprop\fR to the source file name.
3976 Dump each function after dead code elimination. The file name is made by
3977 appending \fI.dce\fR to the source file name.
3978 .IP "\fBmudflap\fR" 4
3980 Dump each function after adding mudflap instrumentation. The file name is
3981 made by appending \fI.mudflap\fR to the source file name.
3984 Dump each function after performing scalar replacement of aggregates. The
3985 file name is made by appending \fI.sra\fR to the source file name.
3988 Dump each function after performing code sinking. The file name is made
3989 by appending \fI.sink\fR to the source file name.
3992 Dump each function after applying dominator tree optimizations. The file
3993 name is made by appending \fI.dom\fR to the source file name.
3996 Dump each function after applying dead store elimination. The file
3997 name is made by appending \fI.dse\fR to the source file name.
3998 .IP "\fBphiopt\fR" 4
4000 Dump each function after optimizing \s-1PHI\s0 nodes into straightline code. The file
4001 name is made by appending \fI.phiopt\fR to the source file name.
4002 .IP "\fBforwprop\fR" 4
4004 Dump each function after forward propagating single use variables. The file
4005 name is made by appending \fI.forwprop\fR to the source file name.
4006 .IP "\fBcopyrename\fR" 4
4007 .IX Item "copyrename"
4008 Dump each function after applying the copy rename optimization. The file
4009 name is made by appending \fI.copyrename\fR to the source file name.
4012 Dump each function after applying the named return value optimization on
4013 generic trees. The file name is made by appending \fI.nrv\fR to the source
4017 Dump each function after applying vectorization of loops. The file name is
4018 made by appending \fI.vect\fR to the source file name.
4021 Dump each function after Value Range Propagation (\s-1VRP\s0). The file name
4022 is made by appending \fI.vrp\fR to the source file name.
4025 Enable all the available tree dumps with the flags provided in this option.
4029 .IP "\fB\-ftree\-vectorizer\-verbose=\fR\fIn\fR" 4
4030 .IX Item "-ftree-vectorizer-verbose=n"
4031 This option controls the amount of debugging output the vectorizer prints.
4032 This information is written to standard error, unless
4033 \&\fB\-fdump\-tree\-all\fR or \fB\-fdump\-tree\-vect\fR is specified,
4034 in which case it is output to the usual dump listing file, \fI.vect\fR.
4035 For \fIn\fR=0 no diagnostic information is reported.
4036 If \fIn\fR=1 the vectorizer reports each loop that got vectorized,
4037 and the total number of loops that got vectorized.
4038 If \fIn\fR=2 the vectorizer also reports non-vectorized loops that passed
4039 the first analysis phase (vect_analyze_loop_form) \- i.e. countable,
4040 inner\-most, single\-bb, single\-entry/exit loops. This is the same verbosity
4041 level that \fB\-fdump\-tree\-vect\-stats\fR uses.
4042 Higher verbosity levels mean either more information dumped for each
4043 reported loop, or same amount of information reported for more loops:
4044 If \fIn\fR=3, alignment related information is added to the reports.
4045 If \fIn\fR=4, data-references related information (e.g. memory dependences,
4046 memory access\-patterns) is added to the reports.
4047 If \fIn\fR=5, the vectorizer reports also non-vectorized inner-most loops
4048 that did not pass the first analysis phase (i.e. may not be countable, or
4049 may have complicated control\-flow).
4050 If \fIn\fR=6, the vectorizer reports also non-vectorized nested loops.
4051 For \fIn\fR=7, all the information the vectorizer generates during its
4052 analysis and transformation is reported. This is the same verbosity level
4053 that \fB\-fdump\-tree\-vect\-details\fR uses.
4054 .IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
4055 .IX Item "-frandom-seed=string"
4056 This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
4057 random numbers. It is used to generate certain symbol names
4058 that have to be different in every compiled file. It is also used to
4059 place unique stamps in coverage data files and the object files that
4060 produce them. You can use the \fB\-frandom\-seed\fR option to produce
4061 reproducibly identical object files.
4063 The \fIstring\fR should be different for every file you compile.
4064 .IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
4065 .IX Item "-fsched-verbose=n"
4066 On targets that use instruction scheduling, this option controls the
4067 amount of debugging output the scheduler prints. This information is
4068 written to standard error, unless \fB\-dS\fR or \fB\-dR\fR is
4069 specified, in which case it is output to the usual dump
4070 listing file, \fI.sched\fR or \fI.sched2\fR respectively. However
4071 for \fIn\fR greater than nine, the output is always printed to standard
4074 For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
4075 same information as \fB\-dRS\fR. For \fIn\fR greater than one, it
4076 also output basic block probabilities, detailed ready list information
4077 and unit/insn info. For \fIn\fR greater than two, it includes \s-1RTL\s0
4078 at abort point, control-flow and regions info. And for \fIn\fR over
4079 four, \fB\-fsched\-verbose\fR also includes dependence info.
4080 .IP "\fB\-save\-temps\fR" 4
4081 .IX Item "-save-temps"
4082 Store the usual \*(L"temporary\*(R" intermediate files permanently; place them
4083 in the current directory and name them based on the source file. Thus,
4084 compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
4085 \&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR. This creates a
4086 preprocessed \fIfoo.i\fR output file even though the compiler now
4087 normally uses an integrated preprocessor.
4089 When used in combination with the \fB\-x\fR command line option,
4090 \&\fB\-save\-temps\fR is sensible enough to avoid over writing an
4091 input source file with the same extension as an intermediate file.
4092 The corresponding intermediate file may be obtained by renaming the
4093 source file before using \fB\-save\-temps\fR.
4094 .IP "\fB\-time\fR" 4
4096 Report the \s-1CPU\s0 time taken by each subprocess in the compilation
4097 sequence. For C source files, this is the compiler proper and assembler
4098 (plus the linker if linking is done). The output looks like this:
4105 The first number on each line is the \*(L"user time\*(R", that is time spent
4106 executing the program itself. The second number is \*(L"system time\*(R",
4107 time spent executing operating system routines on behalf of the program.
4108 Both numbers are in seconds.
4109 .IP "\fB\-fvar\-tracking\fR" 4
4110 .IX Item "-fvar-tracking"
4111 Run variable tracking pass. It computes where variables are stored at each
4112 position in code. Better debugging information is then generated
4113 (if the debugging information format supports this information).
4115 It is enabled by default when compiling with optimization (\fB\-Os\fR,
4116 \&\fB\-O\fR, \fB\-O2\fR, ...), debugging information (\fB\-g\fR) and
4117 the debug info format supports it.
4118 .IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
4119 .IX Item "-print-file-name=library"
4120 Print the full absolute name of the library file \fIlibrary\fR that
4121 would be used when linking\-\-\-and don't do anything else. With this
4122 option, \s-1GCC\s0 does not compile or link anything; it just prints the
4124 .IP "\fB\-print\-multi\-directory\fR" 4
4125 .IX Item "-print-multi-directory"
4126 Print the directory name corresponding to the multilib selected by any
4127 other switches present in the command line. This directory is supposed
4128 to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
4129 .IP "\fB\-print\-multi\-lib\fR" 4
4130 .IX Item "-print-multi-lib"
4131 Print the mapping from multilib directory names to compiler switches
4132 that enable them. The directory name is separated from the switches by
4133 \&\fB;\fR, and each switch starts with an \fB@} instead of the
4134 \&\f(CB@samp\fB{\-\fR, without spaces between multiple switches. This is supposed to
4135 ease shell\-processing.
4136 .IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
4137 .IX Item "-print-prog-name=program"
4138 Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
4139 .IP "\fB\-print\-libgcc\-file\-name\fR" 4
4140 .IX Item "-print-libgcc-file-name"
4141 Same as \fB\-print\-file\-name=libgcc.a\fR.
4143 This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
4144 but you do want to link with \fIlibgcc.a\fR. You can do
4147 \& gcc \-nostdlib <files>... `gcc \-print\-libgcc\-file\-name`
4149 .IP "\fB\-print\-search\-dirs\fR" 4
4150 .IX Item "-print-search-dirs"
4151 Print the name of the configured installation directory and a list of
4152 program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
4154 This is useful when \fBgcc\fR prints the error message
4155 \&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
4156 To resolve this you either need to put \fIcpp0\fR and the other compiler
4157 components where \fBgcc\fR expects to find them, or you can set the environment
4158 variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
4159 Don't forget the trailing \fB/\fR.
4160 .IP "\fB\-dumpmachine\fR" 4
4161 .IX Item "-dumpmachine"
4162 Print the compiler's target machine (for example,
4163 \&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
4164 .IP "\fB\-dumpversion\fR" 4
4165 .IX Item "-dumpversion"
4166 Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
4168 .IP "\fB\-dumpspecs\fR" 4
4169 .IX Item "-dumpspecs"
4170 Print the compiler's built-in specs\-\-\-and don't do anything else. (This
4171 is used when \s-1GCC\s0 itself is being built.)
4172 .IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
4173 .IX Item "-feliminate-unused-debug-types"
4174 Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
4175 information for all types declared in a compilation
4176 unit, regardless of whether or not they are actually used
4177 in that compilation unit. Sometimes this is useful, such as
4178 if, in the debugger, you want to cast a value to a type that is
4179 not actually used in your program (but is declared). More often,
4180 however, this results in a significant amount of wasted space.
4181 With this option, \s-1GCC\s0 will avoid producing debug symbol output
4182 for types that are nowhere used in the source file being compiled.
4183 .Sh "Options That Control Optimization"
4184 .IX Subsection "Options That Control Optimization"
4185 These options control various sorts of optimizations.
4187 Without any optimization option, the compiler's goal is to reduce the
4188 cost of compilation and to make debugging produce the expected
4189 results. Statements are independent: if you stop the program with a
4190 breakpoint between statements, you can then assign a new value to any
4191 variable or change the program counter to any other statement in the
4192 function and get exactly the results you would expect from the source
4195 Turning on optimization flags makes the compiler attempt to improve
4196 the performance and/or code size at the expense of compilation time
4197 and possibly the ability to debug the program.
4199 The compiler performs optimization based on the knowledge it has of
4200 the program. Optimization levels \fB\-O\fR and above, in
4201 particular, enable \fIunit-at-a-time\fR mode, which allows the
4202 compiler to consider information gained from later functions in
4203 the file when compiling a function. Compiling multiple files at
4204 once to a single output file in \fIunit-at-a-time\fR mode allows
4205 the compiler to use information gained from all of the files when
4206 compiling each of them.
4208 Not all optimizations are controlled directly by a flag. Only
4209 optimizations that have a flag are listed.
4216 Optimize. Optimizing compilation takes somewhat more time, and a lot
4217 more memory for a large function.
4219 With \fB\-O\fR, the compiler tries to reduce code size and execution
4220 time, without performing any optimizations that take a great deal of
4223 \&\fB\-O\fR turns on the following optimization flags:
4225 \&\-fdelayed\-branch
4226 \&\-fguess\-branch\-probability
4227 \&\-fcprop\-registers
4229 \&\-fif\-conversion2
4232 \&\-ftree\-dominator\-opts
4237 \&\-ftree\-copyrename
4240 \&\-funit\-at\-a\-time
4241 \&\-fmerge\-constants\fR
4243 \&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
4244 where doing so does not interfere with debugging.
4247 Optimize even more. \s-1GCC\s0 performs nearly all supported optimizations
4248 that do not involve a space-speed tradeoff. The compiler does not
4249 perform loop unrolling or function inlining when you specify \fB\-O2\fR.
4250 As compared to \fB\-O\fR, this option increases both compilation time
4251 and the performance of the generated code.
4253 \&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR. It
4254 also turns on the following optimization flags:
4255 \&\fB\-fthread\-jumps
4257 \&\-foptimize\-sibling\-calls
4258 \&\-fcse\-follow\-jumps \-fcse\-skip\-blocks
4259 \&\-fgcse \-fgcse\-lm
4260 \&\-fexpensive\-optimizations
4261 \&\-frerun\-cse\-after\-loop
4264 \&\-fschedule\-insns \-fschedule\-insns2
4265 \&\-fsched\-interblock \-fsched\-spec
4267 \&\-fstrict\-aliasing \-fstrict\-overflow
4268 \&\-fdelete\-null\-pointer\-checks
4269 \&\-freorder\-blocks \-freorder\-functions
4270 \&\-falign\-functions \-falign\-jumps
4271 \&\-falign\-loops \-falign\-labels
4275 Please note the warning under \fB\-fgcse\fR about
4276 invoking \fB\-O2\fR on programs that use computed gotos.
4278 \&\fB\-O2\fR doesn't turn on \fB\-ftree\-vrp\fR for the Ada compiler.
4279 This option must be explicitly specified on the command line to be
4280 enabled for the Ada compiler.
4283 Optimize yet more. \fB\-O3\fR turns on all optimizations specified by
4284 \&\fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
4285 \&\fB\-funswitch\-loops\fR and \fB\-fgcse\-after\-reload\fR options.
4288 Do not optimize. This is the default.
4291 Optimize for size. \fB\-Os\fR enables all \fB\-O2\fR optimizations that
4292 do not typically increase code size. It also performs further
4293 optimizations designed to reduce code size.
4295 \&\fB\-Os\fR disables the following optimization flags:
4296 \&\fB\-falign\-functions \-falign\-jumps \-falign\-loops
4297 \&\-falign\-labels \-freorder\-blocks \-freorder\-blocks\-and\-partition
4298 \&\-fprefetch\-loop\-arrays \-ftree\-vect\-loop\-version\fR
4300 If you use multiple \fB\-O\fR options, with or without level numbers,
4301 the last such option is the one that is effective.
4303 Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
4304 flags. Most flags have both positive and negative forms; the negative
4305 form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table
4306 below, only one of the forms is listed\-\-\-the one you typically will
4307 use. You can figure out the other form by either removing \fBno\-\fR
4310 The following options control specific optimizations. They are either
4311 activated by \fB\-O\fR options or are related to ones that are. You
4312 can use the following flags in the rare cases when \*(L"fine\-tuning\*(R" of
4313 optimizations to be performed is desired.
4314 .IP "\fB\-fno\-default\-inline\fR" 4
4315 .IX Item "-fno-default-inline"
4316 Do not make member functions inline by default merely because they are
4317 defined inside the class scope (\*(C+ only). Otherwise, when you specify
4318 \&\fB\-O\fR, member functions defined inside class scope are compiled
4319 inline by default; i.e., you don't need to add \fBinline\fR in front of
4320 the member function name.
4321 .IP "\fB\-fno\-defer\-pop\fR" 4
4322 .IX Item "-fno-defer-pop"
4323 Always pop the arguments to each function call as soon as that function
4324 returns. For machines which must pop arguments after a function call,
4325 the compiler normally lets arguments accumulate on the stack for several
4326 function calls and pops them all at once.
4328 Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4329 .IP "\fB\-fforce\-mem\fR" 4
4330 .IX Item "-fforce-mem"
4331 Force memory operands to be copied into registers before doing
4332 arithmetic on them. This produces better code by making all memory
4333 references potential common subexpressions. When they are not common
4334 subexpressions, instruction combination should eliminate the separate
4335 register\-load. This option is now a nop and will be removed in 4.3.
4336 .IP "\fB\-fforce\-addr\fR" 4
4337 .IX Item "-fforce-addr"
4338 Force memory address constants to be copied into registers before
4339 doing arithmetic on them.
4340 .IP "\fB\-fomit\-frame\-pointer\fR" 4
4341 .IX Item "-fomit-frame-pointer"
4342 Don't keep the frame pointer in a register for functions that
4343 don't need one. This avoids the instructions to save, set up and
4344 restore frame pointers; it also makes an extra register available
4345 in many functions. \fBIt also makes debugging impossible on
4348 On some machines, such as the \s-1VAX\s0, this flag has no effect, because
4349 the standard calling sequence automatically handles the frame pointer
4350 and nothing is saved by pretending it doesn't exist. The
4351 machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
4352 whether a target machine supports this flag.
4354 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4355 .IP "\fB\-foptimize\-sibling\-calls\fR" 4
4356 .IX Item "-foptimize-sibling-calls"
4357 Optimize sibling and tail recursive calls.
4359 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4360 .IP "\fB\-fno\-inline\fR" 4
4361 .IX Item "-fno-inline"
4362 Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword. Normally this option
4363 is used to keep the compiler from expanding any functions inline.
4364 Note that if you are not optimizing, no functions can be expanded inline.
4365 .IP "\fB\-finline\-functions\fR" 4
4366 .IX Item "-finline-functions"
4367 Integrate all simple functions into their callers. The compiler
4368 heuristically decides which functions are simple enough to be worth
4369 integrating in this way.
4371 If all calls to a given function are integrated, and the function is
4372 declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
4373 assembler code in its own right.
4375 Enabled at level \fB\-O3\fR.
4376 .IP "\fB\-finline\-functions\-called\-once\fR" 4
4377 .IX Item "-finline-functions-called-once"
4378 Consider all \f(CW\*(C`static\*(C'\fR functions called once for inlining into their
4379 caller even if they are not marked \f(CW\*(C`inline\*(C'\fR. If a call to a given
4380 function is integrated, then the function is not output as assembler code
4383 Enabled if \fB\-funit\-at\-a\-time\fR is enabled.
4384 .IP "\fB\-fearly\-inlining\fR" 4
4385 .IX Item "-fearly-inlining"
4386 Inline functions marked by \f(CW\*(C`always_inline\*(C'\fR and functions whose body seems
4387 smaller than the function call overhead early before doing
4388 \&\fB\-fprofile\-generate\fR instrumentation and real inlining pass. Doing so
4389 makes profiling significantly cheaper and usually inlining faster on programs
4390 having large chains of nested wrapper functions.
4393 .IP "\fB\-finline\-limit=\fR\fIn\fR" 4
4394 .IX Item "-finline-limit=n"
4395 By default, \s-1GCC\s0 limits the size of functions that can be inlined. This flag
4396 allows the control of this limit for functions that are explicitly marked as
4397 inline (i.e., marked with the inline keyword or defined within the class
4398 definition in c++). \fIn\fR is the size of functions that can be inlined in
4399 number of pseudo instructions (not counting parameter handling). The default
4400 value of \fIn\fR is 600.
4401 Increasing this value can result in more inlined code at
4402 the cost of compilation time and memory consumption. Decreasing usually makes
4403 the compilation faster and less code will be inlined (which presumably
4404 means slower programs). This option is particularly useful for programs that
4405 use inlining heavily such as those based on recursive templates with \*(C+.
4407 Inlining is actually controlled by a number of parameters, which may be
4408 specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
4409 The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
4412 .IP "\fBmax-inline-insns-single\fR" 4
4413 .IX Item "max-inline-insns-single"
4415 \& is set to I<n>/2.
4417 .IP "\fBmax-inline-insns-auto\fR" 4
4418 .IX Item "max-inline-insns-auto"
4420 \& is set to I<n>/2.
4422 .IP "\fBmin-inline-insns\fR" 4
4423 .IX Item "min-inline-insns"
4425 \& is set to 130 or I<n>/4, whichever is smaller.
4427 .IP "\fBmax-inline-insns-rtl\fR" 4
4428 .IX Item "max-inline-insns-rtl"
4435 See below for a documentation of the individual
4436 parameters controlling inlining.
4438 \&\fINote:\fR pseudo instruction represents, in this particular context, an
4439 abstract measurement of function's size. In no way does it represent a count
4440 of assembly instructions and as such its exact meaning might change from one
4441 release to an another.
4443 .IP "\fB\-fkeep\-inline\-functions\fR" 4
4444 .IX Item "-fkeep-inline-functions"
4445 In C, emit \f(CW\*(C`static\*(C'\fR functions that are declared \f(CW\*(C`inline\*(C'\fR
4446 into the object file, even if the function has been inlined into all
4447 of its callers. This switch does not affect functions using the
4448 \&\f(CW\*(C`extern inline\*(C'\fR extension in \s-1GNU\s0 C. In \*(C+, emit any and all
4449 inline functions into the object file.
4450 .IP "\fB\-fkeep\-static\-consts\fR" 4
4451 .IX Item "-fkeep-static-consts"
4452 Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
4453 on, even if the variables aren't referenced.
4455 \&\s-1GCC\s0 enables this option by default. If you want to force the compiler to
4456 check if the variable was referenced, regardless of whether or not
4457 optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
4458 .IP "\fB\-fmerge\-constants\fR" 4
4459 .IX Item "-fmerge-constants"
4460 Attempt to merge identical constants (string constants and floating point
4461 constants) across compilation units.
4463 This option is the default for optimized compilation if the assembler and
4464 linker support it. Use \fB\-fno\-merge\-constants\fR to inhibit this
4467 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4468 .IP "\fB\-fmerge\-all\-constants\fR" 4
4469 .IX Item "-fmerge-all-constants"
4470 Attempt to merge identical constants and identical variables.
4472 This option implies \fB\-fmerge\-constants\fR. In addition to
4473 \&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
4474 arrays or initialized constant variables with integral or floating point
4475 types. Languages like C or \*(C+ require each non-automatic variable to
4476 have distinct location, so using this option will result in non-conforming
4478 .IP "\fB\-fmodulo\-sched\fR" 4
4479 .IX Item "-fmodulo-sched"
4480 Perform swing modulo scheduling immediately before the first scheduling
4481 pass. This pass looks at innermost loops and reorders their
4482 instructions by overlapping different iterations.
4483 .IP "\fB\-fno\-branch\-count\-reg\fR" 4
4484 .IX Item "-fno-branch-count-reg"
4485 Do not use \*(L"decrement and branch\*(R" instructions on a count register,
4486 but instead generate a sequence of instructions that decrement a
4487 register, compare it against zero, then branch based upon the result.
4488 This option is only meaningful on architectures that support such
4489 instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
4491 The default is \fB\-fbranch\-count\-reg\fR.
4492 .IP "\fB\-fno\-function\-cse\fR" 4
4493 .IX Item "-fno-function-cse"
4494 Do not put function addresses in registers; make each instruction that
4495 calls a constant function contain the function's address explicitly.
4497 This option results in less efficient code, but some strange hacks
4498 that alter the assembler output may be confused by the optimizations
4499 performed when this option is not used.
4501 The default is \fB\-ffunction\-cse\fR
4502 .IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
4503 .IX Item "-fno-zero-initialized-in-bss"
4504 If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
4505 are initialized to zero into \s-1BSS\s0. This can save space in the resulting
4508 This option turns off this behavior because some programs explicitly
4509 rely on variables going to the data section. E.g., so that the
4510 resulting executable can find the beginning of that section and/or make
4511 assumptions based on that.
4513 The default is \fB\-fzero\-initialized\-in\-bss\fR.
4514 .IP "\fB\-fmudflap \-fmudflapth \-fmudflapir\fR" 4
4515 .IX Item "-fmudflap -fmudflapth -fmudflapir"
4516 For front-ends that support it (C and \*(C+), instrument all risky
4517 pointer/array dereferencing operations, some standard library
4518 string/heap functions, and some other associated constructs with
4519 range/validity tests. Modules so instrumented should be immune to
4520 buffer overflows, invalid heap use, and some other classes of C/\*(C+
4521 programming errors. The instrumentation relies on a separate runtime
4522 library (\fIlibmudflap\fR), which will be linked into a program if
4523 \&\fB\-fmudflap\fR is given at link time. Run-time behavior of the
4524 instrumented program is controlled by the \fB\s-1MUDFLAP_OPTIONS\s0\fR
4525 environment variable. See \f(CW\*(C`env MUDFLAP_OPTIONS=\-help a.out\*(C'\fR
4528 Use \fB\-fmudflapth\fR instead of \fB\-fmudflap\fR to compile and to
4529 link if your program is multi\-threaded. Use \fB\-fmudflapir\fR, in
4530 addition to \fB\-fmudflap\fR or \fB\-fmudflapth\fR, if
4531 instrumentation should ignore pointer reads. This produces less
4532 instrumentation (and therefore faster execution) and still provides
4533 some protection against outright memory corrupting writes, but allows
4534 erroneously read data to propagate within a program.
4535 .IP "\fB\-fthread\-jumps\fR" 4
4536 .IX Item "-fthread-jumps"
4537 Perform optimizations where we check to see if a jump branches to a
4538 location where another comparison subsumed by the first is found. If
4539 so, the first branch is redirected to either the destination of the
4540 second branch or a point immediately following it, depending on whether
4541 the condition is known to be true or false.
4543 Enabled at levels \fB\-O3\fR.
4544 .IP "\fB\-fcse\-follow\-jumps\fR" 4
4545 .IX Item "-fcse-follow-jumps"
4546 In common subexpression elimination, scan through jump instructions
4547 when the target of the jump is not reached by any other path. For
4548 example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
4549 \&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
4552 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4553 .IP "\fB\-fcse\-skip\-blocks\fR" 4
4554 .IX Item "-fcse-skip-blocks"
4555 This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
4556 follow jumps which conditionally skip over blocks. When \s-1CSE\s0
4557 encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
4558 \&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
4559 body of the \f(CW\*(C`if\*(C'\fR.
4561 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4562 .IP "\fB\-frerun\-cse\-after\-loop\fR" 4
4563 .IX Item "-frerun-cse-after-loop"
4564 Re-run common subexpression elimination after loop optimizations has been
4567 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4568 .IP "\fB\-fgcse\fR" 4
4570 Perform a global common subexpression elimination pass.
4571 This pass also performs global constant and copy propagation.
4573 \&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
4574 extension, you may get better runtime performance if you disable
4575 the global common subexpression elimination pass by adding
4576 \&\fB\-fno\-gcse\fR to the command line.
4578 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4579 .IP "\fB\-fgcse\-lm\fR" 4
4580 .IX Item "-fgcse-lm"
4581 When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
4582 attempt to move loads which are only killed by stores into themselves. This
4583 allows a loop containing a load/store sequence to be changed to a load outside
4584 the loop, and a copy/store within the loop.
4586 Enabled by default when gcse is enabled.
4587 .IP "\fB\-fgcse\-sm\fR" 4
4588 .IX Item "-fgcse-sm"
4589 When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
4590 global common subexpression elimination. This pass will attempt to move
4591 stores out of loops. When used in conjunction with \fB\-fgcse\-lm\fR,
4592 loops containing a load/store sequence can be changed to a load before
4593 the loop and a store after the loop.
4595 Not enabled at any optimization level.
4596 .IP "\fB\-fgcse\-las\fR" 4
4597 .IX Item "-fgcse-las"
4598 When \fB\-fgcse\-las\fR is enabled, the global common subexpression
4599 elimination pass eliminates redundant loads that come after stores to the
4600 same memory location (both partial and full redundancies).
4602 Not enabled at any optimization level.
4603 .IP "\fB\-fgcse\-after\-reload\fR" 4
4604 .IX Item "-fgcse-after-reload"
4605 When \fB\-fgcse\-after\-reload\fR is enabled, a redundant load elimination
4606 pass is performed after reload. The purpose of this pass is to cleanup
4608 .IP "\fB\-funsafe\-loop\-optimizations\fR" 4
4609 .IX Item "-funsafe-loop-optimizations"
4610 If given, the loop optimizer will assume that loop indices do not
4611 overflow, and that the loops with nontrivial exit condition are not
4612 infinite. This enables a wider range of loop optimizations even if
4613 the loop optimizer itself cannot prove that these assumptions are valid.
4614 Using \fB\-Wunsafe\-loop\-optimizations\fR, the compiler will warn you
4615 if it finds this kind of loop.
4616 .IP "\fB\-fcrossjumping\fR" 4
4617 .IX Item "-fcrossjumping"
4618 Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
4619 resulting code may or may not perform better than without cross\-jumping.
4621 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4622 .IP "\fB\-fif\-conversion\fR" 4
4623 .IX Item "-fif-conversion"
4624 Attempt to transform conditional jumps into branch-less equivalents. This
4625 include use of conditional moves, min, max, set flags and abs instructions, and
4626 some tricks doable by standard arithmetics. The use of conditional execution
4627 on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
4629 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4630 .IP "\fB\-fif\-conversion2\fR" 4
4631 .IX Item "-fif-conversion2"
4632 Use conditional execution (where available) to transform conditional jumps into
4633 branch-less equivalents.
4635 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4636 .IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
4637 .IX Item "-fdelete-null-pointer-checks"
4638 Use global dataflow analysis to identify and eliminate useless checks
4639 for null pointers. The compiler assumes that dereferencing a null
4640 pointer would have halted the program. If a pointer is checked after
4641 it has already been dereferenced, it cannot be null.
4643 In some environments, this assumption is not true, and programs can
4644 safely dereference null pointers. Use
4645 \&\fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
4646 for programs which depend on that behavior.
4648 Enabled at levels \fB\-O3\fR.
4649 .IP "\fB\-fexpensive\-optimizations\fR" 4
4650 .IX Item "-fexpensive-optimizations"
4651 Perform a number of minor optimizations that are relatively expensive.
4653 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4654 .IP "\fB\-foptimize\-register\-move\fR" 4
4655 .IX Item "-foptimize-register-move"
4657 .IP "\fB\-fregmove\fR" 4
4658 .IX Item "-fregmove"
4660 Attempt to reassign register numbers in move instructions and as
4661 operands of other simple instructions in order to maximize the amount of
4662 register tying. This is especially helpful on machines with two-operand
4665 Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
4668 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4669 .IP "\fB\-fdelayed\-branch\fR" 4
4670 .IX Item "-fdelayed-branch"
4671 If supported for the target machine, attempt to reorder instructions
4672 to exploit instruction slots available after delayed branch
4675 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4676 .IP "\fB\-fschedule\-insns\fR" 4
4677 .IX Item "-fschedule-insns"
4678 If supported for the target machine, attempt to reorder instructions to
4679 eliminate execution stalls due to required data being unavailable. This
4680 helps machines that have slow floating point or memory load instructions
4681 by allowing other instructions to be issued until the result of the load
4682 or floating point instruction is required.
4684 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4685 .IP "\fB\-fschedule\-insns2\fR" 4
4686 .IX Item "-fschedule-insns2"
4687 Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
4688 instruction scheduling after register allocation has been done. This is
4689 especially useful on machines with a relatively small number of
4690 registers and where memory load instructions take more than one cycle.
4692 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4693 .IP "\fB\-fno\-sched\-interblock\fR" 4
4694 .IX Item "-fno-sched-interblock"
4695 Don't schedule instructions across basic blocks. This is normally
4696 enabled by default when scheduling before register allocation, i.e.
4697 with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
4698 .IP "\fB\-fno\-sched\-spec\fR" 4
4699 .IX Item "-fno-sched-spec"
4700 Don't allow speculative motion of non-load instructions. This is normally
4701 enabled by default when scheduling before register allocation, i.e.
4702 with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
4703 .IP "\fB\-fsched\-spec\-load\fR" 4
4704 .IX Item "-fsched-spec-load"
4705 Allow speculative motion of some load instructions. This only makes
4706 sense when scheduling before register allocation, i.e. with
4707 \&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
4708 .IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
4709 .IX Item "-fsched-spec-load-dangerous"
4710 Allow speculative motion of more load instructions. This only makes
4711 sense when scheduling before register allocation, i.e. with
4712 \&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
4713 .IP "\fB\-fsched\-stalled\-insns\fR" 4
4714 .IX Item "-fsched-stalled-insns"
4716 .IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
4717 .IX Item "-fsched-stalled-insns=n"
4719 Define how many insns (if any) can be moved prematurely from the queue
4720 of stalled insns into the ready list, during the second scheduling pass.
4721 \&\fB\-fno\-fsched\-stalled\-insns\fR and \fB\-fsched\-stalled\-insns=0\fR
4722 are equivalent and mean that no insns will be moved prematurely.
4723 If \fIn\fR is unspecified then there is no limit on how many queued
4724 insns can be moved prematurely.
4725 .IP "\fB\-fsched\-stalled\-insns\-dep\fR" 4
4726 .IX Item "-fsched-stalled-insns-dep"
4728 .IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
4729 .IX Item "-fsched-stalled-insns-dep=n"
4731 Define how many insn groups (cycles) will be examined for a dependency
4732 on a stalled insn that is candidate for premature removal from the queue
4733 of stalled insns. This has an effect only during the second scheduling pass,
4734 and only if \fB\-fsched\-stalled\-insns\fR is used and its value is not zero.
4735 \&\fB\-fno\-sched\-stalled\-insns\-dep\fR is equivalent to
4736 \&\fB\-fsched\-stalled\-insns\-dep=0\fR.
4737 \&\fB\-fsched\-stalled\-insns\-dep\fR without a value is equivalent to
4738 \&\fB\-fsched\-stalled\-insns\-dep=1\fR.
4739 .IP "\fB\-fsched2\-use\-superblocks\fR" 4
4740 .IX Item "-fsched2-use-superblocks"
4741 When scheduling after register allocation, do use superblock scheduling
4742 algorithm. Superblock scheduling allows motion across basic block boundaries
4743 resulting on faster schedules. This option is experimental, as not all machine
4744 descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
4745 results from the algorithm.
4747 This only makes sense when scheduling after register allocation, i.e. with
4748 \&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
4749 .IP "\fB\-fsched2\-use\-traces\fR" 4
4750 .IX Item "-fsched2-use-traces"
4751 Use \fB\-fsched2\-use\-superblocks\fR algorithm when scheduling after register
4752 allocation and additionally perform code duplication in order to increase the
4753 size of superblocks using tracer pass. See \fB\-ftracer\fR for details on
4756 This mode should produce faster but significantly longer programs. Also
4757 without \fB\-fbranch\-probabilities\fR the traces constructed may not
4758 match the reality and hurt the performance. This only makes
4759 sense when scheduling after register allocation, i.e. with
4760 \&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
4761 .IP "\fB\-fsee\fR" 4
4763 Eliminates redundant extension instructions and move the non redundant
4764 ones to optimal placement using \s-1LCM\s0.
4765 .IP "\fB\-freschedule\-modulo\-scheduled\-loops\fR" 4
4766 .IX Item "-freschedule-modulo-scheduled-loops"
4767 The modulo scheduling comes before the traditional scheduling, if a loop was modulo scheduled
4768 we may want to prevent the later scheduling passes from changing its schedule, we use this
4769 option to control that.
4770 .IP "\fB\-fcaller\-saves\fR" 4
4771 .IX Item "-fcaller-saves"
4772 Enable values to be allocated in registers that will be clobbered by
4773 function calls, by emitting extra instructions to save and restore the
4774 registers around such calls. Such allocation is done only when it
4775 seems to result in better code than would otherwise be produced.
4777 This option is always enabled by default on certain machines, usually
4778 those which have no call-preserved registers to use instead.
4780 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4781 .IP "\fB\-ftree\-pre\fR" 4
4782 .IX Item "-ftree-pre"
4783 Perform Partial Redundancy Elimination (\s-1PRE\s0) on trees. This flag is
4784 enabled by default at \fB\-O2\fR and \fB\-O3\fR.
4785 .IP "\fB\-ftree\-fre\fR" 4
4786 .IX Item "-ftree-fre"
4787 Perform Full Redundancy Elimination (\s-1FRE\s0) on trees. The difference
4788 between \s-1FRE\s0 and \s-1PRE\s0 is that \s-1FRE\s0 only considers expressions
4789 that are computed on all paths leading to the redundant computation.
4790 This analysis faster than \s-1PRE\s0, though it exposes fewer redundancies.
4791 This flag is enabled by default at \fB\-O\fR and higher.
4792 .IP "\fB\-ftree\-copy\-prop\fR" 4
4793 .IX Item "-ftree-copy-prop"
4794 Perform copy propagation on trees. This pass eliminates unnecessary
4795 copy operations. This flag is enabled by default at \fB\-O\fR and
4797 .IP "\fB\-ftree\-store\-copy\-prop\fR" 4
4798 .IX Item "-ftree-store-copy-prop"
4799 Perform copy propagation of memory loads and stores. This pass
4800 eliminates unnecessary copy operations in memory references
4801 (structures, global variables, arrays, etc). This flag is enabled by
4802 default at \fB\-O2\fR and higher.
4803 .IP "\fB\-ftree\-salias\fR" 4
4804 .IX Item "-ftree-salias"
4805 Perform structural alias analysis on trees. This flag
4806 is enabled by default at \fB\-O\fR and higher.
4807 .IP "\fB\-fipa\-pta\fR" 4
4808 .IX Item "-fipa-pta"
4809 Perform interprocedural pointer analysis.
4810 .IP "\fB\-ftree\-sink\fR" 4
4811 .IX Item "-ftree-sink"
4812 Perform forward store motion on trees. This flag is
4813 enabled by default at \fB\-O\fR and higher.
4814 .IP "\fB\-ftree\-ccp\fR" 4
4815 .IX Item "-ftree-ccp"
4816 Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
4817 pass only operates on local scalar variables and is enabled by default
4818 at \fB\-O\fR and higher.
4819 .IP "\fB\-ftree\-store\-ccp\fR" 4
4820 .IX Item "-ftree-store-ccp"
4821 Perform sparse conditional constant propagation (\s-1CCP\s0) on trees. This
4822 pass operates on both local scalar variables and memory stores and
4823 loads (global variables, structures, arrays, etc). This flag is
4824 enabled by default at \fB\-O2\fR and higher.
4825 .IP "\fB\-ftree\-dce\fR" 4
4826 .IX Item "-ftree-dce"
4827 Perform dead code elimination (\s-1DCE\s0) on trees. This flag is enabled by
4828 default at \fB\-O\fR and higher.
4829 .IP "\fB\-ftree\-dominator\-opts\fR" 4
4830 .IX Item "-ftree-dominator-opts"
4831 Perform a variety of simple scalar cleanups (constant/copy
4832 propagation, redundancy elimination, range propagation and expression
4833 simplification) based on a dominator tree traversal. This also
4834 performs jump threading (to reduce jumps to jumps). This flag is
4835 enabled by default at \fB\-O\fR and higher.
4836 .IP "\fB\-ftree\-ch\fR" 4
4837 .IX Item "-ftree-ch"
4838 Perform loop header copying on trees. This is beneficial since it increases
4839 effectiveness of code motion optimizations. It also saves one jump. This flag
4840 is enabled by default at \fB\-O\fR and higher. It is not enabled
4841 for \fB\-Os\fR, since it usually increases code size.
4842 .IP "\fB\-ftree\-loop\-optimize\fR" 4
4843 .IX Item "-ftree-loop-optimize"
4844 Perform loop optimizations on trees. This flag is enabled by default
4845 at \fB\-O\fR and higher.
4846 .IP "\fB\-ftree\-loop\-linear\fR" 4
4847 .IX Item "-ftree-loop-linear"
4848 Perform linear loop transformations on tree. This flag can improve cache
4849 performance and allow further loop optimizations to take place.
4850 .IP "\fB\-ftree\-loop\-im\fR" 4
4851 .IX Item "-ftree-loop-im"
4852 Perform loop invariant motion on trees. This pass moves only invariants that
4853 would be hard to handle at \s-1RTL\s0 level (function calls, operations that expand to
4854 nontrivial sequences of insns). With \fB\-funswitch\-loops\fR it also moves
4855 operands of conditions that are invariant out of the loop, so that we can use
4856 just trivial invariantness analysis in loop unswitching. The pass also includes
4858 .IP "\fB\-ftree\-loop\-ivcanon\fR" 4
4859 .IX Item "-ftree-loop-ivcanon"
4860 Create a canonical counter for number of iterations in the loop for that
4861 determining number of iterations requires complicated analysis. Later
4862 optimizations then may determine the number easily. Useful especially
4863 in connection with unrolling.
4864 .IP "\fB\-fivopts\fR" 4
4866 Perform induction variable optimizations (strength reduction, induction
4867 variable merging and induction variable elimination) on trees.
4868 .IP "\fB\-ftree\-sra\fR" 4
4869 .IX Item "-ftree-sra"
4870 Perform scalar replacement of aggregates. This pass replaces structure
4871 references with scalars to prevent committing structures to memory too
4872 early. This flag is enabled by default at \fB\-O\fR and higher.
4873 .IP "\fB\-ftree\-copyrename\fR" 4
4874 .IX Item "-ftree-copyrename"
4875 Perform copy renaming on trees. This pass attempts to rename compiler
4876 temporaries to other variables at copy locations, usually resulting in
4877 variable names which more closely resemble the original variables. This flag
4878 is enabled by default at \fB\-O\fR and higher.
4879 .IP "\fB\-ftree\-ter\fR" 4
4880 .IX Item "-ftree-ter"
4881 Perform temporary expression replacement during the \s-1SSA\-\s0>normal phase. Single
4882 use/single def temporaries are replaced at their use location with their
4883 defining expression. This results in non-GIMPLE code, but gives the expanders
4884 much more complex trees to work on resulting in better \s-1RTL\s0 generation. This is
4885 enabled by default at \fB\-O\fR and higher.
4886 .IP "\fB\-ftree\-lrs\fR" 4
4887 .IX Item "-ftree-lrs"
4888 Perform live range splitting during the \s-1SSA\-\s0>normal phase. Distinct live
4889 ranges of a variable are split into unique variables, allowing for better
4890 optimization later. This is enabled by default at \fB\-O\fR and higher.
4891 .IP "\fB\-ftree\-vectorize\fR" 4
4892 .IX Item "-ftree-vectorize"
4893 Perform loop vectorization on trees.
4894 .IP "\fB\-ftree\-vect\-loop\-version\fR" 4
4895 .IX Item "-ftree-vect-loop-version"
4896 Perform loop versioning when doing loop vectorization on trees. When a loop
4897 appears to be vectorizable except that data alignment or data dependence cannot
4898 be determined at compile time then vectorized and non-vectorized versions of
4899 the loop are generated along with runtime checks for alignment or dependence
4900 to control which version is executed. This option is enabled by default
4901 except at level \fB\-Os\fR where it is disabled.
4902 .IP "\fB\-ftree\-vrp\fR" 4
4903 .IX Item "-ftree-vrp"
4904 Perform Value Range Propagation on trees. This is similar to the
4905 constant propagation pass, but instead of values, ranges of values are
4906 propagated. This allows the optimizers to remove unnecessary range
4907 checks like array bound checks and null pointer checks. This is
4908 enabled by default at \fB\-O2\fR and higher. Null pointer check
4909 elimination is only done if \fB\-fdelete\-null\-pointer\-checks\fR is
4911 .IP "\fB\-ftracer\fR" 4
4913 Perform tail duplication to enlarge superblock size. This transformation
4914 simplifies the control flow of the function allowing other optimizations to do
4916 .IP "\fB\-funroll\-loops\fR" 4
4917 .IX Item "-funroll-loops"
4918 Unroll loops whose number of iterations can be determined at compile
4919 time or upon entry to the loop. \fB\-funroll\-loops\fR implies
4920 \&\fB\-frerun\-cse\-after\-loop\fR. This option makes code larger,
4921 and may or may not make it run faster.
4922 .IP "\fB\-funroll\-all\-loops\fR" 4
4923 .IX Item "-funroll-all-loops"
4924 Unroll all loops, even if their number of iterations is uncertain when
4925 the loop is entered. This usually makes programs run more slowly.
4926 \&\fB\-funroll\-all\-loops\fR implies the same options as
4927 \&\fB\-funroll\-loops\fR,
4928 .IP "\fB\-fsplit\-ivs\-in\-unroller\fR" 4
4929 .IX Item "-fsplit-ivs-in-unroller"
4930 Enables expressing of values of induction variables in later iterations
4931 of the unrolled loop using the value in the first iteration. This breaks
4932 long dependency chains, thus improving efficiency of the scheduling passes.
4934 Combination of \fB\-fweb\fR and \s-1CSE\s0 is often sufficient to obtain the
4935 same effect. However in cases the loop body is more complicated than
4936 a single basic block, this is not reliable. It also does not work at all
4937 on some of the architectures due to restrictions in the \s-1CSE\s0 pass.
4939 This optimization is enabled by default.
4940 .IP "\fB\-fvariable\-expansion\-in\-unroller\fR" 4
4941 .IX Item "-fvariable-expansion-in-unroller"
4942 With this option, the compiler will create multiple copies of some
4943 local variables when unrolling a loop which can result in superior code.
4944 .IP "\fB\-fprefetch\-loop\-arrays\fR" 4
4945 .IX Item "-fprefetch-loop-arrays"
4946 If supported by the target machine, generate instructions to prefetch
4947 memory to improve the performance of loops that access large arrays.
4949 This option may generate better or worse code; results are highly
4950 dependent on the structure of loops within the source code.
4952 Disabled at level \fB\-Os\fR.
4953 .IP "\fB\-fno\-peephole\fR" 4
4954 .IX Item "-fno-peephole"
4956 .IP "\fB\-fno\-peephole2\fR" 4
4957 .IX Item "-fno-peephole2"
4959 Disable any machine-specific peephole optimizations. The difference
4960 between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
4961 are implemented in the compiler; some targets use one, some use the
4962 other, a few use both.
4964 \&\fB\-fpeephole\fR is enabled by default.
4965 \&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4966 .IP "\fB\-fno\-guess\-branch\-probability\fR" 4
4967 .IX Item "-fno-guess-branch-probability"
4968 Do not guess branch probabilities using heuristics.
4970 \&\s-1GCC\s0 will use heuristics to guess branch probabilities if they are
4971 not provided by profiling feedback (\fB\-fprofile\-arcs\fR). These
4972 heuristics are based on the control flow graph. If some branch probabilities
4973 are specified by \fB_\|_builtin_expect\fR, then the heuristics will be
4974 used to guess branch probabilities for the rest of the control flow graph,
4975 taking the \fB_\|_builtin_expect\fR info into account. The interactions
4976 between the heuristics and \fB_\|_builtin_expect\fR can be complex, and in
4977 some cases, it may be useful to disable the heuristics so that the effects
4978 of \fB_\|_builtin_expect\fR are easier to understand.
4980 The default is \fB\-fguess\-branch\-probability\fR at levels
4981 \&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
4982 .IP "\fB\-freorder\-blocks\fR" 4
4983 .IX Item "-freorder-blocks"
4984 Reorder basic blocks in the compiled function in order to reduce number of
4985 taken branches and improve code locality.
4987 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
4988 .IP "\fB\-freorder\-blocks\-and\-partition\fR" 4
4989 .IX Item "-freorder-blocks-and-partition"
4990 In addition to reordering basic blocks in the compiled function, in order
4991 to reduce number of taken branches, partitions hot and cold basic blocks
4992 into separate sections of the assembly and .o files, to improve
4993 paging and cache locality performance.
4995 This optimization is automatically turned off in the presence of
4996 exception handling, for linkonce sections, for functions with a user-defined
4997 section attribute and on any architecture that does not support named
4999 .IP "\fB\-freorder\-functions\fR" 4
5000 .IX Item "-freorder-functions"
5001 Reorder functions in the object file in order to
5002 improve code locality. This is implemented by using special
5003 subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
5004 \&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions. Reordering is done by
5005 the linker so object file format must support named sections and linker must
5006 place them in a reasonable way.
5008 Also profile feedback must be available in to make this option effective. See
5009 \&\fB\-fprofile\-arcs\fR for details.
5011 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
5012 .IP "\fB\-fstrict\-aliasing\fR" 4
5013 .IX Item "-fstrict-aliasing"
5014 Allows the compiler to assume the strictest aliasing rules applicable to
5015 the language being compiled. For C (and \*(C+), this activates
5016 optimizations based on the type of expressions. In particular, an
5017 object of one type is assumed never to reside at the same address as an
5018 object of a different type, unless the types are almost the same. For
5019 example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
5020 \&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR. A character type may alias any other
5023 Pay special attention to code like this:
5040 The practice of reading from a different union member than the one most
5041 recently written to (called \*(L"type\-punning\*(R") is common. Even with
5042 \&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
5043 is accessed through the union type. So, the code above will work as
5044 expected. However, this code might not:
5056 Every language that wishes to perform language-specific alias analysis
5057 should define a function that computes, given an \f(CW\*(C`tree\*(C'\fR
5058 node, an alias set for the node. Nodes in different alias sets are not
5059 allowed to alias. For an example, see the C front-end function
5060 \&\f(CW\*(C`c_get_alias_set\*(C'\fR.
5062 Enabled at levels \fB\-O3\fR.
5063 .IP "\fB\-fstrict\-overflow\fR" 4
5064 .IX Item "-fstrict-overflow"
5065 Allow the compiler to assume strict signed overflow rules, depending
5066 on the language being compiled. For C (and \*(C+) this means that
5067 overflow when doing arithmetic with signed numbers is undefined, which
5068 means that the compiler may assume that it will not happen. This
5069 permits various optimizations. For example, the compiler will assume
5070 that an expression like \f(CW\*(C`i + 10 > i\*(C'\fR will always be true for
5071 signed \f(CW\*(C`i\*(C'\fR. This assumption is only valid if signed overflow is
5072 undefined, as the expression is false if \f(CW\*(C`i + 10\*(C'\fR overflows when
5073 using twos complement arithmetic. When this option is in effect any
5074 attempt to determine whether an operation on signed numbers will
5075 overflow must be written carefully to not actually involve overflow.
5077 This option also allows the compiler to assume strict pointer
5078 semantics: given a pointer to an object, if adding an offset to that
5079 pointer does not produce a pointer to the same object, the addition is
5080 undefined. This permits the compiler to conclude that \f(CW\*(C`p + u >
5081 p\*(C'\fR is always true for a pointer \f(CW\*(C`p\*(C'\fR and unsigned integer
5082 \&\f(CW\*(C`u\*(C'\fR. This assumption is only valid because pointer wraparound is
5083 undefined, as the expression is false if \f(CW\*(C`p + u\*(C'\fR overflows using
5084 twos complement arithmetic.
5086 See also the \fB\-fwrapv\fR option. Using \fB\-fwrapv\fR means
5087 that integer signed overflow is fully defined: it wraps. When
5088 \&\fB\-fwrapv\fR is used, there is no difference between
5089 \&\fB\-fstrict\-overflow\fR and \fB\-fno\-strict\-overflow\fR for
5090 integers. With \fB\-fwrapv\fR certain types of overflow are
5091 permitted. For example, if the compiler gets an overflow when doing
5092 arithmetic on constants, the overflowed value can still be used with
5093 \&\fB\-fwrapv\fR, but not otherwise.
5095 The \fB\-fstrict\-overflow\fR option is enabled at levels
5096 \&\fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
5097 .IP "\fB\-falign\-functions\fR" 4
5098 .IX Item "-falign-functions"
5100 .IP "\fB\-falign\-functions=\fR\fIn\fR" 4
5101 .IX Item "-falign-functions=n"
5103 Align the start of functions to the next power-of-two greater than
5104 \&\fIn\fR, skipping up to \fIn\fR bytes. For instance,
5105 \&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
5106 boundary, but \fB\-falign\-functions=24\fR would align to the next
5107 32\-byte boundary only if this can be done by skipping 23 bytes or less.
5109 \&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
5110 equivalent and mean that functions will not be aligned.
5112 Some assemblers only support this flag when \fIn\fR is a power of two;
5113 in that case, it is rounded up.
5115 If \fIn\fR is not specified or is zero, use a machine-dependent default.
5117 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
5118 .IP "\fB\-falign\-labels\fR" 4
5119 .IX Item "-falign-labels"
5121 .IP "\fB\-falign\-labels=\fR\fIn\fR" 4
5122 .IX Item "-falign-labels=n"
5124 Align all branch targets to a power-of-two boundary, skipping up to
5125 \&\fIn\fR bytes like \fB\-falign\-functions\fR. This option can easily
5126 make code slower, because it must insert dummy operations for when the
5127 branch target is reached in the usual flow of the code.
5129 \&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
5130 equivalent and mean that labels will not be aligned.
5132 If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
5133 are greater than this value, then their values are used instead.
5135 If \fIn\fR is not specified or is zero, use a machine-dependent default
5136 which is very likely to be \fB1\fR, meaning no alignment.
5138 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
5139 .IP "\fB\-falign\-loops\fR" 4
5140 .IX Item "-falign-loops"
5142 .IP "\fB\-falign\-loops=\fR\fIn\fR" 4
5143 .IX Item "-falign-loops=n"
5145 Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
5146 like \fB\-falign\-functions\fR. The hope is that the loop will be
5147 executed many times, which will make up for any execution of the dummy
5150 \&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
5151 equivalent and mean that loops will not be aligned.
5153 If \fIn\fR is not specified or is zero, use a machine-dependent default.
5155 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
5156 .IP "\fB\-falign\-jumps\fR" 4
5157 .IX Item "-falign-jumps"
5159 .IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
5160 .IX Item "-falign-jumps=n"
5162 Align branch targets to a power-of-two boundary, for branch targets
5163 where the targets can only be reached by jumping, skipping up to \fIn\fR
5164 bytes like \fB\-falign\-functions\fR. In this case, no dummy operations
5167 \&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
5168 equivalent and mean that loops will not be aligned.
5170 If \fIn\fR is not specified or is zero, use a machine-dependent default.
5172 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
5173 .IP "\fB\-funit\-at\-a\-time\fR" 4
5174 .IX Item "-funit-at-a-time"
5175 Parse the whole compilation unit before starting to produce code.
5176 This allows some extra optimizations to take place but consumes
5177 more memory (in general). There are some compatibility issues
5178 with \fIunit-at-a-time\fR mode:
5181 enabling \fIunit-at-a-time\fR mode may change the order
5182 in which functions, variables, and top-level \f(CW\*(C`asm\*(C'\fR statements
5183 are emitted, and will likely break code relying on some particular
5184 ordering. The majority of such top-level \f(CW\*(C`asm\*(C'\fR statements,
5185 though, can be replaced by \f(CW\*(C`section\*(C'\fR attributes. The
5186 \&\fBfno-toplevel-reorder\fR option may be used to keep the ordering
5187 used in the input file, at the cost of some optimizations.
5189 \&\fIunit-at-a-time\fR mode removes unreferenced static variables
5190 and functions. This may result in undefined references
5191 when an \f(CW\*(C`asm\*(C'\fR statement refers directly to variables or functions
5192 that are otherwise unused. In that case either the variable/function
5193 shall be listed as an operand of the \f(CW\*(C`asm\*(C'\fR statement operand or,
5194 in the case of top-level \f(CW\*(C`asm\*(C'\fR statements the attribute \f(CW\*(C`used\*(C'\fR
5195 shall be used on the declaration.
5197 Static functions now can use non-standard passing conventions that
5198 may break \f(CW\*(C`asm\*(C'\fR statements calling functions directly. Again,
5199 attribute \f(CW\*(C`used\*(C'\fR will prevent this behavior.
5203 As a temporary workaround, \fB\-fno\-unit\-at\-a\-time\fR can be used,
5204 but this scheme may not be supported by future releases of \s-1GCC\s0.
5206 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
5208 .IP "\fB\-fno\-toplevel\-reorder\fR" 4
5209 .IX Item "-fno-toplevel-reorder"
5210 Do not reorder top-level functions, variables, and \f(CW\*(C`asm\*(C'\fR
5211 statements. Output them in the same order that they appear in the
5212 input file. When this option is used, unreferenced static variables
5213 will not be removed. This option is intended to support existing code
5214 which relies on a particular ordering. For new code, it is better to
5216 .IP "\fB\-fweb\fR" 4
5218 Constructs webs as commonly used for register allocation purposes and assign
5219 each web individual pseudo register. This allows the register allocation pass
5220 to operate on pseudos directly, but also strengthens several other optimization
5221 passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover. It can,
5222 however, make debugging impossible, since variables will no longer stay in a
5223 \&\*(L"home register\*(R".
5225 Enabled by default with \fB\-funroll\-loops\fR.
5226 .IP "\fB\-fwhole\-program\fR" 4
5227 .IX Item "-fwhole-program"
5228 Assume that the current compilation unit represents whole program being
5229 compiled. All public functions and variables with the exception of \f(CW\*(C`main\*(C'\fR
5230 and those merged by attribute \f(CW\*(C`externally_visible\*(C'\fR become static functions
5231 and in a affect gets more aggressively optimized by interprocedural optimizers.
5232 While this option is equivalent to proper use of \f(CW\*(C`static\*(C'\fR keyword for
5233 programs consisting of single file, in combination with option
5234 \&\fB\-\-combine\fR this flag can be used to compile most of smaller scale C
5235 programs since the functions and variables become local for the whole combined
5236 compilation unit, not for the single source file itself.
5237 .IP "\fB\-fcprop\-registers\fR" 4
5238 .IX Item "-fcprop-registers"
5239 After register allocation and post-register allocation instruction splitting,
5240 we perform a copy-propagation pass to try to reduce scheduling dependencies
5241 and occasionally eliminate the copy.
5243 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
5244 .IP "\fB\-fprofile\-generate\fR" 4
5245 .IX Item "-fprofile-generate"
5246 Enable options usually used for instrumenting application to produce
5247 profile useful for later recompilation with profile feedback based
5248 optimization. You must use \fB\-fprofile\-generate\fR both when
5249 compiling and when linking your program.
5251 The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
5252 .IP "\fB\-fprofile\-use\fR" 4
5253 .IX Item "-fprofile-use"
5254 Enable profile feedback directed optimizations, and optimizations
5255 generally profitable only with profile feedback available.
5257 The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR,
5258 \&\f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR, \f(CW\*(C`\-ftracer\*(C'\fR
5260 The following options control compiler behavior regarding floating
5261 point arithmetic. These options trade off between speed and
5262 correctness. All must be specifically enabled.
5263 .IP "\fB\-ffloat\-store\fR" 4
5264 .IX Item "-ffloat-store"
5265 Do not store floating point variables in registers, and inhibit other
5266 options that might change whether a floating point value is taken from a
5269 This option prevents undesirable excess precision on machines such as
5270 the 68000 where the floating registers (of the 68881) keep more
5271 precision than a \f(CW\*(C`double\*(C'\fR is supposed to have. Similarly for the
5272 x86 architecture. For most programs, the excess precision does only
5273 good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
5274 point. Use \fB\-ffloat\-store\fR for such programs, after modifying
5275 them to store all pertinent intermediate computations into variables.
5276 .IP "\fB\-ffast\-math\fR" 4
5277 .IX Item "-ffast-math"
5278 Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR, \fB\-fno\-trapping\-math\fR, \fB\-ffinite\-math\-only\fR,
5279 \&\fB\-fno\-rounding\-math\fR, \fB\-fno\-signaling\-nans\fR
5280 and \fBfcx-limited-range\fR.
5282 This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
5284 This option should never be turned on by any \fB\-O\fR option since
5285 it can result in incorrect output for programs which depend on
5286 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
5288 .IP "\fB\-fno\-math\-errno\fR" 4
5289 .IX Item "-fno-math-errno"
5290 Do not set \s-1ERRNO\s0 after calling math functions that are executed
5291 with a single instruction, e.g., sqrt. A program that relies on
5292 \&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
5293 for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
5295 This option should never be turned on by any \fB\-O\fR option since
5296 it can result in incorrect output for programs which depend on
5297 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
5300 The default is \fB\-fmath\-errno\fR.
5302 On Darwin systems, the math library never sets \f(CW\*(C`errno\*(C'\fR. There is therefore
5303 no reason for the compiler to consider the possibility that it might,
5304 and \fB\-fno\-math\-errno\fR is the default.
5305 .IP "\fB\-funsafe\-math\-optimizations\fR" 4
5306 .IX Item "-funsafe-math-optimizations"
5307 Allow optimizations for floating-point arithmetic that (a) assume
5308 that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
5309 \&\s-1ANSI\s0 standards. When used at link\-time, it may include libraries
5310 or startup files that change the default \s-1FPU\s0 control word or other
5311 similar optimizations.
5313 This option should never be turned on by any \fB\-O\fR option since
5314 it can result in incorrect output for programs which depend on
5315 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
5318 The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
5319 .IP "\fB\-ffinite\-math\-only\fR" 4
5320 .IX Item "-ffinite-math-only"
5321 Allow optimizations for floating-point arithmetic that assume
5322 that arguments and results are not NaNs or +\-Infs.
5324 This option should never be turned on by any \fB\-O\fR option since
5325 it can result in incorrect output for programs which depend on
5326 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications.
5328 The default is \fB\-fno\-finite\-math\-only\fR.
5329 .IP "\fB\-fno\-trapping\-math\fR" 4
5330 .IX Item "-fno-trapping-math"
5331 Compile code assuming that floating-point operations cannot generate
5332 user-visible traps. These traps include division by zero, overflow,
5333 underflow, inexact result and invalid operation. This option implies
5334 \&\fB\-fno\-signaling\-nans\fR. Setting this option may allow faster
5335 code if one relies on \*(L"non\-stop\*(R" \s-1IEEE\s0 arithmetic, for example.
5337 This option should never be turned on by any \fB\-O\fR option since
5338 it can result in incorrect output for programs which depend on
5339 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
5342 The default is \fB\-ftrapping\-math\fR.
5343 .IP "\fB\-frounding\-math\fR" 4
5344 .IX Item "-frounding-math"
5345 Disable transformations and optimizations that assume default floating
5346 point rounding behavior. This is round-to-zero for all floating point
5347 to integer conversions, and round-to-nearest for all other arithmetic
5348 truncations. This option should be specified for programs that change
5349 the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
5350 non-default rounding mode. This option disables constant folding of
5351 floating point expressions at compile-time (which may be affected by
5352 rounding mode) and arithmetic transformations that are unsafe in the
5353 presence of sign-dependent rounding modes.
5355 The default is \fB\-fno\-rounding\-math\fR.
5357 This option is experimental and does not currently guarantee to
5358 disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
5359 Future versions of \s-1GCC\s0 may provide finer control of this setting
5360 using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma. This command line option
5361 will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
5362 .IP "\fB\-frtl\-abstract\-sequences\fR" 4
5363 .IX Item "-frtl-abstract-sequences"
5364 It is a size optimization method. This option is to find identical
5365 sequences of code, which can be turned into pseudo-procedures and
5366 then replace all occurrences with calls to the newly created
5367 subroutine. It is kind of an opposite of \fB\-finline\-functions\fR.
5368 This optimization runs at \s-1RTL\s0 level.
5369 .IP "\fB\-fsignaling\-nans\fR" 4
5370 .IX Item "-fsignaling-nans"
5371 Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
5372 traps during floating-point operations. Setting this option disables
5373 optimizations that may change the number of exceptions visible with
5374 signaling NaNs. This option implies \fB\-ftrapping\-math\fR.
5376 This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
5379 The default is \fB\-fno\-signaling\-nans\fR.
5381 This option is experimental and does not currently guarantee to
5382 disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
5383 .IP "\fB\-fsingle\-precision\-constant\fR" 4
5384 .IX Item "-fsingle-precision-constant"
5385 Treat floating point constant as single precision constant instead of
5386 implicitly converting it to double precision constant.
5387 .IP "\fB\-fcx\-limited\-range\fR" 4
5388 .IX Item "-fcx-limited-range"
5389 When enabled, this option states that a range reduction step is not
5390 needed when performing complex division. The default is
5391 \&\fB\-fno\-cx\-limited\-range\fR, but is enabled by \fB\-ffast\-math\fR.
5393 This option controls the default setting of the \s-1ISO\s0 C99
5394 \&\f(CW\*(C`CX_LIMITED_RANGE\*(C'\fR pragma. Nevertheless, the option applies to
5397 The following options control optimizations that may improve
5398 performance, but are not enabled by any \fB\-O\fR options. This
5399 section includes experimental options that may produce broken code.
5400 .IP "\fB\-fbranch\-probabilities\fR" 4
5401 .IX Item "-fbranch-probabilities"
5402 After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
5403 \&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
5404 the number of times each branch was taken. When the program
5405 compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
5406 counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
5407 file The information in this data file is very dependent on the
5408 structure of the generated code, so you must use the same source code
5409 and the same optimization options for both compilations.
5411 With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
5412 \&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
5413 These can be used to improve optimization. Currently, they are only
5414 used in one place: in \fIreorg.c\fR, instead of guessing which path a
5415 branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
5416 exactly determine which path is taken more often.
5417 .IP "\fB\-fprofile\-values\fR" 4
5418 .IX Item "-fprofile-values"
5419 If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
5420 data about values of expressions in the program is gathered.
5422 With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
5423 from profiling values of expressions and adds \fB\s-1REG_VALUE_PROFILE\s0\fR
5424 notes to instructions for their later usage in optimizations.
5426 Enabled with \fB\-fprofile\-generate\fR and \fB\-fprofile\-use\fR.
5427 .IP "\fB\-fvpt\fR" 4
5429 If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
5430 a code to gather information about values of expressions.
5432 With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
5433 and actually performs the optimizations based on them.
5434 Currently the optimizations include specialization of division operation
5435 using the knowledge about the value of the denominator.
5436 .IP "\fB\-frename\-registers\fR" 4
5437 .IX Item "-frename-registers"
5438 Attempt to avoid false dependencies in scheduled code by making use
5439 of registers left over after register allocation. This optimization
5440 will most benefit processors with lots of registers. Depending on the
5441 debug information format adopted by the target, however, it can
5442 make debugging impossible, since variables will no longer stay in
5443 a \*(L"home register\*(R".
5445 Enabled by default with \fB\-funroll\-loops\fR.
5446 .IP "\fB\-ftracer\fR" 4
5448 Perform tail duplication to enlarge superblock size. This transformation
5449 simplifies the control flow of the function allowing other optimizations to do
5452 Enabled with \fB\-fprofile\-use\fR.
5453 .IP "\fB\-funroll\-loops\fR" 4
5454 .IX Item "-funroll-loops"
5455 Unroll loops whose number of iterations can be determined at compile time or
5456 upon entry to the loop. \fB\-funroll\-loops\fR implies
5457 \&\fB\-frerun\-cse\-after\-loop\fR, \fB\-fweb\fR and \fB\-frename\-registers\fR.
5458 It also turns on complete loop peeling (i.e. complete removal of loops with
5459 small constant number of iterations). This option makes code larger, and may
5460 or may not make it run faster.
5462 Enabled with \fB\-fprofile\-use\fR.
5463 .IP "\fB\-funroll\-all\-loops\fR" 4
5464 .IX Item "-funroll-all-loops"
5465 Unroll all loops, even if their number of iterations is uncertain when
5466 the loop is entered. This usually makes programs run more slowly.
5467 \&\fB\-funroll\-all\-loops\fR implies the same options as
5468 \&\fB\-funroll\-loops\fR.
5469 .IP "\fB\-fpeel\-loops\fR" 4
5470 .IX Item "-fpeel-loops"
5471 Peels the loops for that there is enough information that they do not
5472 roll much (from profile feedback). It also turns on complete loop peeling
5473 (i.e. complete removal of loops with small constant number of iterations).
5475 Enabled with \fB\-fprofile\-use\fR.
5476 .IP "\fB\-fmove\-loop\-invariants\fR" 4
5477 .IX Item "-fmove-loop-invariants"
5478 Enables the loop invariant motion pass in the \s-1RTL\s0 loop optimizer. Enabled
5480 .IP "\fB\-funswitch\-loops\fR" 4
5481 .IX Item "-funswitch-loops"
5482 Move branches with loop invariant conditions out of the loop, with duplicates
5483 of the loop on both branches (modified according to result of the condition).
5484 .IP "\fB\-ffunction\-sections\fR" 4
5485 .IX Item "-ffunction-sections"
5487 .IP "\fB\-fdata\-sections\fR" 4
5488 .IX Item "-fdata-sections"
5490 Place each function or data item into its own section in the output
5491 file if the target supports arbitrary sections. The name of the
5492 function or the name of the data item determines the section's name
5495 Use these options on systems where the linker can perform optimizations
5496 to improve locality of reference in the instruction space. Most systems
5497 using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
5498 linkers with such optimizations. \s-1AIX\s0 may have these optimizations in
5501 Only use these options when there are significant benefits from doing
5502 so. When you specify these options, the assembler and linker will
5503 create larger object and executable files and will also be slower.
5504 You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
5505 specify this option and you may have problems with debugging if
5506 you specify both this option and \fB\-g\fR.
5507 .IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
5508 .IX Item "-fbranch-target-load-optimize"
5509 Perform branch target register load optimization before prologue / epilogue
5511 The use of target registers can typically be exposed only during reload,
5512 thus hoisting loads out of loops and doing inter-block scheduling needs
5513 a separate optimization pass.
5514 .IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
5515 .IX Item "-fbranch-target-load-optimize2"
5516 Perform branch target register load optimization after prologue / epilogue
5518 .IP "\fB\-fbtr\-bb\-exclusive\fR" 4
5519 .IX Item "-fbtr-bb-exclusive"
5520 When performing branch target register load optimization, don't reuse
5521 branch target registers in within any basic block.
5522 .IP "\fB\-fstack\-protector\fR" 4
5523 .IX Item "-fstack-protector"
5524 Emit extra code to check for buffer overflows, such as stack smashing
5525 attacks. This is done by adding a guard variable to functions with
5526 vulnerable objects. This includes functions that call alloca, and
5527 functions with buffers larger than 8 bytes. The guards are initialized
5528 when a function is entered and then checked when the function exits.
5529 If a guard check fails, an error message is printed and the program exits.
5530 .IP "\fB\-fstack\-protector\-all\fR" 4
5531 .IX Item "-fstack-protector-all"
5532 Like \fB\-fstack\-protector\fR except that all functions are protected.
5533 .IP "\fB\-fsection\-anchors\fR" 4
5534 .IX Item "-fsection-anchors"
5535 Try to reduce the number of symbolic address calculations by using
5536 shared \*(L"anchor\*(R" symbols to address nearby objects. This transformation
5537 can help to reduce the number of \s-1GOT\s0 entries and \s-1GOT\s0 accesses on some
5540 For example, the implementation of the following function \f(CW\*(C`foo\*(C'\fR:
5543 \& static int a, b, c;
5544 \& int foo (void) { return a + b + c; }
5547 would usually calculate the addresses of all three variables, but if you
5548 compile it with \fB\-fsection\-anchors\fR, it will access the variables
5549 from a common anchor point instead. The effect is similar to the
5550 following pseudocode (which isn't valid C):
5555 \& register int *xr = &x;
5556 \& return xr[&a \- &x] + xr[&b \- &x] + xr[&c \- &x];
5560 Not all targets support this option.
5561 .IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
5562 .IX Item "--param name=value"
5563 In some places, \s-1GCC\s0 uses various constants to control the amount of
5564 optimization that is done. For example, \s-1GCC\s0 will not inline functions
5565 that contain more that a certain number of instructions. You can
5566 control some of these constants on the command-line using the
5567 \&\fB\-\-param\fR option.
5569 The names of specific parameters, and the meaning of the values, are
5570 tied to the internals of the compiler, and are subject to change
5571 without notice in future releases.
5573 In each case, the \fIvalue\fR is an integer. The allowable choices for
5574 \&\fIname\fR are given in the following table:
5576 .IP "\fBsalias-max-implicit-fields\fR" 4
5577 .IX Item "salias-max-implicit-fields"
5578 The maximum number of fields in a variable without direct
5579 structure accesses for which structure aliasing will consider trying
5580 to track each field. The default is 5
5581 .IP "\fBsalias-max-array-elements\fR" 4
5582 .IX Item "salias-max-array-elements"
5583 The maximum number of elements an array can have and its elements
5584 still be tracked individually by structure aliasing. The default is 4
5585 .IP "\fBsra-max-structure-size\fR" 4
5586 .IX Item "sra-max-structure-size"
5587 The maximum structure size, in bytes, at which the scalar replacement
5588 of aggregates (\s-1SRA\s0) optimization will perform block copies. The
5589 default value, 0, implies that \s-1GCC\s0 will select the most appropriate
5591 .IP "\fBsra-field-structure-ratio\fR" 4
5592 .IX Item "sra-field-structure-ratio"
5593 The threshold ratio (as a percentage) between instantiated fields and
5594 the complete structure size. We say that if the ratio of the number
5595 of bytes in instantiated fields to the number of bytes in the complete
5596 structure exceeds this parameter, then block copies are not used. The
5598 .IP "\fBmax-crossjump-edges\fR" 4
5599 .IX Item "max-crossjump-edges"
5600 The maximum number of incoming edges to consider for crossjumping.
5601 The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
5602 the number of edges incoming to each block. Increasing values mean
5603 more aggressive optimization, making the compile time increase with
5604 probably small improvement in executable size.
5605 .IP "\fBmin-crossjump-insns\fR" 4
5606 .IX Item "min-crossjump-insns"
5607 The minimum number of instructions which must be matched at the end
5608 of two blocks before crossjumping will be performed on them. This
5609 value is ignored in the case where all instructions in the block being
5610 crossjumped from are matched. The default value is 5.
5611 .IP "\fBmax-grow-copy-bb-insns\fR" 4
5612 .IX Item "max-grow-copy-bb-insns"
5613 The maximum code size expansion factor when copying basic blocks
5614 instead of jumping. The expansion is relative to a jump instruction.
5615 The default value is 8.
5616 .IP "\fBmax-goto-duplication-insns\fR" 4
5617 .IX Item "max-goto-duplication-insns"
5618 The maximum number of instructions to duplicate to a block that jumps
5619 to a computed goto. To avoid O(N^2) behavior in a number of
5620 passes, \s-1GCC\s0 factors computed gotos early in the compilation process,
5621 and unfactors them as late as possible. Only computed jumps at the
5622 end of a basic blocks with no more than max-goto-duplication-insns are
5623 unfactored. The default value is 8.
5624 .IP "\fBmax-delay-slot-insn-search\fR" 4
5625 .IX Item "max-delay-slot-insn-search"
5626 The maximum number of instructions to consider when looking for an
5627 instruction to fill a delay slot. If more than this arbitrary number of
5628 instructions is searched, the time savings from filling the delay slot
5629 will be minimal so stop searching. Increasing values mean more
5630 aggressive optimization, making the compile time increase with probably
5631 small improvement in executable run time.
5632 .IP "\fBmax-delay-slot-live-search\fR" 4
5633 .IX Item "max-delay-slot-live-search"
5634 When trying to fill delay slots, the maximum number of instructions to
5635 consider when searching for a block with valid live register
5636 information. Increasing this arbitrarily chosen value means more
5637 aggressive optimization, increasing the compile time. This parameter
5638 should be removed when the delay slot code is rewritten to maintain the
5640 .IP "\fBmax-gcse-memory\fR" 4
5641 .IX Item "max-gcse-memory"
5642 The approximate maximum amount of memory that will be allocated in
5643 order to perform the global common subexpression elimination
5644 optimization. If more memory than specified is required, the
5645 optimization will not be done.
5646 .IP "\fBmax-gcse-passes\fR" 4
5647 .IX Item "max-gcse-passes"
5648 The maximum number of passes of \s-1GCSE\s0 to run. The default is 1.
5649 .IP "\fBmax-pending-list-length\fR" 4
5650 .IX Item "max-pending-list-length"
5651 The maximum number of pending dependencies scheduling will allow
5652 before flushing the current state and starting over. Large functions
5653 with few branches or calls can create excessively large lists which
5654 needlessly consume memory and resources.
5655 .IP "\fBmax-inline-insns-single\fR" 4
5656 .IX Item "max-inline-insns-single"
5657 Several parameters control the tree inliner used in gcc.
5658 This number sets the maximum number of instructions (counted in \s-1GCC\s0's
5659 internal representation) in a single function that the tree inliner
5660 will consider for inlining. This only affects functions declared
5661 inline and methods implemented in a class declaration (\*(C+).
5662 The default value is 450.
5663 .IP "\fBmax-inline-insns-auto\fR" 4
5664 .IX Item "max-inline-insns-auto"
5665 When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
5666 a lot of functions that would otherwise not be considered for inlining
5667 by the compiler will be investigated. To those functions, a different
5668 (more restrictive) limit compared to functions declared inline can
5670 The default value is 90.
5671 .IP "\fBlarge-function-insns\fR" 4
5672 .IX Item "large-function-insns"
5673 The limit specifying really large functions. For functions larger than this
5674 limit after inlining inlining is constrained by
5675 \&\fB\-\-param large-function-growth\fR. This parameter is useful primarily
5676 to avoid extreme compilation time caused by non-linear algorithms used by the
5678 This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
5679 The default value is 2700.
5680 .IP "\fBlarge-function-growth\fR" 4
5681 .IX Item "large-function-growth"
5682 Specifies maximal growth of large function caused by inlining in percents.
5683 This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
5684 The default value is 100 which limits large function growth to 2.0 times
5686 .IP "\fBlarge-unit-insns\fR" 4
5687 .IX Item "large-unit-insns"
5688 The limit specifying large translation unit. Growth caused by inlining of
5689 units larger than this limit is limited by \fB\-\-param inline-unit-growth\fR.
5690 For small units this might be too tight (consider unit consisting of function A
5691 that is inline and B that just calls A three time. If B is small relative to
5692 A, the growth of unit is 300\e% and yet such inlining is very sane. For very
5693 large units consisting of small inlininable functions however the overall unit
5694 growth limit is needed to avoid exponential explosion of code size. Thus for
5695 smaller units, the size is increased to \fB\-\-param large-unit-insns\fR
5696 before applying \fB\-\-param inline-unit-growth\fR. The default is 10000
5697 .IP "\fBinline-unit-growth\fR" 4
5698 .IX Item "inline-unit-growth"
5699 Specifies maximal overall growth of the compilation unit caused by inlining.
5700 This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
5701 The default value is 50 which limits unit growth to 1.5 times the original
5703 .IP "\fBmax-inline-insns-recursive\fR" 4
5704 .IX Item "max-inline-insns-recursive"
5706 .IP "\fBmax-inline-insns-recursive-auto\fR" 4
5707 .IX Item "max-inline-insns-recursive-auto"
5709 Specifies maximum number of instructions out-of-line copy of self recursive inline
5710 function can grow into by performing recursive inlining.
5712 For functions declared inline \fB\-\-param max-inline-insns-recursive\fR is
5713 taken into account. For function not declared inline, recursive inlining
5714 happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
5715 enabled and \fB\-\-param max-inline-insns-recursive-auto\fR is used. The
5716 default value is 450.
5717 .IP "\fBmax-inline-recursive-depth\fR" 4
5718 .IX Item "max-inline-recursive-depth"
5720 .IP "\fBmax-inline-recursive-depth-auto\fR" 4
5721 .IX Item "max-inline-recursive-depth-auto"
5723 Specifies maximum recursion depth used by the recursive inlining.
5725 For functions declared inline \fB\-\-param max-inline-recursive-depth\fR is
5726 taken into account. For function not declared inline, recursive inlining
5727 happens only when \fB\-finline\-functions\fR (included in \fB\-O3\fR) is
5728 enabled and \fB\-\-param max-inline-recursive-depth-auto\fR is used. The
5729 default value is 450.
5730 .IP "\fBmin-inline-recursive-probability\fR" 4
5731 .IX Item "min-inline-recursive-probability"
5732 Recursive inlining is profitable only for function having deep recursion
5733 in average and can hurt for function having little recursion depth by
5734 increasing the prologue size or complexity of function body to other
5737 When profile feedback is available (see \fB\-fprofile\-generate\fR) the actual
5738 recursion depth can be guessed from probability that function will recurse via
5739 given call expression. This parameter limits inlining only to call expression
5740 whose probability exceeds given threshold (in percents). The default value is
5742 .IP "\fBinline-call-cost\fR" 4
5743 .IX Item "inline-call-cost"
5744 Specify cost of call instruction relative to simple arithmetics operations
5745 (having cost of 1). Increasing this cost disqualifies inlining of non-leaf
5746 functions and at the same time increases size of leaf function that is believed to
5747 reduce function size by being inlined. In effect it increases amount of
5748 inlining for code having large abstraction penalty (many functions that just
5749 pass the arguments to other functions) and decrease inlining for code with low
5750 abstraction penalty. The default value is 16.
5751 .IP "\fBmax-unrolled-insns\fR" 4
5752 .IX Item "max-unrolled-insns"
5753 The maximum number of instructions that a loop should have if that loop
5754 is unrolled, and if the loop is unrolled, it determines how many times
5755 the loop code is unrolled.
5756 .IP "\fBmax-average-unrolled-insns\fR" 4
5757 .IX Item "max-average-unrolled-insns"
5758 The maximum number of instructions biased by probabilities of their execution
5759 that a loop should have if that loop is unrolled, and if the loop is unrolled,
5760 it determines how many times the loop code is unrolled.
5761 .IP "\fBmax-unroll-times\fR" 4
5762 .IX Item "max-unroll-times"
5763 The maximum number of unrollings of a single loop.
5764 .IP "\fBmax-peeled-insns\fR" 4
5765 .IX Item "max-peeled-insns"
5766 The maximum number of instructions that a loop should have if that loop
5767 is peeled, and if the loop is peeled, it determines how many times
5768 the loop code is peeled.
5769 .IP "\fBmax-peel-times\fR" 4
5770 .IX Item "max-peel-times"
5771 The maximum number of peelings of a single loop.
5772 .IP "\fBmax-completely-peeled-insns\fR" 4
5773 .IX Item "max-completely-peeled-insns"
5774 The maximum number of insns of a completely peeled loop.
5775 .IP "\fBmax-completely-peel-times\fR" 4
5776 .IX Item "max-completely-peel-times"
5777 The maximum number of iterations of a loop to be suitable for complete peeling.
5778 .IP "\fBmax-unswitch-insns\fR" 4
5779 .IX Item "max-unswitch-insns"
5780 The maximum number of insns of an unswitched loop.
5781 .IP "\fBmax-unswitch-level\fR" 4
5782 .IX Item "max-unswitch-level"
5783 The maximum number of branches unswitched in a single loop.
5784 .IP "\fBlim-expensive\fR" 4
5785 .IX Item "lim-expensive"
5786 The minimum cost of an expensive expression in the loop invariant motion.
5787 .IP "\fBiv-consider-all-candidates-bound\fR" 4
5788 .IX Item "iv-consider-all-candidates-bound"
5789 Bound on number of candidates for induction variables below that
5790 all candidates are considered for each use in induction variable
5791 optimizations. Only the most relevant candidates are considered
5792 if there are more candidates, to avoid quadratic time complexity.
5793 .IP "\fBiv-max-considered-uses\fR" 4
5794 .IX Item "iv-max-considered-uses"
5795 The induction variable optimizations give up on loops that contain more
5796 induction variable uses.
5797 .IP "\fBiv-always-prune-cand-set-bound\fR" 4
5798 .IX Item "iv-always-prune-cand-set-bound"
5799 If number of candidates in the set is smaller than this value,
5800 we always try to remove unnecessary ivs from the set during its
5801 optimization when a new iv is added to the set.
5802 .IP "\fBscev-max-expr-size\fR" 4
5803 .IX Item "scev-max-expr-size"
5804 Bound on size of expressions used in the scalar evolutions analyzer.
5805 Large expressions slow the analyzer.
5806 .IP "\fBvect-max-version-checks\fR" 4
5807 .IX Item "vect-max-version-checks"
5808 The maximum number of runtime checks that can be performed when doing
5809 loop versioning in the vectorizer. See option ftree-vect-loop-version
5810 for more information.
5811 .IP "\fBmax-iterations-to-track\fR" 4
5812 .IX Item "max-iterations-to-track"
5813 The maximum number of iterations of a loop the brute force algorithm
5814 for analysis of # of iterations of the loop tries to evaluate.
5815 .IP "\fBhot-bb-count-fraction\fR" 4
5816 .IX Item "hot-bb-count-fraction"
5817 Select fraction of the maximal count of repetitions of basic block in program
5818 given basic block needs to have to be considered hot.
5819 .IP "\fBhot-bb-frequency-fraction\fR" 4
5820 .IX Item "hot-bb-frequency-fraction"
5821 Select fraction of the maximal frequency of executions of basic block in
5822 function given basic block needs to have to be considered hot
5823 .IP "\fBmax-predicted-iterations\fR" 4
5824 .IX Item "max-predicted-iterations"
5825 The maximum number of loop iterations we predict statically. This is useful
5826 in cases where function contain single loop with known bound and other loop
5827 with unknown. We predict the known number of iterations correctly, while
5828 the unknown number of iterations average to roughly 10. This means that the
5829 loop without bounds would appear artificially cold relative to the other one.
5830 .IP "\fBtracer-dynamic-coverage\fR" 4
5831 .IX Item "tracer-dynamic-coverage"
5833 .IP "\fBtracer-dynamic-coverage-feedback\fR" 4
5834 .IX Item "tracer-dynamic-coverage-feedback"
5836 This value is used to limit superblock formation once the given percentage of
5837 executed instructions is covered. This limits unnecessary code size
5840 The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
5841 feedback is available. The real profiles (as opposed to statically estimated
5842 ones) are much less balanced allowing the threshold to be larger value.
5843 .IP "\fBtracer-max-code-growth\fR" 4
5844 .IX Item "tracer-max-code-growth"
5845 Stop tail duplication once code growth has reached given percentage. This is
5846 rather hokey argument, as most of the duplicates will be eliminated later in
5847 cross jumping, so it may be set to much higher values than is the desired code
5849 .IP "\fBtracer-min-branch-ratio\fR" 4
5850 .IX Item "tracer-min-branch-ratio"
5851 Stop reverse growth when the reverse probability of best edge is less than this
5852 threshold (in percent).
5853 .IP "\fBtracer-min-branch-ratio\fR" 4
5854 .IX Item "tracer-min-branch-ratio"
5856 .IP "\fBtracer-min-branch-ratio-feedback\fR" 4
5857 .IX Item "tracer-min-branch-ratio-feedback"
5859 Stop forward growth if the best edge do have probability lower than this
5862 Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
5863 compilation for profile feedback and one for compilation without. The value
5864 for compilation with profile feedback needs to be more conservative (higher) in
5865 order to make tracer effective.
5866 .IP "\fBmax-cse-path-length\fR" 4
5867 .IX Item "max-cse-path-length"
5868 Maximum number of basic blocks on path that cse considers. The default is 10.
5869 .IP "\fBmax-cse-insns\fR" 4
5870 .IX Item "max-cse-insns"
5871 The maximum instructions \s-1CSE\s0 process before flushing. The default is 1000.
5872 .IP "\fBglobal-var-threshold\fR" 4
5873 .IX Item "global-var-threshold"
5874 Counts the number of function calls (\fIn\fR) and the number of
5875 call-clobbered variables (\fIv\fR). If \fIn\fRx\fIv\fR is larger than this limit, a
5876 single artificial variable will be created to represent all the
5877 call-clobbered variables at function call sites. This artificial
5878 variable will then be made to alias every call-clobbered variable.
5879 (done as \f(CW\*(C`int * size_t\*(C'\fR on the host machine; beware overflow).
5880 .IP "\fBmax-aliased-vops\fR" 4
5881 .IX Item "max-aliased-vops"
5882 Maximum number of virtual operands allowed to represent aliases
5883 before triggering the alias grouping heuristic. Alias grouping
5884 reduces compile times and memory consumption needed for aliasing at
5885 the expense of precision loss in alias information.
5886 .IP "\fBggc-min-expand\fR" 4
5887 .IX Item "ggc-min-expand"
5888 \&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation. This
5889 parameter specifies the minimum percentage by which the garbage
5890 collector's heap should be allowed to expand between collections.
5891 Tuning this may improve compilation speed; it has no effect on code
5894 The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
5895 \&\s-1RAM\s0 >= 1GB. If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
5896 the smallest of actual \s-1RAM\s0 and \f(CW\*(C`RLIMIT_DATA\*(C'\fR or \f(CW\*(C`RLIMIT_AS\*(C'\fR. If
5897 \&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
5898 bound of 30% is used. Setting this parameter and
5899 \&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
5900 every opportunity. This is extremely slow, but can be useful for
5902 .IP "\fBggc-min-heapsize\fR" 4
5903 .IX Item "ggc-min-heapsize"
5904 Minimum size of the garbage collector's heap before it begins bothering
5905 to collect garbage. The first collection occurs after the heap expands
5906 by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR. Again,
5907 tuning this may improve compilation speed, and has no effect on code
5910 The default is the smaller of \s-1RAM/8\s0, \s-1RLIMIT_RSS\s0, or a limit which
5911 tries to ensure that \s-1RLIMIT_DATA\s0 or \s-1RLIMIT_AS\s0 are not exceeded, but
5912 with a lower bound of 4096 (four megabytes) and an upper bound of
5913 131072 (128 megabytes). If \s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a
5914 particular platform, the lower bound is used. Setting this parameter
5915 very large effectively disables garbage collection. Setting this
5916 parameter and \fBggc-min-expand\fR to zero causes a full collection
5917 to occur at every opportunity.
5918 .IP "\fBmax-reload-search-insns\fR" 4
5919 .IX Item "max-reload-search-insns"
5920 The maximum number of instruction reload should look backward for equivalent
5921 register. Increasing values mean more aggressive optimization, making the
5922 compile time increase with probably slightly better performance. The default
5924 .IP "\fBmax-cselib-memory-locations\fR" 4
5925 .IX Item "max-cselib-memory-locations"
5926 The maximum number of memory locations cselib should take into account.
5927 Increasing values mean more aggressive optimization, making the compile time
5928 increase with probably slightly better performance. The default value is 500.
5929 .IP "\fBmax-flow-memory-locations\fR" 4
5930 .IX Item "max-flow-memory-locations"
5931 Similar as \fBmax-cselib-memory-locations\fR but for dataflow liveness.
5932 The default value is 100.
5933 .IP "\fBreorder-blocks-duplicate\fR" 4
5934 .IX Item "reorder-blocks-duplicate"
5936 .IP "\fBreorder-blocks-duplicate-feedback\fR" 4
5937 .IX Item "reorder-blocks-duplicate-feedback"
5939 Used by basic block reordering pass to decide whether to use unconditional
5940 branch or duplicate the code on its destination. Code is duplicated when its
5941 estimated size is smaller than this value multiplied by the estimated size of
5942 unconditional jump in the hot spots of the program.
5944 The \fBreorder-block-duplicate-feedback\fR is used only when profile
5945 feedback is available and may be set to higher values than
5946 \&\fBreorder-block-duplicate\fR since information about the hot spots is more
5948 .IP "\fBmax-sched-ready-insns\fR" 4
5949 .IX Item "max-sched-ready-insns"
5950 The maximum number of instructions ready to be issued the scheduler should
5951 consider at any given time during the first scheduling pass. Increasing
5952 values mean more thorough searches, making the compilation time increase
5953 with probably little benefit. The default value is 100.
5954 .IP "\fBmax-sched-region-blocks\fR" 4
5955 .IX Item "max-sched-region-blocks"
5956 The maximum number of blocks in a region to be considered for
5957 interblock scheduling. The default value is 10.
5958 .IP "\fBmax-sched-region-insns\fR" 4
5959 .IX Item "max-sched-region-insns"
5960 The maximum number of insns in a region to be considered for
5961 interblock scheduling. The default value is 100.
5962 .IP "\fBmin-spec-prob\fR" 4
5963 .IX Item "min-spec-prob"
5964 The minimum probability (in percents) of reaching a source block
5965 for interblock speculative scheduling. The default value is 40.
5966 .IP "\fBmax-sched-extend-regions-iters\fR" 4
5967 .IX Item "max-sched-extend-regions-iters"
5968 The maximum number of iterations through \s-1CFG\s0 to extend regions.
5969 0 \- disable region extension,
5970 N \- do at most N iterations.
5971 The default value is 0.
5972 .IP "\fBmax-sched-insn-conflict-delay\fR" 4
5973 .IX Item "max-sched-insn-conflict-delay"
5974 The maximum conflict delay for an insn to be considered for speculative motion.
5975 The default value is 3.
5976 .IP "\fBsched-spec-prob-cutoff\fR" 4
5977 .IX Item "sched-spec-prob-cutoff"
5978 The minimal probability of speculation success (in percents), so that
5979 speculative insn will be scheduled.
5980 The default value is 40.
5981 .IP "\fBmax-last-value-rtl\fR" 4
5982 .IX Item "max-last-value-rtl"
5983 The maximum size measured as number of RTLs that can be recorded in an expression
5984 in combiner for a pseudo register as last known value of that register. The default
5986 .IP "\fBinteger-share-limit\fR" 4
5987 .IX Item "integer-share-limit"
5988 Small integer constants can use a shared data structure, reducing the
5989 compiler's memory usage and increasing its speed. This sets the maximum
5990 value of a shared integer constant's. The default value is 256.
5991 .IP "\fBmin-virtual-mappings\fR" 4
5992 .IX Item "min-virtual-mappings"
5993 Specifies the minimum number of virtual mappings in the incremental
5994 \&\s-1SSA\s0 updater that should be registered to trigger the virtual mappings
5995 heuristic defined by virtual\-mappings\-ratio. The default value is
5997 .IP "\fBvirtual-mappings-ratio\fR" 4
5998 .IX Item "virtual-mappings-ratio"
5999 If the number of virtual mappings is virtual-mappings-ratio bigger
6000 than the number of virtual symbols to be updated, then the incremental
6001 \&\s-1SSA\s0 updater switches to a full update for those symbols. The default
6003 .IP "\fBssp-buffer-size\fR" 4
6004 .IX Item "ssp-buffer-size"
6005 The minimum size of buffers (i.e. arrays) that will receive stack smashing
6006 protection when \fB\-fstack\-protection\fR is used.
6007 .IP "\fBmax-jump-thread-duplication-stmts\fR" 4
6008 .IX Item "max-jump-thread-duplication-stmts"
6009 Maximum number of statements allowed in a block that needs to be
6010 duplicated when threading jumps.
6011 .IP "\fBmax-fields-for-field-sensitive\fR" 4
6012 .IX Item "max-fields-for-field-sensitive"
6013 Maximum number of fields in a structure we will treat in
6014 a field sensitive manner during pointer analysis.
6018 .Sh "Options Controlling the Preprocessor"
6019 .IX Subsection "Options Controlling the Preprocessor"
6020 These options control the C preprocessor, which is run on each C source
6021 file before actual compilation.
6023 If you use the \fB\-E\fR option, nothing is done except preprocessing.
6024 Some of these options make sense only together with \fB\-E\fR because
6025 they cause the preprocessor output to be unsuitable for actual
6029 You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
6030 and pass \fIoption\fR directly through to the preprocessor. If
6031 \&\fIoption\fR contains commas, it is split into multiple options at the
6032 commas. However, many options are modified, translated or interpreted
6033 by the compiler driver before being passed to the preprocessor, and
6034 \&\fB\-Wp\fR forcibly bypasses this phase. The preprocessor's direct
6035 interface is undocumented and subject to change, so whenever possible
6036 you should avoid using \fB\-Wp\fR and let the driver handle the
6039 .IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
6040 .IX Item "-Xpreprocessor option"
6041 Pass \fIoption\fR as an option to the preprocessor. You can use this to
6042 supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
6045 If you want to pass an option that takes an argument, you must use
6046 \&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
6047 .IP "\fB\-D\fR \fIname\fR" 4
6049 Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
6050 .IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
6051 .IX Item "-D name=definition"
6052 The contents of \fIdefinition\fR are tokenized and processed as if
6053 they appeared during translation phase three in a \fB#define\fR
6054 directive. In particular, the definition will be truncated by
6055 embedded newline characters.
6057 If you are invoking the preprocessor from a shell or shell-like
6058 program you may need to use the shell's quoting syntax to protect
6059 characters such as spaces that have a meaning in the shell syntax.
6061 If you wish to define a function-like macro on the command line, write
6062 its argument list with surrounding parentheses before the equals sign
6063 (if any). Parentheses are meaningful to most shells, so you will need
6064 to quote the option. With \fBsh\fR and \fBcsh\fR,
6065 \&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
6067 \&\fB\-D\fR and \fB\-U\fR options are processed in the order they
6068 are given on the command line. All \fB\-imacros\fR \fIfile\fR and
6069 \&\fB\-include\fR \fIfile\fR options are processed after all
6070 \&\fB\-D\fR and \fB\-U\fR options.
6071 .IP "\fB\-U\fR \fIname\fR" 4
6073 Cancel any previous definition of \fIname\fR, either built in or
6074 provided with a \fB\-D\fR option.
6075 .IP "\fB\-undef\fR" 4
6077 Do not predefine any system-specific or GCC-specific macros. The
6078 standard predefined macros remain defined.
6079 .IP "\fB\-I\fR \fIdir\fR" 4
6081 Add the directory \fIdir\fR to the list of directories to be searched
6083 Directories named by \fB\-I\fR are searched before the standard
6084 system include directories. If the directory \fIdir\fR is a standard
6085 system include directory, the option is ignored to ensure that the
6086 default search order for system directories and the special treatment
6087 of system headers are not defeated
6089 .IP "\fB\-o\fR \fIfile\fR" 4
6091 Write output to \fIfile\fR. This is the same as specifying \fIfile\fR
6092 as the second non-option argument to \fBcpp\fR. \fBgcc\fR has a
6093 different interpretation of a second non-option argument, so you must
6094 use \fB\-o\fR to specify the output file.
6095 .IP "\fB\-Wall\fR" 4
6097 Turns on all optional warnings which are desirable for normal code.
6098 At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
6099 \&\fB\-Wmultichar\fR and a warning about integer promotion causing a
6100 change of sign in \f(CW\*(C`#if\*(C'\fR expressions. Note that many of the
6101 preprocessor's warnings are on by default and have no options to
6103 .IP "\fB\-Wcomment\fR" 4
6104 .IX Item "-Wcomment"
6106 .IP "\fB\-Wcomments\fR" 4
6107 .IX Item "-Wcomments"
6109 Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
6110 comment, or whenever a backslash-newline appears in a \fB//\fR comment.
6111 (Both forms have the same effect.)
6112 .IP "\fB\-Wtrigraphs\fR" 4
6113 .IX Item "-Wtrigraphs"
6114 Most trigraphs in comments cannot affect the meaning of the program.
6115 However, a trigraph that would form an escaped newline (\fB??/\fR at
6116 the end of a line) can, by changing where the comment begins or ends.
6117 Therefore, only trigraphs that would form escaped newlines produce
6118 warnings inside a comment.
6120 This option is implied by \fB\-Wall\fR. If \fB\-Wall\fR is not
6121 given, this option is still enabled unless trigraphs are enabled. To
6122 get trigraph conversion without warnings, but get the other
6123 \&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
6124 .IP "\fB\-Wtraditional\fR" 4
6125 .IX Item "-Wtraditional"
6126 Warn about certain constructs that behave differently in traditional and
6127 \&\s-1ISO\s0 C. Also warn about \s-1ISO\s0 C constructs that have no traditional C
6128 equivalent, and problematic constructs which should be avoided.
6129 .IP "\fB\-Wimport\fR" 4
6131 Warn the first time \fB#import\fR is used.
6132 .IP "\fB\-Wundef\fR" 4
6134 Warn whenever an identifier which is not a macro is encountered in an
6135 \&\fB#if\fR directive, outside of \fBdefined\fR. Such identifiers are
6137 .IP "\fB\-Wunused\-macros\fR" 4
6138 .IX Item "-Wunused-macros"
6139 Warn about macros defined in the main file that are unused. A macro
6140 is \fIused\fR if it is expanded or tested for existence at least once.
6141 The preprocessor will also warn if the macro has not been used at the
6142 time it is redefined or undefined.
6144 Built-in macros, macros defined on the command line, and macros
6145 defined in include files are not warned about.
6147 \&\fINote:\fR If a macro is actually used, but only used in skipped
6148 conditional blocks, then \s-1CPP\s0 will report it as unused. To avoid the
6149 warning in such a case, you might improve the scope of the macro's
6150 definition by, for example, moving it into the first skipped block.
6151 Alternatively, you could provide a dummy use with something like:
6154 \& #if defined the_macro_causing_the_warning
6157 .IP "\fB\-Wendif\-labels\fR" 4
6158 .IX Item "-Wendif-labels"
6159 Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
6160 This usually happens in code of the form
6170 The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
6171 in older programs. This warning is on by default.
6172 .IP "\fB\-Werror\fR" 4
6174 Make all warnings into hard errors. Source code which triggers warnings
6176 .IP "\fB\-Werror\-maybe\-reset\fR" 4
6177 .IX Item "-Werror-maybe-reset"
6178 Act like \fB\-Wno\-error\fR if the \fB\s-1GCC_NO_WERROR\s0\fR environment
6179 variable is set to anything other than 0 or empty.
6180 .IP "\fB\-Wsystem\-headers\fR" 4
6181 .IX Item "-Wsystem-headers"
6182 Issue warnings for code in system headers. These are normally unhelpful
6183 in finding bugs in your own code, therefore suppressed. If you are
6184 responsible for the system library, you may want to see them.
6187 Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
6188 .IP "\fB\-pedantic\fR" 4
6189 .IX Item "-pedantic"
6190 Issue all the mandatory diagnostics listed in the C standard. Some of
6191 them are left out by default, since they trigger frequently on harmless
6193 .IP "\fB\-pedantic\-errors\fR" 4
6194 .IX Item "-pedantic-errors"
6195 Issue all the mandatory diagnostics, and make all mandatory diagnostics
6196 into errors. This includes mandatory diagnostics that \s-1GCC\s0 issues
6197 without \fB\-pedantic\fR but treats as warnings.
6200 Instead of outputting the result of preprocessing, output a rule
6201 suitable for \fBmake\fR describing the dependencies of the main
6202 source file. The preprocessor outputs one \fBmake\fR rule containing
6203 the object file name for that source file, a colon, and the names of all
6204 the included files, including those coming from \fB\-include\fR or
6205 \&\fB\-imacros\fR command line options.
6207 Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
6208 object file name consists of the basename of the source file with any
6209 suffix replaced with object file suffix. If there are many included
6210 files then the rule is split into several lines using \fB\e\fR\-newline.
6211 The rule has no commands.
6213 This option does not suppress the preprocessor's debug output, such as
6214 \&\fB\-dM\fR. To avoid mixing such debug output with the dependency
6215 rules you should explicitly specify the dependency output file with
6216 \&\fB\-MF\fR, or use an environment variable like
6217 \&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR. Debug output
6218 will still be sent to the regular output stream as normal.
6220 Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
6221 warnings with an implicit \fB\-w\fR.
6224 Like \fB\-M\fR but do not mention header files that are found in
6225 system header directories, nor header files that are included,
6226 directly or indirectly, from such a header.
6228 This implies that the choice of angle brackets or double quotes in an
6229 \&\fB#include\fR directive does not in itself determine whether that
6230 header will appear in \fB\-MM\fR dependency output. This is a
6231 slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
6232 .IP "\fB\-MF\fR \fIfile\fR" 4
6234 When used with \fB\-M\fR or \fB\-MM\fR, specifies a
6235 file to write the dependencies to. If no \fB\-MF\fR switch is given
6236 the preprocessor sends the rules to the same place it would have sent
6237 preprocessed output.
6239 When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
6240 \&\fB\-MF\fR overrides the default dependency output file.
6243 In conjunction with an option such as \fB\-M\fR requesting
6244 dependency generation, \fB\-MG\fR assumes missing header files are
6245 generated files and adds them to the dependency list without raising
6246 an error. The dependency filename is taken directly from the
6247 \&\f(CW\*(C`#include\*(C'\fR directive without prepending any path. \fB\-MG\fR
6248 also suppresses preprocessed output, as a missing header file renders
6251 This feature is used in automatic updating of makefiles.
6254 This option instructs \s-1CPP\s0 to add a phony target for each dependency
6255 other than the main file, causing each to depend on nothing. These
6256 dummy rules work around errors \fBmake\fR gives if you remove header
6257 files without updating the \fIMakefile\fR to match.
6259 This is typical output:
6262 \& test.o: test.c test.h
6268 .IP "\fB\-MT\fR \fItarget\fR" 4
6269 .IX Item "-MT target"
6270 Change the target of the rule emitted by dependency generation. By
6271 default \s-1CPP\s0 takes the name of the main input file, including any path,
6272 deletes any file suffix such as \fB.c\fR, and appends the platform's
6273 usual object suffix. The result is the target.
6275 An \fB\-MT\fR option will set the target to be exactly the string you
6276 specify. If you want multiple targets, you can specify them as a single
6277 argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
6279 For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
6282 \& $(objpfx)foo.o: foo.c
6284 .IP "\fB\-MQ\fR \fItarget\fR" 4
6285 .IX Item "-MQ target"
6286 Same as \fB\-MT\fR, but it quotes any characters which are special to
6287 Make. \fB\-MQ\ '$(objpfx)foo.o'\fR gives
6290 \& $$(objpfx)foo.o: foo.c
6293 The default target is automatically quoted, as if it were given with
6297 \&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
6298 \&\fB\-E\fR is not implied. The driver determines \fIfile\fR based on
6299 whether an \fB\-o\fR option is given. If it is, the driver uses its
6300 argument but with a suffix of \fI.d\fR, otherwise it take the
6301 basename of the input file and applies a \fI.d\fR suffix.
6303 If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
6304 \&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
6305 is understood to specify a target object file.
6307 Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
6308 a dependency output file as a side-effect of the compilation process.
6311 Like \fB\-MD\fR except mention only user header files, not system
6313 .IP "\fB\-fpch\-deps\fR" 4
6314 .IX Item "-fpch-deps"
6315 When using precompiled headers, this flag
6316 will cause the dependency-output flags to also list the files from the
6317 precompiled header's dependencies. If not specified only the
6318 precompiled header would be listed and not the files that were used to
6319 create it because those files are not consulted when a precompiled
6321 .IP "\fB\-fpch\-preprocess\fR" 4
6322 .IX Item "-fpch-preprocess"
6323 This option allows use of a precompiled header together with \fB\-E\fR. It inserts a special \f(CW\*(C`#pragma\*(C'\fR,
6324 \&\f(CW\*(C`#pragma GCC pch_preprocess "<filename>"\*(C'\fR in the output to mark
6325 the place where the precompiled header was found, and its filename. When
6326 \&\fB\-fpreprocessed\fR is in use, \s-1GCC\s0 recognizes this \f(CW\*(C`#pragma\*(C'\fR and
6327 loads the \s-1PCH\s0.
6329 This option is off by default, because the resulting preprocessed output
6330 is only really suitable as input to \s-1GCC\s0. It is switched on by
6331 \&\fB\-save\-temps\fR.
6333 You should not write this \f(CW\*(C`#pragma\*(C'\fR in your own code, but it is
6334 safe to edit the filename if the \s-1PCH\s0 file is available in a different
6335 location. The filename may be absolute or it may be relative to \s-1GCC\s0's
6340 .IP "\fB\-x c++\fR" 4
6342 .IP "\fB\-x objective-c\fR" 4
6343 .IX Item "-x objective-c"
6344 .IP "\fB\-x assembler-with-cpp\fR" 4
6345 .IX Item "-x assembler-with-cpp"
6347 Specify the source language: C, \*(C+, Objective\-C, or assembly. This has
6348 nothing to do with standards conformance or extensions; it merely
6349 selects which base syntax to expect. If you give none of these options,
6350 cpp will deduce the language from the extension of the source file:
6351 \&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR. Some other common
6352 extensions for \*(C+ and assembly are also recognized. If cpp does not
6353 recognize the extension, it will treat the file as C; this is the most
6356 \&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
6357 which selected both the language and the standards conformance level.
6358 This option has been removed, because it conflicts with the \fB\-l\fR
6360 .IP "\fB\-std=\fR\fIstandard\fR" 4
6361 .IX Item "-std=standard"
6363 .IP "\fB\-ansi\fR" 4
6366 Specify the standard to which the code should conform. Currently \s-1CPP\s0
6367 knows about C and \*(C+ standards; others may be added in the future.
6372 .ie n .IP """iso9899:1990""" 4
6373 .el .IP "\f(CWiso9899:1990\fR" 4
6374 .IX Item "iso9899:1990"
6376 .ie n .IP """c89""" 4
6377 .el .IP "\f(CWc89\fR" 4
6380 The \s-1ISO\s0 C standard from 1990. \fBc89\fR is the customary shorthand for
6381 this version of the standard.
6383 The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
6384 .ie n .IP """iso9899:199409""" 4
6385 .el .IP "\f(CWiso9899:199409\fR" 4
6386 .IX Item "iso9899:199409"
6387 The 1990 C standard, as amended in 1994.
6388 .ie n .IP """iso9899:1999""" 4
6389 .el .IP "\f(CWiso9899:1999\fR" 4
6390 .IX Item "iso9899:1999"
6392 .ie n .IP """c99""" 4
6393 .el .IP "\f(CWc99\fR" 4
6395 .ie n .IP """iso9899:199x""" 4
6396 .el .IP "\f(CWiso9899:199x\fR" 4
6397 .IX Item "iso9899:199x"
6398 .ie n .IP """c9x""" 4
6399 .el .IP "\f(CWc9x\fR" 4
6402 The revised \s-1ISO\s0 C standard, published in December 1999. Before
6403 publication, this was known as C9X.
6404 .ie n .IP """gnu89""" 4
6405 .el .IP "\f(CWgnu89\fR" 4
6407 The 1990 C standard plus \s-1GNU\s0 extensions. This is the default.
6408 .ie n .IP """gnu99""" 4
6409 .el .IP "\f(CWgnu99\fR" 4
6412 .ie n .IP """gnu9x""" 4
6413 .el .IP "\f(CWgnu9x\fR" 4
6416 The 1999 C standard plus \s-1GNU\s0 extensions.
6417 .ie n .IP """c++98""" 4
6418 .el .IP "\f(CWc++98\fR" 4
6420 The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
6421 .ie n .IP """gnu++98""" 4
6422 .el .IP "\f(CWgnu++98\fR" 4
6424 The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions. This is the
6425 default for \*(C+ code.
6431 Split the include path. Any directories specified with \fB\-I\fR
6432 options before \fB\-I\-\fR are searched only for headers requested with
6433 \&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
6434 \&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR. If additional directories are
6435 specified with \fB\-I\fR options after the \fB\-I\-\fR, those
6436 directories are searched for all \fB#include\fR directives.
6438 In addition, \fB\-I\-\fR inhibits the use of the directory of the current
6439 file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
6440 This option has been deprecated.
6441 .IP "\fB\-nostdinc\fR" 4
6442 .IX Item "-nostdinc"
6443 Do not search the standard system directories for header files.
6444 Only the directories you have specified with \fB\-I\fR options
6445 (and the directory of the current file, if appropriate) are searched.
6446 .IP "\fB\-nostdinc++\fR" 4
6447 .IX Item "-nostdinc++"
6448 Do not search for header files in the \*(C+\-specific standard directories,
6449 but do still search the other standard directories. (This option is
6450 used when building the \*(C+ library.)
6451 .IP "\fB\-include\fR \fIfile\fR" 4
6452 .IX Item "-include file"
6453 Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
6454 line of the primary source file. However, the first directory searched
6455 for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
6456 the directory containing the main source file. If not found there, it
6457 is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
6460 If multiple \fB\-include\fR options are given, the files are included
6461 in the order they appear on the command line.
6462 .IP "\fB\-imacros\fR \fIfile\fR" 4
6463 .IX Item "-imacros file"
6464 Exactly like \fB\-include\fR, except that any output produced by
6465 scanning \fIfile\fR is thrown away. Macros it defines remain defined.
6466 This allows you to acquire all the macros from a header without also
6467 processing its declarations.
6469 All files specified by \fB\-imacros\fR are processed before all files
6470 specified by \fB\-include\fR.
6471 .IP "\fB\-idirafter\fR \fIdir\fR" 4
6472 .IX Item "-idirafter dir"
6473 Search \fIdir\fR for header files, but do it \fIafter\fR all
6474 directories specified with \fB\-I\fR and the standard system directories
6475 have been exhausted. \fIdir\fR is treated as a system include directory.
6476 .IP "\fB\-iprefix\fR \fIprefix\fR" 4
6477 .IX Item "-iprefix prefix"
6478 Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
6479 options. If the prefix represents a directory, you should include the
6481 .IP "\fB\-iwithprefix\fR \fIdir\fR" 4
6482 .IX Item "-iwithprefix dir"
6484 .IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
6485 .IX Item "-iwithprefixbefore dir"
6487 Append \fIdir\fR to the prefix specified previously with
6488 \&\fB\-iprefix\fR, and add the resulting directory to the include search
6489 path. \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
6490 would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
6491 .IP "\fB\-isysroot\fR \fIdir\fR" 4
6492 .IX Item "-isysroot dir"
6493 This option is like the \fB\-\-sysroot\fR option, but applies only to
6494 header files. See the \fB\-\-sysroot\fR option for more information.
6495 .IP "\fB\-imultilib\fR \fIdir\fR" 4
6496 .IX Item "-imultilib dir"
6497 Use \fIdir\fR as a subdirectory of the directory containing
6498 target-specific \*(C+ headers.
6499 .IP "\fB\-isystem\fR \fIdir\fR" 4
6500 .IX Item "-isystem dir"
6501 Search \fIdir\fR for header files, after all directories specified by
6502 \&\fB\-I\fR but before the standard system directories. Mark it
6503 as a system directory, so that it gets the same special treatment as
6504 is applied to the standard system directories.
6505 .IP "\fB\-iquote\fR \fIdir\fR" 4
6506 .IX Item "-iquote dir"
6507 Search \fIdir\fR only for header files requested with
6508 \&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
6509 \&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
6510 \&\fB\-I\fR and before the standard system directories.
6511 .IP "\fB\-fdollars\-in\-identifiers\fR" 4
6512 .IX Item "-fdollars-in-identifiers"
6513 Accept \fB$\fR in identifiers.
6514 .IP "\fB\-fextended\-identifiers\fR" 4
6515 .IX Item "-fextended-identifiers"
6516 Accept universal character names in identifiers. This option is
6517 experimental; in a future version of \s-1GCC\s0, it will be enabled by
6518 default for C99 and \*(C+.
6519 .IP "\fB\-fpreprocessed\fR" 4
6520 .IX Item "-fpreprocessed"
6521 Indicate to the preprocessor that the input file has already been
6522 preprocessed. This suppresses things like macro expansion, trigraph
6523 conversion, escaped newline splicing, and processing of most directives.
6524 The preprocessor still recognizes and removes comments, so that you can
6525 pass a file preprocessed with \fB\-C\fR to the compiler without
6526 problems. In this mode the integrated preprocessor is little more than
6527 a tokenizer for the front ends.
6529 \&\fB\-fpreprocessed\fR is implicit if the input file has one of the
6530 extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR. These are the
6531 extensions that \s-1GCC\s0 uses for preprocessed files created by
6532 \&\fB\-save\-temps\fR.
6533 .IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
6534 .IX Item "-ftabstop=width"
6535 Set the distance between tab stops. This helps the preprocessor report
6536 correct column numbers in warnings or errors, even if tabs appear on the
6537 line. If the value is less than 1 or greater than 100, the option is
6538 ignored. The default is 8.
6539 .IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
6540 .IX Item "-fexec-charset=charset"
6541 Set the execution character set, used for string and character
6542 constants. The default is \s-1UTF\-8\s0. \fIcharset\fR can be any encoding
6543 supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
6544 .IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
6545 .IX Item "-fwide-exec-charset=charset"
6546 Set the wide execution character set, used for wide string and
6547 character constants. The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
6548 corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR. As with
6549 \&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
6550 by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
6551 problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
6552 .IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
6553 .IX Item "-finput-charset=charset"
6554 Set the input character set, used for translation from the character
6555 set of the input file to the source character set used by \s-1GCC\s0. If the
6556 locale does not specify, or \s-1GCC\s0 cannot get this information from the
6557 locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
6558 or this command line option. Currently the command line option takes
6559 precedence if there's a conflict. \fIcharset\fR can be any encoding
6560 supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
6561 .IP "\fB\-fworking\-directory\fR" 4
6562 .IX Item "-fworking-directory"
6563 Enable generation of linemarkers in the preprocessor output that will
6564 let the compiler know the current working directory at the time of
6565 preprocessing. When this option is enabled, the preprocessor will
6566 emit, after the initial linemarker, a second linemarker with the
6567 current working directory followed by two slashes. \s-1GCC\s0 will use this
6568 directory, when it's present in the preprocessed input, as the
6569 directory emitted as the current working directory in some debugging
6570 information formats. This option is implicitly enabled if debugging
6571 information is enabled, but this can be inhibited with the negated
6572 form \fB\-fno\-working\-directory\fR. If the \fB\-P\fR flag is
6573 present in the command line, this option has no effect, since no
6574 \&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
6575 .IP "\fB\-fno\-show\-column\fR" 4
6576 .IX Item "-fno-show-column"
6577 Do not print column numbers in diagnostics. This may be necessary if
6578 diagnostics are being scanned by a program that does not understand the
6579 column numbers, such as \fBdejagnu\fR.
6580 .IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
6581 .IX Item "-A predicate=answer"
6582 Make an assertion with the predicate \fIpredicate\fR and answer
6583 \&\fIanswer\fR. This form is preferred to the older form \fB\-A\fR
6584 \&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
6585 it does not use shell special characters.
6586 .IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
6587 .IX Item "-A -predicate=answer"
6588 Cancel an assertion with the predicate \fIpredicate\fR and answer
6590 .IP "\fB\-dCHARS\fR" 4
6592 \&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
6593 and must not be preceded by a space. Other characters are interpreted
6594 by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
6595 are silently ignored. If you specify characters whose behavior
6596 conflicts, the result is undefined.
6600 Instead of the normal output, generate a list of \fB#define\fR
6601 directives for all the macros defined during the execution of the
6602 preprocessor, including predefined macros. This gives you a way of
6603 finding out what is predefined in your version of the preprocessor.
6604 Assuming you have no file \fIfoo.h\fR, the command
6607 \& touch foo.h; cpp \-dM foo.h
6610 will show all the predefined macros.
6613 Like \fBM\fR except in two respects: it does \fInot\fR include the
6614 predefined macros, and it outputs \fIboth\fR the \fB#define\fR
6615 directives and the result of preprocessing. Both kinds of output go to
6616 the standard output file.
6619 Like \fBD\fR, but emit only the macro names, not their expansions.
6622 Output \fB#include\fR directives in addition to the result of
6629 Inhibit generation of linemarkers in the output from the preprocessor.
6630 This might be useful when running the preprocessor on something that is
6631 not C code, and will be sent to a program which might be confused by the
6635 Do not discard comments. All comments are passed through to the output
6636 file, except for comments in processed directives, which are deleted
6637 along with the directive.
6639 You should be prepared for side effects when using \fB\-C\fR; it
6640 causes the preprocessor to treat comments as tokens in their own right.
6641 For example, comments appearing at the start of what would be a
6642 directive line have the effect of turning that line into an ordinary
6643 source line, since the first token on the line is no longer a \fB#\fR.
6646 Do not discard comments, including during macro expansion. This is
6647 like \fB\-C\fR, except that comments contained within macros are
6648 also passed through to the output file where the macro is expanded.
6650 In addition to the side-effects of the \fB\-C\fR option, the
6651 \&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
6652 to be converted to C\-style comments. This is to prevent later use
6653 of that macro from inadvertently commenting out the remainder of
6656 The \fB\-CC\fR option is generally used to support lint comments.
6657 .IP "\fB\-traditional\-cpp\fR" 4
6658 .IX Item "-traditional-cpp"
6659 Try to imitate the behavior of old-fashioned C preprocessors, as
6660 opposed to \s-1ISO\s0 C preprocessors.
6661 .IP "\fB\-trigraphs\fR" 4
6662 .IX Item "-trigraphs"
6663 Process trigraph sequences.
6664 These are three-character sequences, all starting with \fB??\fR, that
6665 are defined by \s-1ISO\s0 C to stand for single characters. For example,
6666 \&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
6667 constant for a newline. By default, \s-1GCC\s0 ignores trigraphs, but in
6668 standard-conforming modes it converts them. See the \fB\-std\fR and
6669 \&\fB\-ansi\fR options.
6671 The nine trigraphs and their replacements are
6674 \& Trigraph: ??( ??) ??< ??> ??= ??/ ??\(aq ??! ??\-
6675 \& Replacement: [ ] { } # \e ^ | ~
6677 .IP "\fB\-remap\fR" 4
6679 Enable special code to work around file systems which only permit very
6680 short file names, such as \s-1MS\-DOS\s0.
6681 .IP "\fB\-\-help\fR" 4
6684 .IP "\fB\-\-target\-help\fR" 4
6685 .IX Item "--target-help"
6687 Print text describing all the command line options instead of
6688 preprocessing anything.
6691 Verbose mode. Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
6692 execution, and report the final form of the include path.
6695 Print the name of each header file used, in addition to other normal
6696 activities. Each name is indented to show how deep in the
6697 \&\fB#include\fR stack it is. Precompiled header files are also
6698 printed, even if they are found to be invalid; an invalid precompiled
6699 header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
6700 .IP "\fB\-version\fR" 4
6703 .IP "\fB\-\-version\fR" 4
6704 .IX Item "--version"
6706 Print out \s-1GNU\s0 \s-1CPP\s0's version number. With one dash, proceed to
6707 preprocess as normal. With two dashes, exit immediately.
6708 .Sh "Passing Options to the Assembler"
6709 .IX Subsection "Passing Options to the Assembler"
6710 You can pass options to the assembler.
6711 .IP "\fB\-Wa,\fR\fIoption\fR" 4
6712 .IX Item "-Wa,option"
6713 Pass \fIoption\fR as an option to the assembler. If \fIoption\fR
6714 contains commas, it is split into multiple options at the commas.
6715 .IP "\fB\-Xassembler\fR \fIoption\fR" 4
6716 .IX Item "-Xassembler option"
6717 Pass \fIoption\fR as an option to the assembler. You can use this to
6718 supply system-specific assembler options which \s-1GCC\s0 does not know how to
6721 If you want to pass an option that takes an argument, you must use
6722 \&\fB\-Xassembler\fR twice, once for the option and once for the argument.
6723 .Sh "Options for Linking"
6724 .IX Subsection "Options for Linking"
6725 These options come into play when the compiler links object files into
6726 an executable output file. They are meaningless if the compiler is
6727 not doing a link step.
6728 .IP "\fIobject-file-name\fR" 4
6729 .IX Item "object-file-name"
6730 A file name that does not end in a special recognized suffix is
6731 considered to name an object file or library. (Object files are
6732 distinguished from libraries by the linker according to the file
6733 contents.) If linking is done, these object files are used as input
6743 If any of these options is used, then the linker is not run, and
6744 object file names should not be used as arguments.
6745 .IP "\fB\-l\fR\fIlibrary\fR" 4
6746 .IX Item "-llibrary"
6748 .IP "\fB\-l\fR \fIlibrary\fR" 4
6749 .IX Item "-l library"
6751 Search the library named \fIlibrary\fR when linking. (The second
6752 alternative with the library as a separate argument is only for
6753 \&\s-1POSIX\s0 compliance and is not recommended.)
6755 It makes a difference where in the command you write this option; the
6756 linker searches and processes libraries and object files in the order they
6757 are specified. Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
6758 after file \fIfoo.o\fR but before \fIbar.o\fR. If \fIbar.o\fR refers
6759 to functions in \fBz\fR, those functions may not be loaded.
6761 The linker searches a standard list of directories for the library,
6762 which is actually a file named \fIlib\fIlibrary\fI.a\fR. The linker
6763 then uses this file as if it had been specified precisely by name.
6765 The directories searched include several standard system directories
6766 plus any that you specify with \fB\-L\fR.
6768 Normally the files found this way are library files\-\-\-archive files
6769 whose members are object files. The linker handles an archive file by
6770 scanning through it for members which define symbols that have so far
6771 been referenced but not defined. But if the file that is found is an
6772 ordinary object file, it is linked in the usual fashion. The only
6773 difference between using an \fB\-l\fR option and specifying a file name
6774 is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
6775 and searches several directories.
6776 .IP "\fB\-lobjc\fR" 4
6778 You need this special case of the \fB\-l\fR option in order to
6779 link an Objective-C or Objective\-\*(C+ program.
6780 .IP "\fB\-nostartfiles\fR" 4
6781 .IX Item "-nostartfiles"
6782 Do not use the standard system startup files when linking.
6783 The standard system libraries are used normally, unless \fB\-nostdlib\fR
6784 or \fB\-nodefaultlibs\fR is used.
6785 .IP "\fB\-nodefaultlibs\fR" 4
6786 .IX Item "-nodefaultlibs"
6787 Do not use the standard system libraries when linking.
6788 Only the libraries you specify will be passed to the linker.
6789 The standard startup files are used normally, unless \fB\-nostartfiles\fR
6790 is used. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR,
6791 \&\f(CW\*(C`memset\*(C'\fR, \f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
6792 These entries are usually resolved by entries in
6793 libc. These entry points should be supplied through some other
6794 mechanism when this option is specified.
6795 .IP "\fB\-nostdlib\fR" 4
6796 .IX Item "-nostdlib"
6797 Do not use the standard system startup files or libraries when linking.
6798 No startup files and only the libraries you specify will be passed to
6799 the linker. The compiler may generate calls to \f(CW\*(C`memcmp\*(C'\fR, \f(CW\*(C`memset\*(C'\fR,
6800 \&\f(CW\*(C`memcpy\*(C'\fR and \f(CW\*(C`memmove\*(C'\fR.
6801 These entries are usually resolved by entries in
6802 libc. These entry points should be supplied through some other
6803 mechanism when this option is specified.
6805 One of the standard libraries bypassed by \fB\-nostdlib\fR and
6806 \&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
6807 that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
6808 needs for some languages.
6810 In most cases, you need \fIlibgcc.a\fR even when you want to avoid
6811 other standard libraries. In other words, when you specify \fB\-nostdlib\fR
6812 or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
6813 This ensures that you have no unresolved references to internal \s-1GCC\s0
6814 library subroutines. (For example, \fB_\|_main\fR, used to ensure \*(C+
6815 constructors will be called.)
6818 Produce a position independent executable on targets which support it.
6819 For predictable results, you must also specify the same set of options
6820 that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
6821 or model suboptions) when you specify this option.
6822 .IP "\fB\-rdynamic\fR" 4
6823 .IX Item "-rdynamic"
6824 Pass the flag \fB\-export\-dynamic\fR to the \s-1ELF\s0 linker, on targets
6825 that support it. This instructs the linker to add all symbols, not
6826 only used ones, to the dynamic symbol table. This option is needed
6827 for some uses of \f(CW\*(C`dlopen\*(C'\fR or to allow obtaining backtraces
6828 from within a program.
6831 Remove all symbol table and relocation information from the executable.
6832 .IP "\fB\-static\fR" 4
6834 On systems that support dynamic linking, this prevents linking with the shared
6835 libraries. On other systems, this option has no effect.
6836 .IP "\fB\-shared\fR" 4
6838 Produce a shared object which can then be linked with other objects to
6839 form an executable. Not all systems support this option. For predictable
6840 results, you must also specify the same set of options that were used to
6841 generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
6842 when you specify this option.[1]
6843 .IP "\fB\-shared\-libgcc\fR" 4
6844 .IX Item "-shared-libgcc"
6846 .IP "\fB\-static\-libgcc\fR" 4
6847 .IX Item "-static-libgcc"
6849 On systems that provide \fIlibgcc\fR as a shared library, these options
6850 force the use of either the shared or static version respectively.
6851 If no shared version of \fIlibgcc\fR was built when the compiler was
6852 configured, these options have no effect.
6854 There are several situations in which an application should use the
6855 shared \fIlibgcc\fR instead of the static version. The most common
6856 of these is when the application wishes to throw and catch exceptions
6857 across different shared libraries. In that case, each of the libraries
6858 as well as the application itself should use the shared \fIlibgcc\fR.
6860 Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
6861 \&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
6862 executable, because \*(C+ and Java programs typically use exceptions, so
6863 this is the right thing to do.
6865 If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
6866 find that they will not always be linked with the shared \fIlibgcc\fR.
6867 If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
6868 or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
6869 it will link the shared version of \fIlibgcc\fR into shared libraries
6870 by default. Otherwise, it will take advantage of the linker and optimize
6871 away the linking with the shared version of \fIlibgcc\fR, linking with
6872 the static version of libgcc by default. This allows exceptions to
6873 propagate through such shared libraries, without incurring relocation
6874 costs at library load time.
6876 However, if a library or main executable is supposed to throw or catch
6877 exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
6878 for the languages used in the program, or using the option
6879 \&\fB\-shared\-libgcc\fR, such that it is linked with the shared
6881 .IP "\fB\-symbolic\fR" 4
6882 .IX Item "-symbolic"
6883 Bind references to global symbols when building a shared object. Warn
6884 about any unresolved references (unless overridden by the link editor
6885 option \fB\-Xlinker \-z \-Xlinker defs\fR). Only a few systems support
6887 .IP "\fB\-Xlinker\fR \fIoption\fR" 4
6888 .IX Item "-Xlinker option"
6889 Pass \fIoption\fR as an option to the linker. You can use this to
6890 supply system-specific linker options which \s-1GCC\s0 does not know how to
6893 If you want to pass an option that takes an argument, you must use
6894 \&\fB\-Xlinker\fR twice, once for the option and once for the argument.
6895 For example, to pass \fB\-assert definitions\fR, you must write
6896 \&\fB\-Xlinker \-assert \-Xlinker definitions\fR. It does not work to write
6897 \&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
6898 string as a single argument, which is not what the linker expects.
6899 .IP "\fB\-Wl,\fR\fIoption\fR" 4
6900 .IX Item "-Wl,option"
6901 Pass \fIoption\fR as an option to the linker. If \fIoption\fR contains
6902 commas, it is split into multiple options at the commas.
6903 .IP "\fB\-u\fR \fIsymbol\fR" 4
6904 .IX Item "-u symbol"
6905 Pretend the symbol \fIsymbol\fR is undefined, to force linking of
6906 library modules to define it. You can use \fB\-u\fR multiple times with
6907 different symbols to force loading of additional library modules.
6908 .Sh "Options for Directory Search"
6909 .IX Subsection "Options for Directory Search"
6910 These options specify directories to search for header files, for
6911 libraries and for parts of the compiler:
6912 .IP "\fB\-I\fR\fIdir\fR" 4
6914 Add the directory \fIdir\fR to the head of the list of directories to be
6915 searched for header files. This can be used to override a system header
6916 file, substituting your own version, since these directories are
6917 searched before the system header file directories. However, you should
6918 not use this option to add directories that contain vendor-supplied
6919 system header files (use \fB\-isystem\fR for that). If you use more than
6920 one \fB\-I\fR option, the directories are scanned in left-to-right
6921 order; the standard system directories come after.
6923 If a standard system include directory, or a directory specified with
6924 \&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
6925 option will be ignored. The directory will still be searched but as a
6926 system directory at its normal position in the system include chain.
6927 This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
6928 the ordering for the include_next directive are not inadvertently changed.
6929 If you really need to change the search order for system directories,
6930 use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
6931 .IP "\fB\-iquote\fR\fIdir\fR" 4
6932 .IX Item "-iquotedir"
6933 Add the directory \fIdir\fR to the head of the list of directories to
6934 be searched for header files only for the case of \fB#include
6935 "\fR\fIfile\fR\fB"\fR; they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR,
6936 otherwise just like \fB\-I\fR.
6937 .IP "\fB\-L\fR\fIdir\fR" 4
6939 Add directory \fIdir\fR to the list of directories to be searched
6941 .IP "\fB\-B\fR\fIprefix\fR" 4
6943 This option specifies where to find the executables, libraries,
6944 include files, and data files of the compiler itself.
6946 The compiler driver program runs one or more of the subprograms
6947 \&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR. It tries
6948 \&\fIprefix\fR as a prefix for each program it tries to run, both with and
6949 without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
6951 For each subprogram to be run, the compiler driver first tries the
6952 \&\fB\-B\fR prefix, if any. If that name is not found, or if \fB\-B\fR
6953 was not specified, the driver tries two standard prefixes, which are
6954 \&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR. If neither of
6955 those results in a file name that is found, the unmodified program
6956 name is searched for using the directories specified in your
6957 \&\fB\s-1PATH\s0\fR environment variable.
6959 The compiler will check to see if the path provided by the \fB\-B\fR
6960 refers to a directory, and if necessary it will add a directory
6961 separator character at the end of the path.
6963 \&\fB\-B\fR prefixes that effectively specify directory names also apply
6964 to libraries in the linker, because the compiler translates these
6965 options into \fB\-L\fR options for the linker. They also apply to
6966 includes files in the preprocessor, because the compiler translates these
6967 options into \fB\-isystem\fR options for the preprocessor. In this case,
6968 the compiler appends \fBinclude\fR to the prefix.
6970 The run-time support file \fIlibgcc.a\fR can also be searched for using
6971 the \fB\-B\fR prefix, if needed. If it is not found there, the two
6972 standard prefixes above are tried, and that is all. The file is left
6973 out of the link if it is not found by those means.
6975 Another way to specify a prefix much like the \fB\-B\fR prefix is to use
6976 the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.
6978 As a special kludge, if the path provided by \fB\-B\fR is
6979 \&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
6980 9, then it will be replaced by \fI[dir/]include\fR. This is to help
6981 with boot-strapping the compiler.
6982 .IP "\fB\-specs=\fR\fIfile\fR" 4
6983 .IX Item "-specs=file"
6984 Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
6985 file, in order to override the defaults that the \fIgcc\fR driver
6986 program uses when determining what switches to pass to \fIcc1\fR,
6987 \&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc. More than one
6988 \&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
6989 are processed in order, from left to right.
6990 .IP "\fB\-\-sysroot=\fR\fIdir\fR" 4
6991 .IX Item "--sysroot=dir"
6992 Use \fIdir\fR as the logical root directory for headers and libraries.
6993 For example, if the compiler would normally search for headers in
6994 \&\fI/usr/include\fR and libraries in \fI/usr/lib\fR, it will instead
6995 search \fI\fIdir\fI/usr/include\fR and \fI\fIdir\fI/usr/lib\fR.
6997 If you use both this option and the \fB\-isysroot\fR option, then
6998 the \fB\-\-sysroot\fR option will apply to libraries, but the
6999 \&\fB\-isysroot\fR option will apply to header files.
7001 The \s-1GNU\s0 linker (beginning with version 2.16) has the necessary support
7002 for this option. If your linker does not support this option, the
7003 header file aspect of \fB\-\-sysroot\fR will still work, but the
7004 library aspect will not.
7007 This option has been deprecated. Please use \fB\-iquote\fR instead for
7008 \&\fB\-I\fR directories before the \fB\-I\-\fR and remove the \fB\-I\-\fR.
7009 Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
7010 option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
7011 they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
7013 If additional directories are specified with \fB\-I\fR options after
7014 the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
7015 directives. (Ordinarily \fIall\fR \fB\-I\fR directories are used
7018 In addition, the \fB\-I\-\fR option inhibits the use of the current
7019 directory (where the current input file came from) as the first search
7020 directory for \fB#include "\fR\fIfile\fR\fB"\fR. There is no way to
7021 override this effect of \fB\-I\-\fR. With \fB\-I.\fR you can specify
7022 searching the directory which was current when the compiler was
7023 invoked. That is not exactly the same as what the preprocessor does
7024 by default, but it is often satisfactory.
7026 \&\fB\-I\-\fR does not inhibit the use of the standard system directories
7027 for header files. Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
7029 .Sh "Specifying Target Machine and Compiler Version"
7030 .IX Subsection "Specifying Target Machine and Compiler Version"
7031 The usual way to run \s-1GCC\s0 is to run the executable called \fIgcc\fR, or
7032 \&\fI<machine>\-gcc\fR when cross\-compiling, or
7033 \&\fI<machine>\-gcc\-<version>\fR to run a version other than the one that
7034 was installed last. Sometimes this is inconvenient, so \s-1GCC\s0 provides
7035 options that will switch to another cross-compiler or version.
7036 .IP "\fB\-b\fR \fImachine\fR" 4
7037 .IX Item "-b machine"
7038 The argument \fImachine\fR specifies the target machine for compilation.
7040 The value to use for \fImachine\fR is the same as was specified as the
7041 machine type when configuring \s-1GCC\s0 as a cross\-compiler. For
7042 example, if a cross-compiler was configured with \fBconfigure
7043 arm-elf\fR, meaning to compile for an arm processor with elf binaries,
7044 then you would specify \fB\-b arm-elf\fR to run that cross compiler.
7045 Because there are other options beginning with \fB\-b\fR, the
7046 configuration must contain a hyphen.
7047 .IP "\fB\-V\fR \fIversion\fR" 4
7048 .IX Item "-V version"
7049 The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run.
7050 This is useful when multiple versions are installed. For example,
7051 \&\fIversion\fR might be \fB4.0\fR, meaning to run \s-1GCC\s0 version 4.0.
7053 The \fB\-V\fR and \fB\-b\fR options work by running the
7054 \&\fI<machine>\-gcc\-<version>\fR executable, so there's no real reason to
7055 use them if you can just run that directly.
7056 .Sh "Hardware Models and Configurations"
7057 .IX Subsection "Hardware Models and Configurations"
7058 Earlier we discussed the standard option \fB\-b\fR which chooses among
7059 different installed compilers for completely different target
7060 machines, such as \s-1VAX\s0 vs. 68000 vs. 80386.
7062 In addition, each of these target machine types can have its own
7063 special options, starting with \fB\-m\fR, to choose among various
7064 hardware models or configurations\-\-\-for example, 68010 vs 68020,
7065 floating coprocessor or none. A single installed version of the
7066 compiler can compile for any model or configuration, according to the
7069 Some configurations of the compiler also support additional special
7070 options, usually for compatibility with other compilers on the same
7073 \fI\s-1ARC\s0 Options\fR
7074 .IX Subsection "ARC Options"
7076 These options are defined for \s-1ARC\s0 implementations:
7079 Compile code for little endian mode. This is the default.
7082 Compile code for big endian mode.
7083 .IP "\fB\-mmangle\-cpu\fR" 4
7084 .IX Item "-mmangle-cpu"
7085 Prepend the name of the cpu to all public symbol names.
7086 In multiple-processor systems, there are many \s-1ARC\s0 variants with different
7087 instruction and register set characteristics. This flag prevents code
7088 compiled for one cpu to be linked with code compiled for another.
7089 No facility exists for handling variants that are \*(L"almost identical\*(R".
7090 This is an all or nothing option.
7091 .IP "\fB\-mcpu=\fR\fIcpu\fR" 4
7092 .IX Item "-mcpu=cpu"
7093 Compile code for \s-1ARC\s0 variant \fIcpu\fR.
7094 Which variants are supported depend on the configuration.
7095 All variants support \fB\-mcpu=base\fR, this is the default.
7096 .IP "\fB\-mtext=\fR\fItext-section\fR" 4
7097 .IX Item "-mtext=text-section"
7099 .IP "\fB\-mdata=\fR\fIdata-section\fR" 4
7100 .IX Item "-mdata=data-section"
7101 .IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
7102 .IX Item "-mrodata=readonly-data-section"
7104 Put functions, data, and readonly data in \fItext-section\fR,
7105 \&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
7106 by default. This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
7108 \fI\s-1ARM\s0 Options\fR
7109 .IX Subsection "ARM Options"
7111 These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
7113 .IP "\fB\-mabi=\fR\fIname\fR" 4
7114 .IX Item "-mabi=name"
7115 Generate code for the specified \s-1ABI\s0. Permissible values are: \fBapcs-gnu\fR,
7116 \&\fBatpcs\fR, \fBaapcs\fR, \fBaapcs-linux\fR and \fBiwmmxt\fR.
7117 .IP "\fB\-mapcs\-frame\fR" 4
7118 .IX Item "-mapcs-frame"
7119 Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
7120 Standard for all functions, even if this is not strictly necessary for
7121 correct execution of the code. Specifying \fB\-fomit\-frame\-pointer\fR
7122 with this option will cause the stack frames not to be generated for
7123 leaf functions. The default is \fB\-mno\-apcs\-frame\fR.
7124 .IP "\fB\-mapcs\fR" 4
7126 This is a synonym for \fB\-mapcs\-frame\fR.
7127 .IP "\fB\-mthumb\-interwork\fR" 4
7128 .IX Item "-mthumb-interwork"
7129 Generate code which supports calling between the \s-1ARM\s0 and Thumb
7130 instruction sets. Without this option the two instruction sets cannot
7131 be reliably used inside one program. The default is
7132 \&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
7133 when \fB\-mthumb\-interwork\fR is specified.
7134 .IP "\fB\-mno\-sched\-prolog\fR" 4
7135 .IX Item "-mno-sched-prolog"
7136 Prevent the reordering of instructions in the function prolog, or the
7137 merging of those instruction with the instructions in the function's
7138 body. This means that all functions will start with a recognizable set
7139 of instructions (or in fact one of a choice from a small set of
7140 different function prologues), and this information can be used to
7141 locate the start if functions inside an executable piece of code. The
7142 default is \fB\-msched\-prolog\fR.
7143 .IP "\fB\-mhard\-float\fR" 4
7144 .IX Item "-mhard-float"
7145 Generate output containing floating point instructions. This is the
7147 .IP "\fB\-msoft\-float\fR" 4
7148 .IX Item "-msoft-float"
7149 Generate output containing library calls for floating point.
7150 \&\fBWarning:\fR the requisite libraries are not available for all \s-1ARM\s0
7151 targets. Normally the facilities of the machine's usual C compiler are
7152 used, but this cannot be done directly in cross\-compilation. You must make
7153 your own arrangements to provide suitable library functions for
7156 \&\fB\-msoft\-float\fR changes the calling convention in the output file;
7157 therefore, it is only useful if you compile \fIall\fR of a program with
7158 this option. In particular, you need to compile \fIlibgcc.a\fR, the
7159 library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
7161 .IP "\fB\-mfloat\-abi=\fR\fIname\fR" 4
7162 .IX Item "-mfloat-abi=name"
7163 Specifies which \s-1ABI\s0 to use for floating point values. Permissible values
7164 are: \fBsoft\fR, \fBsoftfp\fR and \fBhard\fR.
7166 \&\fBsoft\fR and \fBhard\fR are equivalent to \fB\-msoft\-float\fR
7167 and \fB\-mhard\-float\fR respectively. \fBsoftfp\fR allows the generation
7168 of floating point instructions, but still uses the soft-float calling
7170 .IP "\fB\-mlittle\-endian\fR" 4
7171 .IX Item "-mlittle-endian"
7172 Generate code for a processor running in little-endian mode. This is
7173 the default for all standard configurations.
7174 .IP "\fB\-mbig\-endian\fR" 4
7175 .IX Item "-mbig-endian"
7176 Generate code for a processor running in big-endian mode; the default is
7177 to compile code for a little-endian processor.
7178 .IP "\fB\-mwords\-little\-endian\fR" 4
7179 .IX Item "-mwords-little-endian"
7180 This option only applies when generating code for big-endian processors.
7181 Generate code for a little-endian word order but a big-endian byte
7182 order. That is, a byte order of the form \fB32107654\fR. Note: this
7183 option should only be used if you require compatibility with code for
7184 big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
7186 .IP "\fB\-mcpu=\fR\fIname\fR" 4
7187 .IX Item "-mcpu=name"
7188 This specifies the name of the target \s-1ARM\s0 processor. \s-1GCC\s0 uses this name
7189 to determine what kind of instructions it can emit when generating
7190 assembly code. Permissible names are: \fBarm2\fR, \fBarm250\fR,
7191 \&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
7192 \&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
7193 \&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
7194 \&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
7195 \&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm7tdmi\-s\fR,
7196 \&\fBarm8\fR, \fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
7197 \&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
7198 \&\fBarm920t\fR, \fBarm922t\fR, \fBarm946e\-s\fR, \fBarm966e\-s\fR,
7199 \&\fBarm968e\-s\fR, \fBarm926ej\-s\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
7200 \&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ej\-s\fR,
7201 \&\fBarm10e\fR, \fBarm1020e\fR, \fBarm1022e\fR,
7202 \&\fBarm1136j\-s\fR, \fBarm1136jf\-s\fR, \fBmpcore\fR, \fBmpcorenovfp\fR,
7203 \&\fBarm1176jz\-s\fR, \fBarm1176jzf\-s\fR, \fBxscale\fR, \fBiwmmxt\fR,
7205 .IP "\fB\-mtune=\fR\fIname\fR" 4
7206 .IX Item "-mtune=name"
7207 This option is very similar to the \fB\-mcpu=\fR option, except that
7208 instead of specifying the actual target processor type, and hence
7209 restricting which instructions can be used, it specifies that \s-1GCC\s0 should
7210 tune the performance of the code as if the target were of the type
7211 specified in this option, but still choosing the instructions that it
7212 will generate based on the cpu specified by a \fB\-mcpu=\fR option.
7213 For some \s-1ARM\s0 implementations better performance can be obtained by using
7215 .IP "\fB\-march=\fR\fIname\fR" 4
7216 .IX Item "-march=name"
7217 This specifies the name of the target \s-1ARM\s0 architecture. \s-1GCC\s0 uses this
7218 name to determine what kind of instructions it can emit when generating
7219 assembly code. This option can be used in conjunction with or instead
7220 of the \fB\-mcpu=\fR option. Permissible names are: \fBarmv2\fR,
7221 \&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
7222 \&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5te\fR, \fBarmv6\fR, \fBarmv6j\fR,
7223 \&\fBiwmmxt\fR, \fBep9312\fR.
7224 .IP "\fB\-mfpu=\fR\fIname\fR" 4
7225 .IX Item "-mfpu=name"
7227 .IP "\fB\-mfpe=\fR\fInumber\fR" 4
7228 .IX Item "-mfpe=number"
7229 .IP "\fB\-mfp=\fR\fInumber\fR" 4
7230 .IX Item "-mfp=number"
7232 This specifies what floating point hardware (or hardware emulation) is
7233 available on the target. Permissible names are: \fBfpa\fR, \fBfpe2\fR,
7234 \&\fBfpe3\fR, \fBmaverick\fR, \fBvfp\fR. \fB\-mfp\fR and \fB\-mfpe\fR
7235 are synonyms for \fB\-mfpu\fR=\fBfpe\fR\fInumber\fR, for compatibility
7236 with older versions of \s-1GCC\s0.
7238 If \fB\-msoft\-float\fR is specified this specifies the format of
7239 floating point values.
7240 .IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
7241 .IX Item "-mstructure-size-boundary=n"
7242 The size of all structures and unions will be rounded up to a multiple
7243 of the number of bits set by this option. Permissible values are 8, 32
7244 and 64. The default value varies for different toolchains. For the \s-1COFF\s0
7245 targeted toolchain the default value is 8. A value of 64 is only allowed
7246 if the underlying \s-1ABI\s0 supports it.
7248 Specifying the larger number can produce faster, more efficient code, but
7249 can also increase the size of the program. Different values are potentially
7250 incompatible. Code compiled with one value cannot necessarily expect to
7251 work with code or libraries compiled with another value, if they exchange
7252 information using structures or unions.
7253 .IP "\fB\-mabort\-on\-noreturn\fR" 4
7254 .IX Item "-mabort-on-noreturn"
7255 Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
7256 \&\f(CW\*(C`noreturn\*(C'\fR function. It will be executed if the function tries to
7258 .IP "\fB\-mlong\-calls\fR" 4
7259 .IX Item "-mlong-calls"
7261 .IP "\fB\-mno\-long\-calls\fR" 4
7262 .IX Item "-mno-long-calls"
7264 Tells the compiler to perform function calls by first loading the
7265 address of the function into a register and then performing a subroutine
7266 call on this register. This switch is needed if the target function
7267 will lie outside of the 64 megabyte addressing range of the offset based
7268 version of subroutine call instruction.
7270 Even if this switch is enabled, not all function calls will be turned
7271 into long calls. The heuristic is that static functions, functions
7272 which have the \fBshort-call\fR attribute, functions that are inside
7273 the scope of a \fB#pragma no_long_calls\fR directive and functions whose
7274 definitions have already been compiled within the current compilation
7275 unit, will not be turned into long calls. The exception to this rule is
7276 that weak function definitions, functions with the \fBlong-call\fR
7277 attribute or the \fBsection\fR attribute, and functions that are within
7278 the scope of a \fB#pragma long_calls\fR directive, will always be
7279 turned into long calls.
7281 This feature is not enabled by default. Specifying
7282 \&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
7283 placing the function calls within the scope of a \fB#pragma
7284 long_calls_off\fR directive. Note these switches have no effect on how
7285 the compiler generates code to handle function calls via function
7287 .IP "\fB\-mnop\-fun\-dllimport\fR" 4
7288 .IX Item "-mnop-fun-dllimport"
7289 Disable support for the \f(CW\*(C`dllimport\*(C'\fR attribute.
7290 .IP "\fB\-msingle\-pic\-base\fR" 4
7291 .IX Item "-msingle-pic-base"
7292 Treat the register used for \s-1PIC\s0 addressing as read\-only, rather than
7293 loading it in the prologue for each function. The run-time system is
7294 responsible for initializing this register with an appropriate value
7295 before execution begins.
7296 .IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
7297 .IX Item "-mpic-register=reg"
7298 Specify the register to be used for \s-1PIC\s0 addressing. The default is R10
7299 unless stack-checking is enabled, when R9 is used.
7300 .IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
7301 .IX Item "-mcirrus-fix-invalid-insns"
7302 Insert NOPs into the instruction stream to in order to work around
7303 problems with invalid Maverick instruction combinations. This option
7304 is only valid if the \fB\-mcpu=ep9312\fR option has been used to
7305 enable generation of instructions for the Cirrus Maverick floating
7306 point co\-processor. This option is not enabled by default, since the
7307 problem is only present in older Maverick implementations. The default
7308 can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
7310 .IP "\fB\-mpoke\-function\-name\fR" 4
7311 .IX Item "-mpoke-function-name"
7312 Write the name of each function into the text section, directly
7313 preceding the function prologue. The generated code is similar to this:
7317 \& .ascii "arm_poke_function_name", 0
7320 \& .word 0xff000000 + (t1 \- t0)
7321 \& arm_poke_function_name
7323 \& stmfd sp!, {fp, ip, lr, pc}
7327 When performing a stack backtrace, code can inspect the value of
7328 \&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR. If the trace function then looks at
7329 location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
7330 there is a function name embedded immediately preceding this location
7331 and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
7332 .IP "\fB\-mthumb\fR" 4
7334 Generate code for the 16\-bit Thumb instruction set. The default is to
7335 use the 32\-bit \s-1ARM\s0 instruction set.
7336 .IP "\fB\-mtpcs\-frame\fR" 4
7337 .IX Item "-mtpcs-frame"
7338 Generate a stack frame that is compliant with the Thumb Procedure Call
7339 Standard for all non-leaf functions. (A leaf function is one that does
7340 not call any other functions.) The default is \fB\-mno\-tpcs\-frame\fR.
7341 .IP "\fB\-mtpcs\-leaf\-frame\fR" 4
7342 .IX Item "-mtpcs-leaf-frame"
7343 Generate a stack frame that is compliant with the Thumb Procedure Call
7344 Standard for all leaf functions. (A leaf function is one that does
7345 not call any other functions.) The default is \fB\-mno\-apcs\-leaf\-frame\fR.
7346 .IP "\fB\-mcallee\-super\-interworking\fR" 4
7347 .IX Item "-mcallee-super-interworking"
7348 Gives all externally visible functions in the file being compiled an \s-1ARM\s0
7349 instruction set header which switches to Thumb mode before executing the
7350 rest of the function. This allows these functions to be called from
7351 non-interworking code.
7352 .IP "\fB\-mcaller\-super\-interworking\fR" 4
7353 .IX Item "-mcaller-super-interworking"
7354 Allows calls via function pointers (including virtual functions) to
7355 execute correctly regardless of whether the target code has been
7356 compiled for interworking or not. There is a small overhead in the cost
7357 of executing a function pointer if this option is enabled.
7358 .IP "\fB\-mtp=\fR\fIname\fR" 4
7359 .IX Item "-mtp=name"
7360 Specify the access model for the thread local storage pointer. The valid
7361 models are \fBsoft\fR, which generates calls to \f(CW\*(C`_\|_aeabi_read_tp\*(C'\fR,
7362 \&\fBcp15\fR, which fetches the thread pointer from \f(CW\*(C`cp15\*(C'\fR directly
7363 (supported in the arm6k architecture), and \fBauto\fR, which uses the
7364 best available method for the selected processor. The default setting is
7367 \fI\s-1AVR\s0 Options\fR
7368 .IX Subsection "AVR Options"
7370 These options are defined for \s-1AVR\s0 implementations:
7371 .IP "\fB\-mmcu=\fR\fImcu\fR" 4
7372 .IX Item "-mmcu=mcu"
7373 Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
7375 Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
7376 compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
7377 attiny11, attiny12, attiny15, attiny28).
7379 Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
7380 8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
7381 at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
7382 at90c8534, at90s8535).
7384 Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
7385 memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
7387 Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
7388 memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
7390 Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
7391 memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
7392 atmega64, atmega128, at43usb355, at94k).
7393 .IP "\fB\-msize\fR" 4
7395 Output instruction sizes to the asm file.
7396 .IP "\fB\-minit\-stack=\fR\fIN\fR" 4
7397 .IX Item "-minit-stack=N"
7398 Specify the initial stack address, which may be a symbol or numeric value,
7399 \&\fB_\|_stack\fR is the default.
7400 .IP "\fB\-mno\-interrupts\fR" 4
7401 .IX Item "-mno-interrupts"
7402 Generated code is not compatible with hardware interrupts.
7403 Code size will be smaller.
7404 .IP "\fB\-mcall\-prologues\fR" 4
7405 .IX Item "-mcall-prologues"
7406 Functions prologues/epilogues expanded as call to appropriate
7407 subroutines. Code size will be smaller.
7408 .IP "\fB\-mno\-tablejump\fR" 4
7409 .IX Item "-mno-tablejump"
7410 Do not generate tablejump insns which sometimes increase code size.
7411 .IP "\fB\-mtiny\-stack\fR" 4
7412 .IX Item "-mtiny-stack"
7413 Change only the low 8 bits of the stack pointer.
7414 .IP "\fB\-mint8\fR" 4
7416 Assume int to be 8 bit integer. This affects the sizes of all types: A
7417 char will be 1 byte, an int will be 1 byte, an long will be 2 bytes
7418 and long long will be 4 bytes. Please note that this option does not
7419 comply to the C standards, but it will provide you with smaller code
7422 \fIBlackfin Options\fR
7423 .IX Subsection "Blackfin Options"
7424 .IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
7425 .IX Item "-momit-leaf-frame-pointer"
7426 Don't keep the frame pointer in a register for leaf functions. This
7427 avoids the instructions to save, set up and restore frame pointers and
7428 makes an extra register available in leaf functions. The option
7429 \&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
7430 which might make debugging harder.
7431 .IP "\fB\-mspecld\-anomaly\fR" 4
7432 .IX Item "-mspecld-anomaly"
7433 When enabled, the compiler will ensure that the generated code does not
7434 contain speculative loads after jump instructions. This option is enabled
7436 .IP "\fB\-mno\-specld\-anomaly\fR" 4
7437 .IX Item "-mno-specld-anomaly"
7438 Don't generate extra code to prevent speculative loads from occurring.
7439 .IP "\fB\-mcsync\-anomaly\fR" 4
7440 .IX Item "-mcsync-anomaly"
7441 When enabled, the compiler will ensure that the generated code does not
7442 contain \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions too soon after conditional branches.
7443 This option is enabled by default.
7444 .IP "\fB\-mno\-csync\-anomaly\fR" 4
7445 .IX Item "-mno-csync-anomaly"
7446 Don't generate extra code to prevent \s-1CSYNC\s0 or \s-1SSYNC\s0 instructions from
7447 occurring too soon after a conditional branch.
7448 .IP "\fB\-mlow\-64k\fR" 4
7449 .IX Item "-mlow-64k"
7450 When enabled, the compiler is free to take advantage of the knowledge that
7451 the entire program fits into the low 64k of memory.
7452 .IP "\fB\-mno\-low\-64k\fR" 4
7453 .IX Item "-mno-low-64k"
7454 Assume that the program is arbitrarily large. This is the default.
7455 .IP "\fB\-mid\-shared\-library\fR" 4
7456 .IX Item "-mid-shared-library"
7457 Generate code that supports shared libraries via the library \s-1ID\s0 method.
7458 This allows for execute in place and shared libraries in an environment
7459 without virtual memory management. This option implies \fB\-fPIC\fR.
7460 .IP "\fB\-mno\-id\-shared\-library\fR" 4
7461 .IX Item "-mno-id-shared-library"
7462 Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
7463 This is the default.
7464 .IP "\fB\-mshared\-library\-id=n\fR" 4
7465 .IX Item "-mshared-library-id=n"
7466 Specified the identification number of the \s-1ID\s0 based shared library being
7467 compiled. Specifying a value of 0 will generate more compact code, specifying
7468 other values will force the allocation of that number to the current
7469 library but is no more space or time efficient than omitting this option.
7470 .IP "\fB\-mlong\-calls\fR" 4
7471 .IX Item "-mlong-calls"
7473 .IP "\fB\-mno\-long\-calls\fR" 4
7474 .IX Item "-mno-long-calls"
7476 Tells the compiler to perform function calls by first loading the
7477 address of the function into a register and then performing a subroutine
7478 call on this register. This switch is needed if the target function
7479 will lie outside of the 24 bit addressing range of the offset based
7480 version of subroutine call instruction.
7482 This feature is not enabled by default. Specifying
7483 \&\fB\-mno\-long\-calls\fR will restore the default behavior. Note these
7484 switches have no effect on how the compiler generates code to handle
7485 function calls via function pointers.
7487 \fI\s-1CRIS\s0 Options\fR
7488 .IX Subsection "CRIS Options"
7490 These options are defined specifically for the \s-1CRIS\s0 ports.
7491 .IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
7492 .IX Item "-march=architecture-type"
7494 .IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
7495 .IX Item "-mcpu=architecture-type"
7497 Generate code for the specified architecture. The choices for
7498 \&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
7499 respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
7500 Default is \fBv0\fR except for cris\-axis\-linux\-gnu, where the default is
7502 .IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
7503 .IX Item "-mtune=architecture-type"
7504 Tune to \fIarchitecture-type\fR everything applicable about the generated
7505 code, except for the \s-1ABI\s0 and the set of available instructions. The
7506 choices for \fIarchitecture-type\fR are the same as for
7507 \&\fB\-march=\fR\fIarchitecture-type\fR.
7508 .IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
7509 .IX Item "-mmax-stack-frame=n"
7510 Warn when the stack frame of a function exceeds \fIn\fR bytes.
7511 .IP "\fB\-melinux\-stacksize=\fR\fIn\fR" 4
7512 .IX Item "-melinux-stacksize=n"
7513 Only available with the \fBcris-axis-aout\fR target. Arranges for
7514 indications in the program to the kernel loader that the stack of the
7515 program should be set to \fIn\fR bytes.
7516 .IP "\fB\-metrax4\fR" 4
7519 .IP "\fB\-metrax100\fR" 4
7520 .IX Item "-metrax100"
7522 The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
7523 \&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
7524 .IP "\fB\-mmul\-bug\-workaround\fR" 4
7525 .IX Item "-mmul-bug-workaround"
7527 .IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
7528 .IX Item "-mno-mul-bug-workaround"
7530 Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
7531 models where it applies. This option is active by default.
7532 .IP "\fB\-mpdebug\fR" 4
7534 Enable CRIS-specific verbose debug-related information in the assembly
7535 code. This option also has the effect to turn off the \fB#NO_APP\fR
7536 formatted-code indicator to the assembler at the beginning of the
7538 .IP "\fB\-mcc\-init\fR" 4
7539 .IX Item "-mcc-init"
7540 Do not use condition-code results from previous instruction; always emit
7541 compare and test instructions before use of condition codes.
7542 .IP "\fB\-mno\-side\-effects\fR" 4
7543 .IX Item "-mno-side-effects"
7544 Do not emit instructions with side-effects in addressing modes other than
7546 .IP "\fB\-mstack\-align\fR" 4
7547 .IX Item "-mstack-align"
7549 .IP "\fB\-mno\-stack\-align\fR" 4
7550 .IX Item "-mno-stack-align"
7551 .IP "\fB\-mdata\-align\fR" 4
7552 .IX Item "-mdata-align"
7553 .IP "\fB\-mno\-data\-align\fR" 4
7554 .IX Item "-mno-data-align"
7555 .IP "\fB\-mconst\-align\fR" 4
7556 .IX Item "-mconst-align"
7557 .IP "\fB\-mno\-const\-align\fR" 4
7558 .IX Item "-mno-const-align"
7560 These options (no\-options) arranges (eliminate arrangements) for the
7561 stack\-frame, individual data and constants to be aligned for the maximum
7562 single data access size for the chosen \s-1CPU\s0 model. The default is to
7563 arrange for 32\-bit alignment. \s-1ABI\s0 details such as structure layout are
7564 not affected by these options.
7565 .IP "\fB\-m32\-bit\fR" 4
7568 .IP "\fB\-m16\-bit\fR" 4
7570 .IP "\fB\-m8\-bit\fR" 4
7573 Similar to the stack\- data\- and const-align options above, these options
7574 arrange for stack\-frame, writable data and constants to all be 32\-bit,
7575 16\-bit or 8\-bit aligned. The default is 32\-bit alignment.
7576 .IP "\fB\-mno\-prologue\-epilogue\fR" 4
7577 .IX Item "-mno-prologue-epilogue"
7579 .IP "\fB\-mprologue\-epilogue\fR" 4
7580 .IX Item "-mprologue-epilogue"
7582 With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
7583 epilogue that sets up the stack-frame are omitted and no return
7584 instructions or return sequences are generated in the code. Use this
7585 option only together with visual inspection of the compiled code: no
7586 warnings or errors are generated when call-saved registers must be saved,
7587 or storage for local variable needs to be allocated.
7588 .IP "\fB\-mno\-gotplt\fR" 4
7589 .IX Item "-mno-gotplt"
7591 .IP "\fB\-mgotplt\fR" 4
7594 With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
7595 instruction sequences that load addresses for functions from the \s-1PLT\s0 part
7596 of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
7597 \&\s-1PLT\s0. The default is \fB\-mgotplt\fR.
7598 .IP "\fB\-maout\fR" 4
7600 Legacy no-op option only recognized with the cris-axis-aout target.
7601 .IP "\fB\-melf\fR" 4
7603 Legacy no-op option only recognized with the cris-axis-elf and
7604 cris-axis-linux-gnu targets.
7605 .IP "\fB\-melinux\fR" 4
7607 Only recognized with the cris-axis-aout target, where it selects a
7608 GNU/linux\-like multilib, include files and instruction set for
7610 .IP "\fB\-mlinux\fR" 4
7612 Legacy no-op option only recognized with the cris-axis-linux-gnu target.
7615 This option, recognized for the cris-axis-aout and cris-axis-elf arranges
7616 to link with input-output functions from a simulator library. Code,
7617 initialized data and zero-initialized data are allocated consecutively.
7618 .IP "\fB\-sim2\fR" 4
7620 Like \fB\-sim\fR, but pass linker options to locate initialized data at
7621 0x40000000 and zero-initialized data at 0x80000000.
7623 \fI\s-1CRX\s0 Options\fR
7624 .IX Subsection "CRX Options"
7626 These options are defined specifically for the \s-1CRX\s0 ports.
7627 .IP "\fB\-mmac\fR" 4
7629 Enable the use of multiply-accumulate instructions. Disabled by default.
7630 .IP "\fB\-mpush\-args\fR" 4
7631 .IX Item "-mpush-args"
7632 Push instructions will be used to pass outgoing arguments when functions
7633 are called. Enabled by default.
7635 \fIDarwin Options\fR
7636 .IX Subsection "Darwin Options"
7638 These options are defined for all architectures running the Darwin operating
7641 \&\s-1FSF\s0 \s-1GCC\s0 on Darwin does not create \*(L"fat\*(R" object files; it will create
7642 an object file for the single architecture that it was built to
7643 target. Apple's \s-1GCC\s0 on Darwin does create \*(L"fat\*(R" files if multiple
7644 \&\fB\-arch\fR options are used; it does so by running the compiler or
7645 linker multiple times and joining the results together with
7648 The subtype of the file created (like \fBppc7400\fR or \fBppc970\fR or
7649 \&\fBi686\fR) is determined by the flags that specify the \s-1ISA\s0
7650 that \s-1GCC\s0 is targetting, like \fB\-mcpu\fR or \fB\-march\fR. The
7651 \&\fB\-force_cpusubtype_ALL\fR option can be used to override this.
7653 The Darwin tools vary in their behavior when presented with an \s-1ISA\s0
7654 mismatch. The assembler, \fIas\fR, will only permit instructions to
7655 be used that are valid for the subtype of the file it is generating,
7656 so you cannot put 64\-bit instructions in an \fBppc750\fR object file.
7657 The linker for shared libraries, \fI/usr/bin/libtool\fR, will fail
7658 and print an error if asked to create a shared library with a less
7659 restrictive subtype than its input files (for instance, trying to put
7660 a \fBppc970\fR object file in a \fBppc7400\fR library). The linker
7661 for executables, \fIld\fR, will quietly give the executable the most
7662 restrictive subtype of any of its input files.
7663 .IP "\fB\-F\fR\fIdir\fR" 4
7665 Add the framework directory \fIdir\fR to the head of the list of
7666 directories to be searched for header files. These directories are
7667 interleaved with those specified by \fB\-I\fR options and are
7668 scanned in a left-to-right order.
7670 A framework directory is a directory with frameworks in it. A
7671 framework is a directory with a \fB\*(L"Headers\*(R"\fR and/or
7672 \&\fB\*(L"PrivateHeaders\*(R"\fR directory contained directly in it that ends
7673 in \fB\*(L".framework\*(R"\fR. The name of a framework is the name of this
7674 directory excluding the \fB\*(L".framework\*(R"\fR. Headers associated with
7675 the framework are found in one of those two directories, with
7676 \&\fB\*(L"Headers\*(R"\fR being searched first. A subframework is a framework
7677 directory that is in a framework's \fB\*(L"Frameworks\*(R"\fR directory.
7678 Includes of subframework headers can only appear in a header of a
7679 framework that contains the subframework, or in a sibling subframework
7680 header. Two subframeworks are siblings if they occur in the same
7681 framework. A subframework should not have the same name as a
7682 framework, a warning will be issued if this is violated. Currently a
7683 subframework cannot have subframeworks, in the future, the mechanism
7684 may be extended to support this. The standard frameworks can be found
7685 in \fB\*(L"/System/Library/Frameworks\*(R"\fR and
7686 \&\fB\*(L"/Library/Frameworks\*(R"\fR. An example include looks like
7687 \&\f(CW\*(C`#include <Framework/header.h>\*(C'\fR, where \fBFramework\fR denotes
7688 the name of the framework and header.h is found in the
7689 \&\fB\*(L"PrivateHeaders\*(R"\fR or \fB\*(L"Headers\*(R"\fR directory.
7690 .IP "\fB\-gused\fR" 4
7692 Emit debugging information for symbols that are used. For \s-1STABS\s0
7693 debugging format, this enables \fB\-feliminate\-unused\-debug\-symbols\fR.
7694 This is by default \s-1ON\s0.
7695 .IP "\fB\-gfull\fR" 4
7697 Emit debugging information for all symbols and types.
7698 .IP "\fB\-mmacosx\-version\-min=\fR\fIversion\fR" 4
7699 .IX Item "-mmacosx-version-min=version"
7700 The earliest version of MacOS X that this executable will run on
7701 is \fIversion\fR. Typical values of \fIversion\fR include \f(CW10.1\fR,
7702 \&\f(CW10.2\fR, and \f(CW10.3.9\fR.
7704 The default for this option is to make choices that seem to be most
7706 .IP "\fB\-mkernel\fR" 4
7708 Enable kernel development mode. The \fB\-mkernel\fR option sets
7709 \&\fB\-static\fR, \fB\-fno\-common\fR, \fB\-fno\-cxa\-atexit\fR,
7710 \&\fB\-fno\-exceptions\fR, \fB\-fno\-non\-call\-exceptions\fR,
7711 \&\fB\-fapple\-kext\fR, \fB\-fno\-weak\fR and \fB\-fno\-rtti\fR where
7712 applicable. This mode also sets \fB\-mno\-altivec\fR,
7713 \&\fB\-msoft\-float\fR, \fB\-fno\-builtin\fR and
7714 \&\fB\-mlong\-branch\fR for PowerPC targets.
7715 .IP "\fB\-mone\-byte\-bool\fR" 4
7716 .IX Item "-mone-byte-bool"
7717 Override the defaults for \fBbool\fR so that \fBsizeof(bool)==1\fR.
7718 By default \fBsizeof(bool)\fR is \fB4\fR when compiling for
7719 Darwin/PowerPC and \fB1\fR when compiling for Darwin/x86, so this
7720 option has no effect on x86.
7722 \&\fBWarning:\fR The \fB\-mone\-byte\-bool\fR switch causes \s-1GCC\s0
7723 to generate code that is not binary compatible with code generated
7724 without that switch. Using this switch may require recompiling all
7725 other modules in a program, including system libraries. Use this
7726 switch to conform to a non-default data model.
7727 .IP "\fB\-mfix\-and\-continue\fR" 4
7728 .IX Item "-mfix-and-continue"
7730 .IP "\fB\-ffix\-and\-continue\fR" 4
7731 .IX Item "-ffix-and-continue"
7732 .IP "\fB\-findirect\-data\fR" 4
7733 .IX Item "-findirect-data"
7735 Generate code suitable for fast turn around development. Needed to
7736 enable gdb to dynamically load \f(CW\*(C`.o\*(C'\fR files into already running
7737 programs. \fB\-findirect\-data\fR and \fB\-ffix\-and\-continue\fR
7738 are provided for backwards compatibility.
7739 .IP "\fB\-all_load\fR" 4
7740 .IX Item "-all_load"
7741 Loads all members of static archive libraries.
7742 See man \fIld\fR\|(1) for more information.
7743 .IP "\fB\-arch_errors_fatal\fR" 4
7744 .IX Item "-arch_errors_fatal"
7745 Cause the errors having to do with files that have the wrong architecture
7747 .IP "\fB\-bind_at_load\fR" 4
7748 .IX Item "-bind_at_load"
7749 Causes the output file to be marked such that the dynamic linker will
7750 bind all undefined references when the file is loaded or launched.
7751 .IP "\fB\-bundle\fR" 4
7753 Produce a Mach-o bundle format file.
7754 See man \fIld\fR\|(1) for more information.
7755 .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
7756 .IX Item "-bundle_loader executable"
7757 This option specifies the \fIexecutable\fR that will be loading the build
7758 output file being linked. See man \fIld\fR\|(1) for more information.
7759 .IP "\fB\-dynamiclib\fR" 4
7760 .IX Item "-dynamiclib"
7761 When passed this option, \s-1GCC\s0 will produce a dynamic library instead of
7762 an executable when linking, using the Darwin \fIlibtool\fR command.
7763 .IP "\fB\-force_cpusubtype_ALL\fR" 4
7764 .IX Item "-force_cpusubtype_ALL"
7765 This causes \s-1GCC\s0's output file to have the \fI\s-1ALL\s0\fR subtype, instead of
7766 one controlled by the \fB\-mcpu\fR or \fB\-march\fR option.
7767 .IP "\fB\-allowable_client\fR \fIclient_name\fR" 4
7768 .IX Item "-allowable_client client_name"
7770 .IP "\fB\-client_name\fR" 4
7771 .IX Item "-client_name"
7772 .IP "\fB\-compatibility_version\fR" 4
7773 .IX Item "-compatibility_version"
7774 .IP "\fB\-current_version\fR" 4
7775 .IX Item "-current_version"
7776 .IP "\fB\-dead_strip\fR" 4
7777 .IX Item "-dead_strip"
7778 .IP "\fB\-dependency\-file\fR" 4
7779 .IX Item "-dependency-file"
7780 .IP "\fB\-dylib_file\fR" 4
7781 .IX Item "-dylib_file"
7782 .IP "\fB\-dylinker_install_name\fR" 4
7783 .IX Item "-dylinker_install_name"
7784 .IP "\fB\-dynamic\fR" 4
7786 .IP "\fB\-exported_symbols_list\fR" 4
7787 .IX Item "-exported_symbols_list"
7788 .IP "\fB\-filelist\fR" 4
7789 .IX Item "-filelist"
7790 .IP "\fB\-flat_namespace\fR" 4
7791 .IX Item "-flat_namespace"
7792 .IP "\fB\-force_flat_namespace\fR" 4
7793 .IX Item "-force_flat_namespace"
7794 .IP "\fB\-headerpad_max_install_names\fR" 4
7795 .IX Item "-headerpad_max_install_names"
7796 .IP "\fB\-image_base\fR" 4
7797 .IX Item "-image_base"
7798 .IP "\fB\-init\fR" 4
7800 .IP "\fB\-install_name\fR" 4
7801 .IX Item "-install_name"
7802 .IP "\fB\-keep_private_externs\fR" 4
7803 .IX Item "-keep_private_externs"
7804 .IP "\fB\-multi_module\fR" 4
7805 .IX Item "-multi_module"
7806 .IP "\fB\-multiply_defined\fR" 4
7807 .IX Item "-multiply_defined"
7808 .IP "\fB\-multiply_defined_unused\fR" 4
7809 .IX Item "-multiply_defined_unused"
7810 .IP "\fB\-noall_load\fR" 4
7811 .IX Item "-noall_load"
7812 .IP "\fB\-no_dead_strip_inits_and_terms\fR" 4
7813 .IX Item "-no_dead_strip_inits_and_terms"
7814 .IP "\fB\-nofixprebinding\fR" 4
7815 .IX Item "-nofixprebinding"
7816 .IP "\fB\-nomultidefs\fR" 4
7817 .IX Item "-nomultidefs"
7818 .IP "\fB\-noprebind\fR" 4
7819 .IX Item "-noprebind"
7820 .IP "\fB\-noseglinkedit\fR" 4
7821 .IX Item "-noseglinkedit"
7822 .IP "\fB\-pagezero_size\fR" 4
7823 .IX Item "-pagezero_size"
7824 .IP "\fB\-prebind\fR" 4
7826 .IP "\fB\-prebind_all_twolevel_modules\fR" 4
7827 .IX Item "-prebind_all_twolevel_modules"
7828 .IP "\fB\-private_bundle\fR" 4
7829 .IX Item "-private_bundle"
7830 .IP "\fB\-read_only_relocs\fR" 4
7831 .IX Item "-read_only_relocs"
7832 .IP "\fB\-sectalign\fR" 4
7833 .IX Item "-sectalign"
7834 .IP "\fB\-sectobjectsymbols\fR" 4
7835 .IX Item "-sectobjectsymbols"
7836 .IP "\fB\-whyload\fR" 4
7838 .IP "\fB\-seg1addr\fR" 4
7839 .IX Item "-seg1addr"
7840 .IP "\fB\-sectcreate\fR" 4
7841 .IX Item "-sectcreate"
7842 .IP "\fB\-sectobjectsymbols\fR" 4
7843 .IX Item "-sectobjectsymbols"
7844 .IP "\fB\-sectorder\fR" 4
7845 .IX Item "-sectorder"
7846 .IP "\fB\-segaddr\fR" 4
7848 .IP "\fB\-segs_read_only_addr\fR" 4
7849 .IX Item "-segs_read_only_addr"
7850 .IP "\fB\-segs_read_write_addr\fR" 4
7851 .IX Item "-segs_read_write_addr"
7852 .IP "\fB\-seg_addr_table\fR" 4
7853 .IX Item "-seg_addr_table"
7854 .IP "\fB\-seg_addr_table_filename\fR" 4
7855 .IX Item "-seg_addr_table_filename"
7856 .IP "\fB\-seglinkedit\fR" 4
7857 .IX Item "-seglinkedit"
7858 .IP "\fB\-segprot\fR" 4
7860 .IP "\fB\-segs_read_only_addr\fR" 4
7861 .IX Item "-segs_read_only_addr"
7862 .IP "\fB\-segs_read_write_addr\fR" 4
7863 .IX Item "-segs_read_write_addr"
7864 .IP "\fB\-single_module\fR" 4
7865 .IX Item "-single_module"
7866 .IP "\fB\-static\fR" 4
7868 .IP "\fB\-sub_library\fR" 4
7869 .IX Item "-sub_library"
7870 .IP "\fB\-sub_umbrella\fR" 4
7871 .IX Item "-sub_umbrella"
7872 .IP "\fB\-twolevel_namespace\fR" 4
7873 .IX Item "-twolevel_namespace"
7874 .IP "\fB\-umbrella\fR" 4
7875 .IX Item "-umbrella"
7876 .IP "\fB\-undefined\fR" 4
7877 .IX Item "-undefined"
7878 .IP "\fB\-unexported_symbols_list\fR" 4
7879 .IX Item "-unexported_symbols_list"
7880 .IP "\fB\-weak_reference_mismatches\fR" 4
7881 .IX Item "-weak_reference_mismatches"
7882 .IP "\fB\-whatsloaded\fR" 4
7883 .IX Item "-whatsloaded"
7885 These options are passed to the Darwin linker. The Darwin linker man page
7886 describes them in detail.
7888 \fI\s-1DEC\s0 Alpha Options\fR
7889 .IX Subsection "DEC Alpha Options"
7891 These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
7892 .IP "\fB\-mno\-soft\-float\fR" 4
7893 .IX Item "-mno-soft-float"
7895 .IP "\fB\-msoft\-float\fR" 4
7896 .IX Item "-msoft-float"
7898 Use (do not use) the hardware floating-point instructions for
7899 floating-point operations. When \fB\-msoft\-float\fR is specified,
7900 functions in \fIlibgcc.a\fR will be used to perform floating-point
7901 operations. Unless they are replaced by routines that emulate the
7902 floating-point operations, or compiled in such a way as to call such
7903 emulations routines, these routines will issue floating-point
7904 operations. If you are compiling for an Alpha without floating-point
7905 operations, you must ensure that the library is built so as not to call
7908 Note that Alpha implementations without floating-point operations are
7909 required to have floating-point registers.
7910 .IP "\fB\-mfp\-reg\fR" 4
7913 .IP "\fB\-mno\-fp\-regs\fR" 4
7914 .IX Item "-mno-fp-regs"
7916 Generate code that uses (does not use) the floating-point register set.
7917 \&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR. If the floating-point
7918 register set is not used, floating point operands are passed in integer
7919 registers as if they were integers and floating-point results are passed
7920 in \f(CW$0\fR instead of \f(CW$f0\fR. This is a non-standard calling sequence,
7921 so any function with a floating-point argument or return value called by code
7922 compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
7925 A typical use of this option is building a kernel that does not use,
7926 and hence need not save and restore, any floating-point registers.
7927 .IP "\fB\-mieee\fR" 4
7929 The Alpha architecture implements floating-point hardware optimized for
7930 maximum performance. It is mostly compliant with the \s-1IEEE\s0 floating
7931 point standard. However, for full compliance, software assistance is
7932 required. This option generates code fully \s-1IEEE\s0 compliant code
7933 \&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
7934 If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
7935 defined during compilation. The resulting code is less efficient but is
7936 able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
7937 values such as not-a-number and plus/minus infinity. Other Alpha
7938 compilers call this option \fB\-ieee_with_no_inexact\fR.
7939 .IP "\fB\-mieee\-with\-inexact\fR" 4
7940 .IX Item "-mieee-with-inexact"
7941 This is like \fB\-mieee\fR except the generated code also maintains
7942 the \s-1IEEE\s0 \fIinexact-flag\fR. Turning on this option causes the
7943 generated code to implement fully-compliant \s-1IEEE\s0 math. In addition to
7944 \&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
7945 macro. On some Alpha implementations the resulting code may execute
7946 significantly slower than the code generated by default. Since there is
7947 very little code that depends on the \fIinexact-flag\fR, you should
7948 normally not specify this option. Other Alpha compilers call this
7949 option \fB\-ieee_with_inexact\fR.
7950 .IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
7951 .IX Item "-mfp-trap-mode=trap-mode"
7952 This option controls what floating-point related traps are enabled.
7953 Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
7954 The trap mode can be set to one of four values:
7958 This is the default (normal) setting. The only traps that are enabled
7959 are the ones that cannot be disabled in software (e.g., division by zero
7963 In addition to the traps enabled by \fBn\fR, underflow traps are enabled
7967 Like \fBu\fR, but the instructions are marked to be safe for software
7968 completion (see Alpha architecture manual for details).
7971 Like \fBsu\fR, but inexact traps are enabled as well.
7975 .IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
7976 .IX Item "-mfp-rounding-mode=rounding-mode"
7977 Selects the \s-1IEEE\s0 rounding mode. Other Alpha compilers call this option
7978 \&\fB\-fprm\fR \fIrounding-mode\fR. The \fIrounding-mode\fR can be one
7983 Normal \s-1IEEE\s0 rounding mode. Floating point numbers are rounded towards
7984 the nearest machine number or towards the even machine number in case
7988 Round towards minus infinity.
7991 Chopped rounding mode. Floating point numbers are rounded towards zero.
7994 Dynamic rounding mode. A field in the floating point control register
7995 (\fIfpcr\fR, see Alpha architecture reference manual) controls the
7996 rounding mode in effect. The C library initializes this register for
7997 rounding towards plus infinity. Thus, unless your program modifies the
7998 \&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
8002 .IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
8003 .IX Item "-mtrap-precision=trap-precision"
8004 In the Alpha architecture, floating point traps are imprecise. This
8005 means without software assistance it is impossible to recover from a
8006 floating trap and program execution normally needs to be terminated.
8007 \&\s-1GCC\s0 can generate code that can assist operating system trap handlers
8008 in determining the exact location that caused a floating point trap.
8009 Depending on the requirements of an application, different levels of
8010 precisions can be selected:
8014 Program precision. This option is the default and means a trap handler
8015 can only identify which program caused a floating point exception.
8018 Function precision. The trap handler can determine the function that
8019 caused a floating point exception.
8022 Instruction precision. The trap handler can determine the exact
8023 instruction that caused a floating point exception.
8027 Other Alpha compilers provide the equivalent options called
8028 \&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
8030 .IP "\fB\-mieee\-conformant\fR" 4
8031 .IX Item "-mieee-conformant"
8032 This option marks the generated code as \s-1IEEE\s0 conformant. You must not
8033 use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
8034 \&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR. Its only effect
8035 is to emit the line \fB.eflag 48\fR in the function prologue of the
8036 generated assembly file. Under \s-1DEC\s0 Unix, this has the effect that
8037 IEEE-conformant math library routines will be linked in.
8038 .IP "\fB\-mbuild\-constants\fR" 4
8039 .IX Item "-mbuild-constants"
8040 Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
8041 see if it can construct it from smaller constants in two or three
8042 instructions. If it cannot, it will output the constant as a literal and
8043 generate code to load it from the data segment at runtime.
8045 Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
8046 using code, even if it takes more instructions (the maximum is six).
8048 You would typically use this option to build a shared library dynamic
8049 loader. Itself a shared library, it must relocate itself in memory
8050 before it can find the variables and constants in its own data segment.
8051 .IP "\fB\-malpha\-as\fR" 4
8052 .IX Item "-malpha-as"
8054 .IP "\fB\-mgas\fR" 4
8057 Select whether to generate code to be assembled by the vendor-supplied
8058 assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
8059 .IP "\fB\-mbwx\fR" 4
8062 .IP "\fB\-mno\-bwx\fR" 4
8064 .IP "\fB\-mcix\fR" 4
8066 .IP "\fB\-mno\-cix\fR" 4
8068 .IP "\fB\-mfix\fR" 4
8070 .IP "\fB\-mno\-fix\fR" 4
8072 .IP "\fB\-mmax\fR" 4
8074 .IP "\fB\-mno\-max\fR" 4
8077 Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
8078 \&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets. The default is to use the instruction
8079 sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
8080 of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
8081 .IP "\fB\-mfloat\-vax\fR" 4
8082 .IX Item "-mfloat-vax"
8084 .IP "\fB\-mfloat\-ieee\fR" 4
8085 .IX Item "-mfloat-ieee"
8087 Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
8088 arithmetic instead of \s-1IEEE\s0 single and double precision.
8089 .IP "\fB\-mexplicit\-relocs\fR" 4
8090 .IX Item "-mexplicit-relocs"
8092 .IP "\fB\-mno\-explicit\-relocs\fR" 4
8093 .IX Item "-mno-explicit-relocs"
8095 Older Alpha assemblers provided no way to generate symbol relocations
8096 except via assembler macros. Use of these macros does not allow
8097 optimal instruction scheduling. \s-1GNU\s0 binutils as of version 2.12
8098 supports a new syntax that allows the compiler to explicitly mark
8099 which relocations should apply to which instructions. This option
8100 is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
8101 the assembler when it is built and sets the default accordingly.
8102 .IP "\fB\-msmall\-data\fR" 4
8103 .IX Item "-msmall-data"
8105 .IP "\fB\-mlarge\-data\fR" 4
8106 .IX Item "-mlarge-data"
8108 When \fB\-mexplicit\-relocs\fR is in effect, static data is
8109 accessed via \fIgp-relative\fR relocations. When \fB\-msmall\-data\fR
8110 is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
8111 (the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
8112 16\-bit relocations off of the \f(CW$gp\fR register. This limits the
8113 size of the small data area to 64KB, but allows the variables to be
8114 directly accessed via a single instruction.
8116 The default is \fB\-mlarge\-data\fR. With this option the data area
8117 is limited to just below 2GB. Programs that require more than 2GB of
8118 data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
8119 heap instead of in the program's data segment.
8121 When generating code for shared libraries, \fB\-fpic\fR implies
8122 \&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
8123 .IP "\fB\-msmall\-text\fR" 4
8124 .IX Item "-msmall-text"
8126 .IP "\fB\-mlarge\-text\fR" 4
8127 .IX Item "-mlarge-text"
8129 When \fB\-msmall\-text\fR is used, the compiler assumes that the
8130 code of the entire program (or shared library) fits in 4MB, and is
8131 thus reachable with a branch instruction. When \fB\-msmall\-data\fR
8132 is used, the compiler can assume that all local symbols share the
8133 same \f(CW$gp\fR value, and thus reduce the number of instructions
8134 required for a function call from 4 to 1.
8136 The default is \fB\-mlarge\-text\fR.
8137 .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
8138 .IX Item "-mcpu=cpu_type"
8139 Set the instruction set and instruction scheduling parameters for
8140 machine type \fIcpu_type\fR. You can specify either the \fB\s-1EV\s0\fR
8141 style name or the corresponding chip number. \s-1GCC\s0 supports scheduling
8142 parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
8143 choose the default values for the instruction set from the processor
8144 you specify. If you do not specify a processor type, \s-1GCC\s0 will default
8145 to the processor on which the compiler was built.
8147 Supported values for \fIcpu_type\fR are
8157 Schedules as an \s-1EV4\s0 and has no instruction set extensions.
8164 Schedules as an \s-1EV5\s0 and has no instruction set extensions.
8168 .IP "\fB21164a\fR" 4
8171 Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
8175 .IP "\fB21164pc\fR" 4
8177 .IP "\fB21164PC\fR" 4
8180 Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
8187 Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
8191 .IP "\fB21264a\fR" 4
8194 Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
8198 .IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
8199 .IX Item "-mtune=cpu_type"
8200 Set only the instruction scheduling parameters for machine type
8201 \&\fIcpu_type\fR. The instruction set is not changed.
8202 .IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
8203 .IX Item "-mmemory-latency=time"
8204 Sets the latency the scheduler should assume for typical memory
8205 references as seen by the application. This number is highly
8206 dependent on the memory access patterns used by the application
8207 and the size of the external cache on the machine.
8209 Valid options for \fItime\fR are
8211 .IP "\fInumber\fR" 4
8213 A decimal number representing clock cycles.
8224 The compiler contains estimates of the number of clock cycles for
8225 \&\*(L"typical\*(R" \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
8226 (also called Dcache, Scache, and Bcache), as well as to main memory.
8227 Note that L3 is only valid for \s-1EV5\s0.
8232 \fI\s-1DEC\s0 Alpha/VMS Options\fR
8233 .IX Subsection "DEC Alpha/VMS Options"
8235 These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
8236 .IP "\fB\-mvms\-return\-codes\fR" 4
8237 .IX Item "-mvms-return-codes"
8238 Return \s-1VMS\s0 condition codes from main. The default is to return \s-1POSIX\s0
8239 style condition (e.g. error) codes.
8241 \fI\s-1FRV\s0 Options\fR
8242 .IX Subsection "FRV Options"
8243 .IP "\fB\-mgpr\-32\fR" 4
8245 Only use the first 32 general purpose registers.
8246 .IP "\fB\-mgpr\-64\fR" 4
8248 Use all 64 general purpose registers.
8249 .IP "\fB\-mfpr\-32\fR" 4
8251 Use only the first 32 floating point registers.
8252 .IP "\fB\-mfpr\-64\fR" 4
8254 Use all 64 floating point registers
8255 .IP "\fB\-mhard\-float\fR" 4
8256 .IX Item "-mhard-float"
8257 Use hardware instructions for floating point operations.
8258 .IP "\fB\-msoft\-float\fR" 4
8259 .IX Item "-msoft-float"
8260 Use library routines for floating point operations.
8261 .IP "\fB\-malloc\-cc\fR" 4
8262 .IX Item "-malloc-cc"
8263 Dynamically allocate condition code registers.
8264 .IP "\fB\-mfixed\-cc\fR" 4
8265 .IX Item "-mfixed-cc"
8266 Do not try to dynamically allocate condition code registers, only
8267 use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
8268 .IP "\fB\-mdword\fR" 4
8270 Change \s-1ABI\s0 to use double word insns.
8271 .IP "\fB\-mno\-dword\fR" 4
8272 .IX Item "-mno-dword"
8273 Do not use double word instructions.
8274 .IP "\fB\-mdouble\fR" 4
8276 Use floating point double instructions.
8277 .IP "\fB\-mno\-double\fR" 4
8278 .IX Item "-mno-double"
8279 Do not use floating point double instructions.
8280 .IP "\fB\-mmedia\fR" 4
8282 Use media instructions.
8283 .IP "\fB\-mno\-media\fR" 4
8284 .IX Item "-mno-media"
8285 Do not use media instructions.
8286 .IP "\fB\-mmuladd\fR" 4
8288 Use multiply and add/subtract instructions.
8289 .IP "\fB\-mno\-muladd\fR" 4
8290 .IX Item "-mno-muladd"
8291 Do not use multiply and add/subtract instructions.
8292 .IP "\fB\-mfdpic\fR" 4
8294 Select the \s-1FDPIC\s0 \s-1ABI\s0, that uses function descriptors to represent
8295 pointers to functions. Without any PIC/PIE\-related options, it
8296 implies \fB\-fPIE\fR. With \fB\-fpic\fR or \fB\-fpie\fR, it
8297 assumes \s-1GOT\s0 entries and small data are within a 12\-bit range from the
8298 \&\s-1GOT\s0 base address; with \fB\-fPIC\fR or \fB\-fPIE\fR, \s-1GOT\s0 offsets
8299 are computed with 32 bits.
8300 .IP "\fB\-minline\-plt\fR" 4
8301 .IX Item "-minline-plt"
8302 Enable inlining of \s-1PLT\s0 entries in function calls to functions that are
8303 not known to bind locally. It has no effect without \fB\-mfdpic\fR.
8304 It's enabled by default if optimizing for speed and compiling for
8305 shared libraries (i.e., \fB\-fPIC\fR or \fB\-fpic\fR), or when an
8306 optimization option such as \fB\-O3\fR or above is present in the
8308 .IP "\fB\-mTLS\fR" 4
8310 Assume a large \s-1TLS\s0 segment when generating thread-local code.
8311 .IP "\fB\-mtls\fR" 4
8313 Do not assume a large \s-1TLS\s0 segment when generating thread-local code.
8314 .IP "\fB\-mgprel\-ro\fR" 4
8315 .IX Item "-mgprel-ro"
8316 Enable the use of \f(CW\*(C`GPREL\*(C'\fR relocations in the \s-1FDPIC\s0 \s-1ABI\s0 for data
8317 that is known to be in read-only sections. It's enabled by default,
8318 except for \fB\-fpic\fR or \fB\-fpie\fR: even though it may help
8319 make the global offset table smaller, it trades 1 instruction for 4.
8320 With \fB\-fPIC\fR or \fB\-fPIE\fR, it trades 3 instructions for 4,
8321 one of which may be shared by multiple symbols, and it avoids the need
8322 for a \s-1GOT\s0 entry for the referenced symbol, so it's more likely to be a
8323 win. If it is not, \fB\-mno\-gprel\-ro\fR can be used to disable it.
8324 .IP "\fB\-multilib\-library\-pic\fR" 4
8325 .IX Item "-multilib-library-pic"
8326 Link with the (library, not \s-1FD\s0) pic libraries. It's implied by
8327 \&\fB\-mlibrary\-pic\fR, as well as by \fB\-fPIC\fR and
8328 \&\fB\-fpic\fR without \fB\-mfdpic\fR. You should never have to use
8330 .IP "\fB\-mlinked\-fp\fR" 4
8331 .IX Item "-mlinked-fp"
8332 Follow the \s-1EABI\s0 requirement of always creating a frame pointer whenever
8333 a stack frame is allocated. This option is enabled by default and can
8334 be disabled with \fB\-mno\-linked\-fp\fR.
8335 .IP "\fB\-mlong\-calls\fR" 4
8336 .IX Item "-mlong-calls"
8337 Use indirect addressing to call functions outside the current
8338 compilation unit. This allows the functions to be placed anywhere
8339 within the 32\-bit address space.
8340 .IP "\fB\-malign\-labels\fR" 4
8341 .IX Item "-malign-labels"
8342 Try to align labels to an 8\-byte boundary by inserting nops into the
8343 previous packet. This option only has an effect when \s-1VLIW\s0 packing
8344 is enabled. It doesn't create new packets; it merely adds nops to
8346 .IP "\fB\-mlibrary\-pic\fR" 4
8347 .IX Item "-mlibrary-pic"
8348 Generate position-independent \s-1EABI\s0 code.
8349 .IP "\fB\-macc\-4\fR" 4
8351 Use only the first four media accumulator registers.
8352 .IP "\fB\-macc\-8\fR" 4
8354 Use all eight media accumulator registers.
8355 .IP "\fB\-mpack\fR" 4
8357 Pack \s-1VLIW\s0 instructions.
8358 .IP "\fB\-mno\-pack\fR" 4
8359 .IX Item "-mno-pack"
8360 Do not pack \s-1VLIW\s0 instructions.
8361 .IP "\fB\-mno\-eflags\fR" 4
8362 .IX Item "-mno-eflags"
8363 Do not mark \s-1ABI\s0 switches in e_flags.
8364 .IP "\fB\-mcond\-move\fR" 4
8365 .IX Item "-mcond-move"
8366 Enable the use of conditional-move instructions (default).
8368 This switch is mainly for debugging the compiler and will likely be removed
8369 in a future version.
8370 .IP "\fB\-mno\-cond\-move\fR" 4
8371 .IX Item "-mno-cond-move"
8372 Disable the use of conditional-move instructions.
8374 This switch is mainly for debugging the compiler and will likely be removed
8375 in a future version.
8376 .IP "\fB\-mscc\fR" 4
8378 Enable the use of conditional set instructions (default).
8380 This switch is mainly for debugging the compiler and will likely be removed
8381 in a future version.
8382 .IP "\fB\-mno\-scc\fR" 4
8384 Disable the use of conditional set instructions.
8386 This switch is mainly for debugging the compiler and will likely be removed
8387 in a future version.
8388 .IP "\fB\-mcond\-exec\fR" 4
8389 .IX Item "-mcond-exec"
8390 Enable the use of conditional execution (default).
8392 This switch is mainly for debugging the compiler and will likely be removed
8393 in a future version.
8394 .IP "\fB\-mno\-cond\-exec\fR" 4
8395 .IX Item "-mno-cond-exec"
8396 Disable the use of conditional execution.
8398 This switch is mainly for debugging the compiler and will likely be removed
8399 in a future version.
8400 .IP "\fB\-mvliw\-branch\fR" 4
8401 .IX Item "-mvliw-branch"
8402 Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
8404 This switch is mainly for debugging the compiler and will likely be removed
8405 in a future version.
8406 .IP "\fB\-mno\-vliw\-branch\fR" 4
8407 .IX Item "-mno-vliw-branch"
8408 Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
8410 This switch is mainly for debugging the compiler and will likely be removed
8411 in a future version.
8412 .IP "\fB\-mmulti\-cond\-exec\fR" 4
8413 .IX Item "-mmulti-cond-exec"
8414 Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
8417 This switch is mainly for debugging the compiler and will likely be removed
8418 in a future version.
8419 .IP "\fB\-mno\-multi\-cond\-exec\fR" 4
8420 .IX Item "-mno-multi-cond-exec"
8421 Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
8423 This switch is mainly for debugging the compiler and will likely be removed
8424 in a future version.
8425 .IP "\fB\-mnested\-cond\-exec\fR" 4
8426 .IX Item "-mnested-cond-exec"
8427 Enable nested conditional execution optimizations (default).
8429 This switch is mainly for debugging the compiler and will likely be removed
8430 in a future version.
8431 .IP "\fB\-mno\-nested\-cond\-exec\fR" 4
8432 .IX Item "-mno-nested-cond-exec"
8433 Disable nested conditional execution optimizations.
8435 This switch is mainly for debugging the compiler and will likely be removed
8436 in a future version.
8437 .IP "\fB\-moptimize\-membar\fR" 4
8438 .IX Item "-moptimize-membar"
8439 This switch removes redundant \f(CW\*(C`membar\*(C'\fR instructions from the
8440 compiler generated code. It is enabled by default.
8441 .IP "\fB\-mno\-optimize\-membar\fR" 4
8442 .IX Item "-mno-optimize-membar"
8443 This switch disables the automatic removal of redundant \f(CW\*(C`membar\*(C'\fR
8444 instructions from the generated code.
8445 .IP "\fB\-mtomcat\-stats\fR" 4
8446 .IX Item "-mtomcat-stats"
8447 Cause gas to print out tomcat statistics.
8448 .IP "\fB\-mcpu=\fR\fIcpu\fR" 4
8449 .IX Item "-mcpu=cpu"
8450 Select the processor type for which to generate code. Possible values are
8451 \&\fBfrv\fR, \fBfr550\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr450\fR,
8452 \&\fBfr405\fR, \fBfr400\fR, \fBfr300\fR and \fBsimple\fR.
8454 \fIGNU/Linux Options\fR
8455 .IX Subsection "GNU/Linux Options"
8457 These \fB\-m\fR options are defined for GNU/Linux targets:
8458 .IP "\fB\-mglibc\fR" 4
8460 Use the \s-1GNU\s0 C library instead of uClibc. This is the default except
8461 on \fB*\-*\-linux\-*uclibc*\fR targets.
8462 .IP "\fB\-muclibc\fR" 4
8464 Use uClibc instead of the \s-1GNU\s0 C library. This is the default on
8465 \&\fB*\-*\-linux\-*uclibc*\fR targets.
8467 \fIH8/300 Options\fR
8468 .IX Subsection "H8/300 Options"
8470 These \fB\-m\fR options are defined for the H8/300 implementations:
8471 .IP "\fB\-mrelax\fR" 4
8473 Shorten some address references at link time, when possible; uses the
8474 linker option \fB\-relax\fR.
8477 Generate code for the H8/300H.
8480 Generate code for the H8S.
8483 Generate code for the H8S and H8/300H in the normal mode. This switch
8484 must be used either with \fB\-mh\fR or \fB\-ms\fR.
8485 .IP "\fB\-ms2600\fR" 4
8487 Generate code for the H8S/2600. This switch must be used with \fB\-ms\fR.
8488 .IP "\fB\-mint32\fR" 4
8490 Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
8491 .IP "\fB\-malign\-300\fR" 4
8492 .IX Item "-malign-300"
8493 On the H8/300H and H8S, use the same alignment rules as for the H8/300.
8494 The default for the H8/300H and H8S is to align longs and floats on 4
8496 \&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
8497 This option has no effect on the H8/300.
8499 \fI\s-1HPPA\s0 Options\fR
8500 .IX Subsection "HPPA Options"
8502 These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
8503 .IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
8504 .IX Item "-march=architecture-type"
8505 Generate code for the specified architecture. The choices for
8506 \&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
8507 1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors. Refer to
8508 \&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
8509 architecture option for your machine. Code compiled for lower numbered
8510 architectures will run on higher numbered architectures, but not the
8512 .IP "\fB\-mpa\-risc\-1\-0\fR" 4
8513 .IX Item "-mpa-risc-1-0"
8515 .IP "\fB\-mpa\-risc\-1\-1\fR" 4
8516 .IX Item "-mpa-risc-1-1"
8517 .IP "\fB\-mpa\-risc\-2\-0\fR" 4
8518 .IX Item "-mpa-risc-2-0"
8520 Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
8521 .IP "\fB\-mbig\-switch\fR" 4
8522 .IX Item "-mbig-switch"
8523 Generate code suitable for big switch tables. Use this option only if
8524 the assembler/linker complain about out of range branches within a switch
8526 .IP "\fB\-mjump\-in\-delay\fR" 4
8527 .IX Item "-mjump-in-delay"
8528 Fill delay slots of function calls with unconditional jump instructions
8529 by modifying the return pointer for the function call to be the target
8530 of the conditional jump.
8531 .IP "\fB\-mdisable\-fpregs\fR" 4
8532 .IX Item "-mdisable-fpregs"
8533 Prevent floating point registers from being used in any manner. This is
8534 necessary for compiling kernels which perform lazy context switching of
8535 floating point registers. If you use this option and attempt to perform
8536 floating point operations, the compiler will abort.
8537 .IP "\fB\-mdisable\-indexing\fR" 4
8538 .IX Item "-mdisable-indexing"
8539 Prevent the compiler from using indexing address modes. This avoids some
8540 rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
8541 .IP "\fB\-mno\-space\-regs\fR" 4
8542 .IX Item "-mno-space-regs"
8543 Generate code that assumes the target has no space registers. This allows
8544 \&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
8546 Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
8547 .IP "\fB\-mfast\-indirect\-calls\fR" 4
8548 .IX Item "-mfast-indirect-calls"
8549 Generate code that assumes calls never cross space boundaries. This
8550 allows \s-1GCC\s0 to emit code which performs faster indirect calls.
8552 This option will not work in the presence of shared libraries or nested
8554 .IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
8555 .IX Item "-mfixed-range=register-range"
8556 Generate code treating the given register range as fixed registers.
8557 A fixed register is one that the register allocator can not use. This is
8558 useful when compiling kernel code. A register range is specified as
8559 two registers separated by a dash. Multiple register ranges can be
8560 specified separated by a comma.
8561 .IP "\fB\-mlong\-load\-store\fR" 4
8562 .IX Item "-mlong-load-store"
8563 Generate 3\-instruction load and store sequences as sometimes required by
8564 the HP-UX 10 linker. This is equivalent to the \fB+k\fR option to
8565 the \s-1HP\s0 compilers.
8566 .IP "\fB\-mportable\-runtime\fR" 4
8567 .IX Item "-mportable-runtime"
8568 Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
8569 .IP "\fB\-mgas\fR" 4
8571 Enable the use of assembler directives only \s-1GAS\s0 understands.
8572 .IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
8573 .IX Item "-mschedule=cpu-type"
8574 Schedule code according to the constraints for the machine type
8575 \&\fIcpu-type\fR. The choices for \fIcpu-type\fR are \fB700\fR
8576 \&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR. Refer
8577 to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
8578 proper scheduling option for your machine. The default scheduling is
8580 .IP "\fB\-mlinker\-opt\fR" 4
8581 .IX Item "-mlinker-opt"
8582 Enable the optimization pass in the HP-UX linker. Note this makes symbolic
8583 debugging impossible. It also triggers a bug in the HP-UX 8 and HP-UX 9
8584 linkers in which they give bogus error messages when linking some programs.
8585 .IP "\fB\-msoft\-float\fR" 4
8586 .IX Item "-msoft-float"
8587 Generate output containing library calls for floating point.
8588 \&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
8589 targets. Normally the facilities of the machine's usual C compiler are
8590 used, but this cannot be done directly in cross\-compilation. You must make
8591 your own arrangements to provide suitable library functions for
8592 cross\-compilation. The embedded target \fBhppa1.1\-*\-pro\fR
8593 does provide software floating point support.
8595 \&\fB\-msoft\-float\fR changes the calling convention in the output file;
8596 therefore, it is only useful if you compile \fIall\fR of a program with
8597 this option. In particular, you need to compile \fIlibgcc.a\fR, the
8598 library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
8600 .IP "\fB\-msio\fR" 4
8602 Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0. The default is
8603 \&\fB\-mwsio\fR. This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
8604 \&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0. These
8605 options are available under HP-UX and \s-1HI\-UX\s0.
8606 .IP "\fB\-mgnu\-ld\fR" 4
8608 Use \s-1GNU\s0 ld specific options. This passes \fB\-shared\fR to ld when
8609 building a shared library. It is the default when \s-1GCC\s0 is configured,
8610 explicitly or implicitly, with the \s-1GNU\s0 linker. This option does not
8611 have any affect on which ld is called, it only changes what parameters
8612 are passed to that ld. The ld that is called is determined by the
8613 \&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
8614 finally by the user's \fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed
8615 using \fBwhich `gcc \-print\-prog\-name=ld`\fR. This option is only available
8616 on the 64 bit HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
8617 .IP "\fB\-mhp\-ld\fR" 4
8619 Use \s-1HP\s0 ld specific options. This passes \fB\-b\fR to ld when building
8620 a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
8621 links. It is the default when \s-1GCC\s0 is configured, explicitly or
8622 implicitly, with the \s-1HP\s0 linker. This option does not have any affect on
8623 which ld is called, it only changes what parameters are passed to that
8624 ld. The ld that is called is determined by the \fB\-\-with\-ld\fR
8625 configure option, \s-1GCC\s0's program search path, and finally by the user's
8626 \&\fB\s-1PATH\s0\fR. The linker used by \s-1GCC\s0 can be printed using \fBwhich
8627 `gcc \-print\-prog\-name=ld`\fR. This option is only available on the 64 bit
8628 HP-UX \s-1GCC\s0, i.e. configured with \fBhppa*64*\-*\-hpux*\fR.
8629 .IP "\fB\-mlong\-calls\fR" 4
8630 .IX Item "-mlong-calls"
8631 Generate code that uses long call sequences. This ensures that a call
8632 is always able to reach linker generated stubs. The default is to generate
8633 long calls only when the distance from the call site to the beginning
8634 of the function or translation unit, as the case may be, exceeds a
8635 predefined limit set by the branch type being used. The limits for
8636 normal calls are 7,600,000 and 240,000 bytes, respectively for the
8637 \&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures. Sibcalls are always limited at
8640 Distances are measured from the beginning of functions when using the
8641 \&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
8642 and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
8643 the \s-1SOM\s0 linker.
8645 It is normally not desirable to use this option as it will degrade
8646 performance. However, it may be useful in large applications,
8647 particularly when partial linking is used to build the application.
8649 The types of long calls used depends on the capabilities of the
8650 assembler and linker, and the type of code being generated. The
8651 impact on systems that support long absolute calls, and long pic
8652 symbol-difference or pc-relative calls should be relatively small.
8653 However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
8654 and it is quite long.
8655 .IP "\fB\-munix=\fR\fIunix-std\fR" 4
8656 .IX Item "-munix=unix-std"
8657 Generate compiler predefines and select a startfile for the specified
8658 \&\s-1UNIX\s0 standard. The choices for \fIunix-std\fR are \fB93\fR, \fB95\fR
8659 and \fB98\fR. \fB93\fR is supported on all HP-UX versions. \fB95\fR
8660 is available on HP-UX 10.10 and later. \fB98\fR is available on HP-UX
8661 11.11 and later. The default values are \fB93\fR for HP-UX 10.00,
8662 \&\fB95\fR for HP-UX 10.10 though to 11.00, and \fB98\fR for HP-UX 11.11
8665 \&\fB\-munix=93\fR provides the same predefines as \s-1GCC\s0 3.3 and 3.4.
8666 \&\fB\-munix=95\fR provides additional predefines for \f(CW\*(C`XOPEN_UNIX\*(C'\fR
8667 and \f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, and the startfile \fIunix95.o\fR.
8668 \&\fB\-munix=98\fR provides additional predefines for \f(CW\*(C`_XOPEN_UNIX\*(C'\fR,
8669 \&\f(CW\*(C`_XOPEN_SOURCE_EXTENDED\*(C'\fR, \f(CW\*(C`_INCLUDE_\|_STDC_A1_SOURCE\*(C'\fR and
8670 \&\f(CW\*(C`_INCLUDE_XOPEN_SOURCE_500\*(C'\fR, and the startfile \fIunix98.o\fR.
8672 It is \fIimportant\fR to note that this option changes the interfaces
8673 for various library routines. It also affects the operational behavior
8674 of the C library. Thus, \fIextreme\fR care is needed in using this
8677 Library code that is intended to operate with more than one \s-1UNIX\s0
8678 standard must test, set and restore the variable \fI_\|_xpg4_extended_mask\fR
8679 as appropriate. Most \s-1GNU\s0 software doesn't provide this capability.
8680 .IP "\fB\-nolibdld\fR" 4
8681 .IX Item "-nolibdld"
8682 Suppress the generation of link options to search libdld.sl when the
8683 \&\fB\-static\fR option is specified on HP-UX 10 and later.
8684 .IP "\fB\-static\fR" 4
8686 The HP-UX implementation of setlocale in libc has a dependency on
8687 libdld.sl. There isn't an archive version of libdld.sl. Thus,
8688 when the \fB\-static\fR option is specified, special link options
8689 are needed to resolve this dependency.
8691 On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
8692 link with libdld.sl when the \fB\-static\fR option is specified.
8693 This causes the resulting binary to be dynamic. On the 64\-bit port,
8694 the linkers generate dynamic binaries by default in any case. The
8695 \&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
8696 adding these link options.
8697 .IP "\fB\-threads\fR" 4
8699 Add support for multithreading with the \fIdce thread\fR library
8700 under \s-1HP\-UX\s0. This option sets flags for both the preprocessor and
8703 \fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
8704 .IX Subsection "Intel 386 and AMD x86-64 Options"
8706 These \fB\-m\fR options are defined for the i386 and x86\-64 family of
8708 .IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
8709 .IX Item "-mtune=cpu-type"
8710 Tune to \fIcpu-type\fR everything applicable about the generated code, except
8711 for the \s-1ABI\s0 and the set of available instructions. The choices for
8712 \&\fIcpu-type\fR are:
8714 .IP "\fIgeneric\fR" 4
8716 Produce code optimized for the most common \s-1IA32/AMD64/EM64T\s0 processors.
8717 If you know the \s-1CPU\s0 on which your code will run, then you should use
8718 the corresponding \fB\-mtune\fR option instead of
8719 \&\fB\-mtune=generic\fR. But, if you do not know exactly what \s-1CPU\s0 users
8720 of your application will have, then you should use this option.
8722 As new processors are deployed in the marketplace, the behavior of this
8723 option will change. Therefore, if you upgrade to a newer version of
8724 \&\s-1GCC\s0, the code generated option will change to reflect the processors
8725 that were most common when that version of \s-1GCC\s0 was released.
8727 There is no \fB\-march=generic\fR option because \fB\-march\fR
8728 indicates the instruction set the compiler can use, and there is no
8729 generic instruction set applicable to all processors. In contrast,
8730 \&\fB\-mtune\fR indicates the processor (or, in this case, collection of
8731 processors) for which the code is optimized.
8732 .IP "\fInative\fR" 4
8734 This selects the \s-1CPU\s0 to tune for at compilation time by determining
8735 the processor type of the compiling machine. Using \fB\-mtune=native\fR
8736 will produce code optimized for the local machine under the constraints
8737 of the selected instruction set. Using \fB\-march=native\fR will
8738 enable all instruction subsets supported by the local machine (hence
8739 the result might not run on different machines).
8742 Original Intel's i386 \s-1CPU\s0.
8745 Intel's i486 \s-1CPU\s0. (No scheduling is implemented for this chip.)
8746 .IP "\fIi586, pentium\fR" 4
8747 .IX Item "i586, pentium"
8748 Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
8749 .IP "\fIpentium-mmx\fR" 4
8750 .IX Item "pentium-mmx"
8751 Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
8752 .IP "\fIpentiumpro\fR" 4
8753 .IX Item "pentiumpro"
8754 Intel PentiumPro \s-1CPU\s0.
8757 Same as \f(CW\*(C`generic\*(C'\fR, but when used as \f(CW\*(C`march\*(C'\fR option, PentiumPro
8758 instruction set will be used, so the code will run on all i686 family chips.
8759 .IP "\fIpentium2\fR" 4
8761 Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
8762 .IP "\fIpentium3, pentium3m\fR" 4
8763 .IX Item "pentium3, pentium3m"
8764 Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
8766 .IP "\fIpentium-m\fR" 4
8767 .IX Item "pentium-m"
8768 Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
8769 support. Used by Centrino notebooks.
8770 .IP "\fIpentium4, pentium4m\fR" 4
8771 .IX Item "pentium4, pentium4m"
8772 Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
8773 .IP "\fIprescott\fR" 4
8775 Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
8777 .IP "\fInocona\fR" 4
8779 Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
8780 \&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
8783 \&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
8784 .IP "\fIk6\-2, k6\-3\fR" 4
8785 .IX Item "k6-2, k6-3"
8786 Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
8787 .IP "\fIathlon, athlon-tbird\fR" 4
8788 .IX Item "athlon, athlon-tbird"
8789 \&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and \s-1SSE\s0 prefetch instructions
8791 .IP "\fIathlon\-4, athlon\-xp, athlon-mp\fR" 4
8792 .IX Item "athlon-4, athlon-xp, athlon-mp"
8793 Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and full \s-1SSE\s0
8794 instruction set support.
8795 .IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
8796 .IX Item "k8, opteron, athlon64, athlon-fx"
8797 \&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support. (This supersets
8798 \&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.)
8799 .IP "\fIwinchip\-c6\fR" 4
8800 .IX Item "winchip-c6"
8801 \&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
8803 .IP "\fIwinchip2\fR" 4
8805 \&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3dNOW!
8806 instruction set support.
8809 Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support. (No scheduling is
8810 implemented for this chip.)
8813 Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support. (No scheduling is
8814 implemented for this chip.)
8818 While picking a specific \fIcpu-type\fR will schedule things appropriately
8819 for that particular chip, the compiler will not generate any code that
8820 does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
8823 .IP "\fB\-march=\fR\fIcpu-type\fR" 4
8824 .IX Item "-march=cpu-type"
8825 Generate instructions for the machine type \fIcpu-type\fR. The choices
8826 for \fIcpu-type\fR are the same as for \fB\-mtune\fR. Moreover,
8827 specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
8828 .IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
8829 .IX Item "-mcpu=cpu-type"
8830 A deprecated synonym for \fB\-mtune\fR.
8831 .IP "\fB\-m386\fR" 4
8834 .IP "\fB\-m486\fR" 4
8836 .IP "\fB\-mpentium\fR" 4
8837 .IX Item "-mpentium"
8838 .IP "\fB\-mpentiumpro\fR" 4
8839 .IX Item "-mpentiumpro"
8841 These options are synonyms for \fB\-mtune=i386\fR, \fB\-mtune=i486\fR,
8842 \&\fB\-mtune=pentium\fR, and \fB\-mtune=pentiumpro\fR respectively.
8843 These synonyms are deprecated.
8844 .IP "\fB\-mfpmath=\fR\fIunit\fR" 4
8845 .IX Item "-mfpmath=unit"
8846 Generate floating point arithmetics for selected unit \fIunit\fR. The choices
8851 Use the standard 387 floating point coprocessor present majority of chips and
8852 emulated otherwise. Code compiled with this option will run almost everywhere.
8853 The temporary results are computed in 80bit precision instead of precision
8854 specified by the type resulting in slightly different results compared to most
8855 of other chips. See \fB\-ffloat\-store\fR for more detailed description.
8857 This is the default choice for i386 compiler.
8860 Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
8861 This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
8862 by Athlon\-4, Athlon-xp and Athlon-mp chips. The earlier version of \s-1SSE\s0
8863 instruction set supports only single precision arithmetics, thus the double and
8864 extended precision arithmetics is still done using 387. Later version, present
8865 only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
8868 For the i386 compiler, you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR
8869 or \fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
8870 effective. For the x86\-64 compiler, these extensions are enabled by default.
8872 The resulting code should be considerably faster in the majority of cases and avoid
8873 the numerical instability problems of 387 code, but may break some existing
8874 code that expects temporaries to be 80bit.
8876 This is the default choice for the x86\-64 compiler.
8877 .IP "\fBsse,387\fR" 4
8879 Attempt to utilize both instruction sets at once. This effectively double the
8880 amount of available registers and on chips with separate execution units for
8881 387 and \s-1SSE\s0 the execution resources too. Use this option with care, as it is
8882 still experimental, because the \s-1GCC\s0 register allocator does not model separate
8883 functional units well resulting in instable performance.
8887 .IP "\fB\-masm=\fR\fIdialect\fR" 4
8888 .IX Item "-masm=dialect"
8889 Output asm instructions using selected \fIdialect\fR. Supported
8890 choices are \fBintel\fR or \fBatt\fR (the default one). Darwin does
8891 not support \fBintel\fR.
8892 .IP "\fB\-mieee\-fp\fR" 4
8893 .IX Item "-mieee-fp"
8895 .IP "\fB\-mno\-ieee\-fp\fR" 4
8896 .IX Item "-mno-ieee-fp"
8898 Control whether or not the compiler uses \s-1IEEE\s0 floating point
8899 comparisons. These handle correctly the case where the result of a
8900 comparison is unordered.
8901 .IP "\fB\-msoft\-float\fR" 4
8902 .IX Item "-msoft-float"
8903 Generate output containing library calls for floating point.
8904 \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
8905 Normally the facilities of the machine's usual C compiler are used, but
8906 this can't be done directly in cross\-compilation. You must make your
8907 own arrangements to provide suitable library functions for
8910 On machines where a function returns floating point results in the 80387
8911 register stack, some floating point opcodes may be emitted even if
8912 \&\fB\-msoft\-float\fR is used.
8913 .IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
8914 .IX Item "-mno-fp-ret-in-387"
8915 Do not use the \s-1FPU\s0 registers for return values of functions.
8917 The usual calling convention has functions return values of types
8918 \&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
8919 is no \s-1FPU\s0. The idea is that the operating system should emulate
8922 The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
8923 in ordinary \s-1CPU\s0 registers instead.
8924 .IP "\fB\-mno\-fancy\-math\-387\fR" 4
8925 .IX Item "-mno-fancy-math-387"
8926 Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
8927 \&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387. Specify this option to avoid
8928 generating those instructions. This option is the default on FreeBSD,
8929 OpenBSD and NetBSD. This option is overridden when \fB\-march\fR
8930 indicates that the target cpu will always have an \s-1FPU\s0 and so the
8931 instruction will not need emulation. As of revision 2.6.1, these
8932 instructions are not generated unless you also use the
8933 \&\fB\-funsafe\-math\-optimizations\fR switch.
8934 .IP "\fB\-malign\-double\fR" 4
8935 .IX Item "-malign-double"
8937 .IP "\fB\-mno\-align\-double\fR" 4
8938 .IX Item "-mno-align-double"
8940 Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
8941 \&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
8942 boundary. Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
8943 produce code that runs somewhat faster on a \fBPentium\fR at the
8944 expense of more memory.
8946 On x86\-64, \fB\-malign\-double\fR is enabled by default.
8948 \&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
8949 structures containing the above types will be aligned differently than
8950 the published application binary interface specifications for the 386
8951 and will not be binary compatible with structures in code compiled
8952 without that switch.
8953 .IP "\fB\-m96bit\-long\-double\fR" 4
8954 .IX Item "-m96bit-long-double"
8956 .IP "\fB\-m128bit\-long\-double\fR" 4
8957 .IX Item "-m128bit-long-double"
8959 These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386
8960 application binary interface specifies the size to be 96 bits,
8961 so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
8963 Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
8964 to be aligned to an 8 or 16 byte boundary. In arrays or structures
8965 conforming to the \s-1ABI\s0, this would not be possible. So specifying a
8966 \&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
8967 to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
8970 In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
8971 its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
8973 Notice that neither of these options enable any extra precision over the x87
8974 standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
8976 \&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
8977 structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
8978 their size as well as function calling convention for function taking
8979 \&\f(CW\*(C`long double\*(C'\fR will be modified. Hence they will not be binary
8980 compatible with arrays or structures in code compiled without that switch.
8981 .IP "\fB\-mmlarge\-data\-threshold=\fR\fInumber\fR" 4
8982 .IX Item "-mmlarge-data-threshold=number"
8983 When \fB\-mcmodel=medium\fR is specified, the data greater than
8984 \&\fIthreshold\fR are placed in large data section. This value must be the
8985 same across all object linked into the binary and defaults to 65535.
8986 .IP "\fB\-msvr3\-shlib\fR" 4
8987 .IX Item "-msvr3-shlib"
8989 .IP "\fB\-mno\-svr3\-shlib\fR" 4
8990 .IX Item "-mno-svr3-shlib"
8992 Control whether \s-1GCC\s0 places uninitialized local variables into the
8993 \&\f(CW\*(C`bss\*(C'\fR or \f(CW\*(C`data\*(C'\fR segments. \fB\-msvr3\-shlib\fR places them
8994 into \f(CW\*(C`bss\*(C'\fR. These options are meaningful only on System V Release 3.
8995 .IP "\fB\-mrtd\fR" 4
8997 Use a different function-calling convention, in which functions that
8998 take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
8999 instruction, which pops their arguments while returning. This saves one
9000 instruction in the caller since there is no need to pop the arguments
9003 You can specify that an individual function is called with this calling
9004 sequence with the function attribute \fBstdcall\fR. You can also
9005 override the \fB\-mrtd\fR option by using the function attribute
9008 \&\fBWarning:\fR this calling convention is incompatible with the one
9009 normally used on Unix, so you cannot use it if you need to call
9010 libraries compiled with the Unix compiler.
9012 Also, you must provide function prototypes for all functions that
9013 take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
9014 otherwise incorrect code will be generated for calls to those
9017 In addition, seriously incorrect code will result if you call a
9018 function with too many arguments. (Normally, extra arguments are
9019 harmlessly ignored.)
9020 .IP "\fB\-mregparm=\fR\fInum\fR" 4
9021 .IX Item "-mregparm=num"
9022 Control how many registers are used to pass integer arguments. By
9023 default, no registers are used to pass arguments, and at most 3
9024 registers can be used. You can control this behavior for a specific
9025 function by using the function attribute \fBregparm\fR.
9027 \&\fBWarning:\fR if you use this switch, and
9028 \&\fInum\fR is nonzero, then you must build all modules with the same
9029 value, including any libraries. This includes the system libraries and
9031 .IP "\fB\-msseregparm\fR" 4
9032 .IX Item "-msseregparm"
9033 Use \s-1SSE\s0 register passing conventions for float and double arguments
9034 and return values. You can control this behavior for a specific
9035 function by using the function attribute \fBsseregparm\fR.
9037 \&\fBWarning:\fR if you use this switch then you must build all
9038 modules with the same value, including any libraries. This includes
9039 the system libraries and startup modules.
9040 .IP "\fB\-mstackrealign\fR" 4
9041 .IX Item "-mstackrealign"
9042 Realign the stack at entry. On the Intel x86, the
9043 \&\fB\-mstackrealign\fR option will generate an alternate prologue and
9044 epilogue that realigns the runtime stack. This supports mixing legacy
9045 codes that keep a 4\-byte aligned stack with modern codes that keep a
9046 16\-byte stack for \s-1SSE\s0 compatibility. The alternate prologue and
9047 epilogue are slower and bigger than the regular ones, and the
9048 alternate prologue requires an extra scratch register; this lowers the
9049 number of registers available if used in conjunction with the
9050 \&\f(CW\*(C`regparm\*(C'\fR attribute. The \fB\-mstackrealign\fR option is
9051 incompatible with the nested function prologue; this is considered a
9052 hard error. See also the attribute \f(CW\*(C`force_align_arg_pointer\*(C'\fR,
9053 applicable to individual functions.
9054 .IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
9055 .IX Item "-mpreferred-stack-boundary=num"
9056 Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
9057 byte boundary. If \fB\-mpreferred\-stack\-boundary\fR is not specified,
9058 the default is 4 (16 bytes or 128 bits).
9060 On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
9061 should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
9062 suffer significant run time performance penalties. On Pentium \s-1III\s0, the
9063 Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR may not work
9064 properly if it is not 16 byte aligned.
9066 To ensure proper alignment of this values on the stack, the stack boundary
9067 must be as aligned as that required by any value stored on the stack.
9068 Further, every function must be generated such that it keeps the stack
9069 aligned. Thus calling a function compiled with a higher preferred
9070 stack boundary from a function compiled with a lower preferred stack
9071 boundary will most likely misalign the stack. It is recommended that
9072 libraries that use callbacks always use the default setting.
9074 This extra alignment does consume extra stack space, and generally
9075 increases code size. Code that is sensitive to stack space usage, such
9076 as embedded systems and operating system kernels, may want to reduce the
9077 preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
9078 .IP "\fB\-mmmx\fR" 4
9081 .IP "\fB\-mno\-mmx\fR" 4
9083 .IP "\fB\-msse\fR" 4
9085 .IP "\fB\-mno\-sse\fR" 4
9087 .IP "\fB\-msse2\fR" 4
9089 .IP "\fB\-mno\-sse2\fR" 4
9090 .IX Item "-mno-sse2"
9091 .IP "\fB\-msse3\fR" 4
9093 .IP "\fB\-mno\-sse3\fR" 4
9094 .IX Item "-mno-sse3"
9095 .IP "\fB\-m3dnow\fR" 4
9097 .IP "\fB\-mno\-3dnow\fR" 4
9098 .IX Item "-mno-3dnow"
9100 These switches enable or disable the use of instructions in the \s-1MMX\s0,
9101 \&\s-1SSE\s0, \s-1SSE2\s0 or 3DNow! extended instruction sets. These extensions are
9102 also available as built-in functions: see \fBX86 Built-in Functions\fR,
9103 for details of the functions enabled and disabled by these switches.
9105 To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
9106 code (as opposed to 387 instructions), see \fB\-mfpmath=sse\fR.
9108 These options will enable \s-1GCC\s0 to use these extended instructions in
9109 generated code, even without \fB\-mfpmath=sse\fR. Applications which
9110 perform runtime \s-1CPU\s0 detection must compile separate files for each
9111 supported architecture, using the appropriate flags. In particular,
9112 the file containing the \s-1CPU\s0 detection code should be compiled without
9114 .IP "\fB\-mpush\-args\fR" 4
9115 .IX Item "-mpush-args"
9117 .IP "\fB\-mno\-push\-args\fR" 4
9118 .IX Item "-mno-push-args"
9120 Use \s-1PUSH\s0 operations to store outgoing parameters. This method is shorter
9121 and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
9122 by default. In some cases disabling it may improve performance because of
9123 improved scheduling and reduced dependencies.
9124 .IP "\fB\-maccumulate\-outgoing\-args\fR" 4
9125 .IX Item "-maccumulate-outgoing-args"
9126 If enabled, the maximum amount of space required for outgoing arguments will be
9127 computed in the function prologue. This is faster on most modern CPUs
9128 because of reduced dependencies, improved scheduling and reduced stack usage
9129 when preferred stack boundary is not equal to 2. The drawback is a notable
9130 increase in code size. This switch implies \fB\-mno\-push\-args\fR.
9131 .IP "\fB\-mthreads\fR" 4
9132 .IX Item "-mthreads"
9133 Support thread-safe exception handling on \fBMingw32\fR. Code that relies
9134 on thread-safe exception handling must compile and link all code with the
9135 \&\fB\-mthreads\fR option. When compiling, \fB\-mthreads\fR defines
9136 \&\fB\-D_MT\fR; when linking, it links in a special thread helper library
9137 \&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
9138 .IP "\fB\-mno\-align\-stringops\fR" 4
9139 .IX Item "-mno-align-stringops"
9140 Do not align destination of inlined string operations. This switch reduces
9141 code size and improves performance in case the destination is already aligned,
9142 but \s-1GCC\s0 doesn't know about it.
9143 .IP "\fB\-minline\-all\-stringops\fR" 4
9144 .IX Item "-minline-all-stringops"
9145 By default \s-1GCC\s0 inlines string operations only when destination is known to be
9146 aligned at least to 4 byte boundary. This enables more inlining, increase code
9147 size, but may improve performance of code that depends on fast memcpy, strlen
9148 and memset for short lengths.
9149 .IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
9150 .IX Item "-momit-leaf-frame-pointer"
9151 Don't keep the frame pointer in a register for leaf functions. This
9152 avoids the instructions to save, set up and restore frame pointers and
9153 makes an extra register available in leaf functions. The option
9154 \&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
9155 which might make debugging harder.
9156 .IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
9157 .IX Item "-mtls-direct-seg-refs"
9159 .IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
9160 .IX Item "-mno-tls-direct-seg-refs"
9162 Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
9163 \&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
9164 or whether the thread base pointer must be added. Whether or not this
9165 is legal depends on the operating system, and whether it maps the
9166 segment to cover the entire \s-1TLS\s0 area.
9168 For systems that use \s-1GNU\s0 libc, the default is on.
9170 These \fB\-m\fR switches are supported in addition to the above
9171 on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
9178 Generate code for a 32\-bit or 64\-bit environment.
9179 The 32\-bit environment sets int, long and pointer to 32 bits and
9180 generates code that runs on any i386 system.
9181 The 64\-bit environment sets int to 32 bits and long and pointer
9182 to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture. For
9183 darwin only the \-m64 option turns off the \fB\-fno\-pic\fR and
9184 \&\fB\-mdynamic\-no\-pic\fR options.
9185 .IP "\fB\-mno\-red\-zone\fR" 4
9186 .IX Item "-mno-red-zone"
9187 Do not use a so called red zone for x86\-64 code. The red zone is mandated
9188 by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
9189 stack pointer that will not be modified by signal or interrupt handlers
9190 and therefore can be used for temporary data without adjusting the stack
9191 pointer. The flag \fB\-mno\-red\-zone\fR disables this red zone.
9192 .IP "\fB\-mcmodel=small\fR" 4
9193 .IX Item "-mcmodel=small"
9194 Generate code for the small code model: the program and its symbols must
9195 be linked in the lower 2 \s-1GB\s0 of the address space. Pointers are 64 bits.
9196 Programs can be statically or dynamically linked. This is the default
9198 .IP "\fB\-mcmodel=kernel\fR" 4
9199 .IX Item "-mcmodel=kernel"
9200 Generate code for the kernel code model. The kernel runs in the
9201 negative 2 \s-1GB\s0 of the address space.
9202 This model has to be used for Linux kernel code.
9203 .IP "\fB\-mcmodel=medium\fR" 4
9204 .IX Item "-mcmodel=medium"
9205 Generate code for the medium model: The program is linked in the lower 2
9206 \&\s-1GB\s0 of the address space but symbols can be located anywhere in the
9207 address space. Programs can be statically or dynamically linked, but
9208 building of shared libraries are not supported with the medium model.
9209 .IP "\fB\-mcmodel=large\fR" 4
9210 .IX Item "-mcmodel=large"
9211 Generate code for the large model: This model makes no assumptions
9212 about addresses and sizes of sections. Currently \s-1GCC\s0 does not implement
9215 \fI\s-1IA\-64\s0 Options\fR
9216 .IX Subsection "IA-64 Options"
9218 These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
9219 .IP "\fB\-mbig\-endian\fR" 4
9220 .IX Item "-mbig-endian"
9221 Generate code for a big endian target. This is the default for \s-1HP\-UX\s0.
9222 .IP "\fB\-mlittle\-endian\fR" 4
9223 .IX Item "-mlittle-endian"
9224 Generate code for a little endian target. This is the default for \s-1AIX5\s0
9226 .IP "\fB\-mgnu\-as\fR" 4
9229 .IP "\fB\-mno\-gnu\-as\fR" 4
9230 .IX Item "-mno-gnu-as"
9232 Generate (or don't) code for the \s-1GNU\s0 assembler. This is the default.
9233 .IP "\fB\-mgnu\-ld\fR" 4
9236 .IP "\fB\-mno\-gnu\-ld\fR" 4
9237 .IX Item "-mno-gnu-ld"
9239 Generate (or don't) code for the \s-1GNU\s0 linker. This is the default.
9240 .IP "\fB\-mno\-pic\fR" 4
9242 Generate code that does not use a global pointer register. The result
9243 is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
9244 .IP "\fB\-mvolatile\-asm\-stop\fR" 4
9245 .IX Item "-mvolatile-asm-stop"
9247 .IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
9248 .IX Item "-mno-volatile-asm-stop"
9250 Generate (or don't) a stop bit immediately before and after volatile asm
9252 .IP "\fB\-mregister\-names\fR" 4
9253 .IX Item "-mregister-names"
9255 .IP "\fB\-mno\-register\-names\fR" 4
9256 .IX Item "-mno-register-names"
9258 Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
9259 the stacked registers. This may make assembler output more readable.
9260 .IP "\fB\-mno\-sdata\fR" 4
9261 .IX Item "-mno-sdata"
9263 .IP "\fB\-msdata\fR" 4
9266 Disable (or enable) optimizations that use the small data section. This may
9267 be useful for working around optimizer bugs.
9268 .IP "\fB\-mconstant\-gp\fR" 4
9269 .IX Item "-mconstant-gp"
9270 Generate code that uses a single constant global pointer value. This is
9271 useful when compiling kernel code.
9272 .IP "\fB\-mauto\-pic\fR" 4
9273 .IX Item "-mauto-pic"
9274 Generate code that is self\-relocatable. This implies \fB\-mconstant\-gp\fR.
9275 This is useful when compiling firmware code.
9276 .IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
9277 .IX Item "-minline-float-divide-min-latency"
9278 Generate code for inline divides of floating point values
9279 using the minimum latency algorithm.
9280 .IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
9281 .IX Item "-minline-float-divide-max-throughput"
9282 Generate code for inline divides of floating point values
9283 using the maximum throughput algorithm.
9284 .IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
9285 .IX Item "-minline-int-divide-min-latency"
9286 Generate code for inline divides of integer values
9287 using the minimum latency algorithm.
9288 .IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
9289 .IX Item "-minline-int-divide-max-throughput"
9290 Generate code for inline divides of integer values
9291 using the maximum throughput algorithm.
9292 .IP "\fB\-minline\-sqrt\-min\-latency\fR" 4
9293 .IX Item "-minline-sqrt-min-latency"
9294 Generate code for inline square roots
9295 using the minimum latency algorithm.
9296 .IP "\fB\-minline\-sqrt\-max\-throughput\fR" 4
9297 .IX Item "-minline-sqrt-max-throughput"
9298 Generate code for inline square roots
9299 using the maximum throughput algorithm.
9300 .IP "\fB\-mno\-dwarf2\-asm\fR" 4
9301 .IX Item "-mno-dwarf2-asm"
9303 .IP "\fB\-mdwarf2\-asm\fR" 4
9304 .IX Item "-mdwarf2-asm"
9306 Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
9307 info. This may be useful when not using the \s-1GNU\s0 assembler.
9308 .IP "\fB\-mearly\-stop\-bits\fR" 4
9309 .IX Item "-mearly-stop-bits"
9311 .IP "\fB\-mno\-early\-stop\-bits\fR" 4
9312 .IX Item "-mno-early-stop-bits"
9314 Allow stop bits to be placed earlier than immediately preceding the
9315 instruction that triggered the stop bit. This can improve instruction
9316 scheduling, but does not always do so.
9317 .IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
9318 .IX Item "-mfixed-range=register-range"
9319 Generate code treating the given register range as fixed registers.
9320 A fixed register is one that the register allocator can not use. This is
9321 useful when compiling kernel code. A register range is specified as
9322 two registers separated by a dash. Multiple register ranges can be
9323 specified separated by a comma.
9324 .IP "\fB\-mtls\-size=\fR\fItls-size\fR" 4
9325 .IX Item "-mtls-size=tls-size"
9326 Specify bit size of immediate \s-1TLS\s0 offsets. Valid values are 14, 22, and
9328 .IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
9329 .IX Item "-mtune=cpu-type"
9330 Tune the instruction scheduling for a particular \s-1CPU\s0, Valid values are
9331 itanium, itanium1, merced, itanium2, and mckinley.
9335 .IP "\fB\-pthread\fR" 4
9338 Add support for multithreading using the \s-1POSIX\s0 threads library. This
9339 option sets flags for both the preprocessor and linker. It does
9340 not affect the thread safety of object code produced by the compiler or
9341 that of libraries supplied with it. These are HP-UX specific flags.
9342 .IP "\fB\-milp32\fR" 4
9345 .IP "\fB\-mlp64\fR" 4
9348 Generate code for a 32\-bit or 64\-bit environment.
9349 The 32\-bit environment sets int, long and pointer to 32 bits.
9350 The 64\-bit environment sets int to 32 bits and long and pointer
9351 to 64 bits. These are HP-UX specific flags.
9352 .IP "\fB\-mno\-sched\-br\-data\-spec\fR" 4
9353 .IX Item "-mno-sched-br-data-spec"
9355 .IP "\fB\-msched\-br\-data\-spec\fR" 4
9356 .IX Item "-msched-br-data-spec"
9358 (Dis/En)able data speculative scheduling before reload.
9359 This will result in generation of the ld.a instructions and
9360 the corresponding check instructions (ld.c / chk.a).
9361 The default is 'disable'.
9362 .IP "\fB\-msched\-ar\-data\-spec\fR" 4
9363 .IX Item "-msched-ar-data-spec"
9365 .IP "\fB\-mno\-sched\-ar\-data\-spec\fR" 4
9366 .IX Item "-mno-sched-ar-data-spec"
9368 (En/Dis)able data speculative scheduling after reload.
9369 This will result in generation of the ld.a instructions and
9370 the corresponding check instructions (ld.c / chk.a).
9371 The default is 'enable'.
9372 .IP "\fB\-mno\-sched\-control\-spec\fR" 4
9373 .IX Item "-mno-sched-control-spec"
9375 .IP "\fB\-msched\-control\-spec\fR" 4
9376 .IX Item "-msched-control-spec"
9378 (Dis/En)able control speculative scheduling. This feature is
9379 available only during region scheduling (i.e. before reload).
9380 This will result in generation of the ld.s instructions and
9381 the corresponding check instructions chk.s .
9382 The default is 'disable'.
9383 .IP "\fB\-msched\-br\-in\-data\-spec\fR" 4
9384 .IX Item "-msched-br-in-data-spec"
9386 .IP "\fB\-mno\-sched\-br\-in\-data\-spec\fR" 4
9387 .IX Item "-mno-sched-br-in-data-spec"
9389 (En/Dis)able speculative scheduling of the instructions that
9390 are dependent on the data speculative loads before reload.
9391 This is effective only with \fB\-msched\-br\-data\-spec\fR enabled.
9392 The default is 'enable'.
9393 .IP "\fB\-msched\-ar\-in\-data\-spec\fR" 4
9394 .IX Item "-msched-ar-in-data-spec"
9396 .IP "\fB\-mno\-sched\-ar\-in\-data\-spec\fR" 4
9397 .IX Item "-mno-sched-ar-in-data-spec"
9399 (En/Dis)able speculative scheduling of the instructions that
9400 are dependent on the data speculative loads after reload.
9401 This is effective only with \fB\-msched\-ar\-data\-spec\fR enabled.
9402 The default is 'enable'.
9403 .IP "\fB\-msched\-in\-control\-spec\fR" 4
9404 .IX Item "-msched-in-control-spec"
9406 .IP "\fB\-mno\-sched\-in\-control\-spec\fR" 4
9407 .IX Item "-mno-sched-in-control-spec"
9409 (En/Dis)able speculative scheduling of the instructions that
9410 are dependent on the control speculative loads.
9411 This is effective only with \fB\-msched\-control\-spec\fR enabled.
9412 The default is 'enable'.
9413 .IP "\fB\-msched\-ldc\fR" 4
9414 .IX Item "-msched-ldc"
9416 .IP "\fB\-mno\-sched\-ldc\fR" 4
9417 .IX Item "-mno-sched-ldc"
9419 (En/Dis)able use of simple data speculation checks ld.c .
9420 If disabled, only chk.a instructions will be emitted to check
9421 data speculative loads.
9422 The default is 'enable'.
9423 .IP "\fB\-mno\-sched\-control\-ldc\fR" 4
9424 .IX Item "-mno-sched-control-ldc"
9426 .IP "\fB\-msched\-control\-ldc\fR" 4
9427 .IX Item "-msched-control-ldc"
9429 (Dis/En)able use of ld.c instructions to check control speculative loads.
9430 If enabled, in case of control speculative load with no speculatively
9431 scheduled dependent instructions this load will be emitted as ld.sa and
9432 ld.c will be used to check it.
9433 The default is 'disable'.
9434 .IP "\fB\-mno\-sched\-spec\-verbose\fR" 4
9435 .IX Item "-mno-sched-spec-verbose"
9437 .IP "\fB\-msched\-spec\-verbose\fR" 4
9438 .IX Item "-msched-spec-verbose"
9440 (Dis/En)able printing of the information about speculative motions.
9441 .IP "\fB\-mno\-sched\-prefer\-non\-data\-spec\-insns\fR" 4
9442 .IX Item "-mno-sched-prefer-non-data-spec-insns"
9444 .IP "\fB\-msched\-prefer\-non\-data\-spec\-insns\fR" 4
9445 .IX Item "-msched-prefer-non-data-spec-insns"
9447 If enabled, data speculative instructions will be chosen for schedule
9448 only if there are no other choices at the moment. This will make
9449 the use of the data speculation much more conservative.
9450 The default is 'disable'.
9451 .IP "\fB\-mno\-sched\-prefer\-non\-control\-spec\-insns\fR" 4
9452 .IX Item "-mno-sched-prefer-non-control-spec-insns"
9454 .IP "\fB\-msched\-prefer\-non\-control\-spec\-insns\fR" 4
9455 .IX Item "-msched-prefer-non-control-spec-insns"
9457 If enabled, control speculative instructions will be chosen for schedule
9458 only if there are no other choices at the moment. This will make
9459 the use of the control speculation much more conservative.
9460 The default is 'disable'.
9461 .IP "\fB\-mno\-sched\-count\-spec\-in\-critical\-path\fR" 4
9462 .IX Item "-mno-sched-count-spec-in-critical-path"
9464 .IP "\fB\-msched\-count\-spec\-in\-critical\-path\fR" 4
9465 .IX Item "-msched-count-spec-in-critical-path"
9467 If enabled, speculative dependencies will be considered during
9468 computation of the instructions priorities. This will make the use of the
9469 speculation a bit more conservative.
9470 The default is 'disable'.
9473 .IX Subsection "M32C Options"
9474 .IP "\fB\-mcpu=\fR\fIname\fR" 4
9475 .IX Item "-mcpu=name"
9476 Select the \s-1CPU\s0 for which code is generated. \fIname\fR may be one of
9477 \&\fBr8c\fR for the R8C/Tiny series, \fBm16c\fR for the M16C (up to
9478 /60) series, \fBm32cm\fR for the M16C/80 series, or \fBm32c\fR for
9480 .IP "\fB\-msim\fR" 4
9482 Specifies that the program will be run on the simulator. This causes
9483 an alternate runtime library to be linked in which supports, for
9484 example, file I/O. You must not use this option when generating
9485 programs that will run on real hardware; you must provide your own
9486 runtime library for whatever I/O functions are needed.
9487 .IP "\fB\-memregs=\fR\fInumber\fR" 4
9488 .IX Item "-memregs=number"
9489 Specifies the number of memory-based pseudo-registers \s-1GCC\s0 will use
9490 during code generation. These pseudo-registers will be used like real
9491 registers, so there is a tradeoff between \s-1GCC\s0's ability to fit the
9492 code into available registers, and the performance penalty of using
9493 memory instead of registers. Note that all modules in a program must
9494 be compiled with the same value for this option. Because of that, you
9495 must not use this option with the default runtime libraries gcc
9498 \fIM32R/D Options\fR
9499 .IX Subsection "M32R/D Options"
9501 These \fB\-m\fR options are defined for Renesas M32R/D architectures:
9502 .IP "\fB\-m32r2\fR" 4
9504 Generate code for the M32R/2.
9505 .IP "\fB\-m32rx\fR" 4
9507 Generate code for the M32R/X.
9508 .IP "\fB\-m32r\fR" 4
9510 Generate code for the M32R. This is the default.
9511 .IP "\fB\-mmodel=small\fR" 4
9512 .IX Item "-mmodel=small"
9513 Assume all objects live in the lower 16MB of memory (so that their addresses
9514 can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
9515 are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
9516 This is the default.
9518 The addressability of a particular object can be set with the
9519 \&\f(CW\*(C`model\*(C'\fR attribute.
9520 .IP "\fB\-mmodel=medium\fR" 4
9521 .IX Item "-mmodel=medium"
9522 Assume objects may be anywhere in the 32\-bit address space (the compiler
9523 will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
9524 assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
9525 .IP "\fB\-mmodel=large\fR" 4
9526 .IX Item "-mmodel=large"
9527 Assume objects may be anywhere in the 32\-bit address space (the compiler
9528 will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
9529 assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
9530 (the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
9531 instruction sequence).
9532 .IP "\fB\-msdata=none\fR" 4
9533 .IX Item "-msdata=none"
9534 Disable use of the small data area. Variables will be put into
9535 one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
9536 \&\f(CW\*(C`section\*(C'\fR attribute has been specified).
9537 This is the default.
9539 The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
9540 Objects may be explicitly put in the small data area with the
9541 \&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
9542 .IP "\fB\-msdata=sdata\fR" 4
9543 .IX Item "-msdata=sdata"
9544 Put small global and static data in the small data area, but do not
9545 generate special code to reference them.
9546 .IP "\fB\-msdata=use\fR" 4
9547 .IX Item "-msdata=use"
9548 Put small global and static data in the small data area, and generate
9549 special instructions to reference them.
9550 .IP "\fB\-G\fR \fInum\fR" 4
9552 Put global and static objects less than or equal to \fInum\fR bytes
9553 into the small data or bss sections instead of the normal data or bss
9554 sections. The default value of \fInum\fR is 8.
9555 The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
9556 for this option to have any effect.
9558 All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
9559 Compiling with different values of \fInum\fR may or may not work; if it
9560 doesn't the linker will give an error message\-\-\-incorrect code will not be
9562 .IP "\fB\-mdebug\fR" 4
9564 Makes the M32R specific code in the compiler display some statistics
9565 that might help in debugging programs.
9566 .IP "\fB\-malign\-loops\fR" 4
9567 .IX Item "-malign-loops"
9568 Align all loops to a 32\-byte boundary.
9569 .IP "\fB\-mno\-align\-loops\fR" 4
9570 .IX Item "-mno-align-loops"
9571 Do not enforce a 32\-byte alignment for loops. This is the default.
9572 .IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
9573 .IX Item "-missue-rate=number"
9574 Issue \fInumber\fR instructions per cycle. \fInumber\fR can only be 1
9576 .IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
9577 .IX Item "-mbranch-cost=number"
9578 \&\fInumber\fR can only be 1 or 2. If it is 1 then branches will be
9579 preferred over conditional code, if it is 2, then the opposite will
9581 .IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
9582 .IX Item "-mflush-trap=number"
9583 Specifies the trap number to use to flush the cache. The default is
9584 12. Valid numbers are between 0 and 15 inclusive.
9585 .IP "\fB\-mno\-flush\-trap\fR" 4
9586 .IX Item "-mno-flush-trap"
9587 Specifies that the cache cannot be flushed by using a trap.
9588 .IP "\fB\-mflush\-func=\fR\fIname\fR" 4
9589 .IX Item "-mflush-func=name"
9590 Specifies the name of the operating system function to call to flush
9591 the cache. The default is \fI_flush_cache\fR, but a function call
9592 will only be used if a trap is not available.
9593 .IP "\fB\-mno\-flush\-func\fR" 4
9594 .IX Item "-mno-flush-func"
9595 Indicates that there is no \s-1OS\s0 function for flushing the cache.
9597 \fIM680x0 Options\fR
9598 .IX Subsection "M680x0 Options"
9600 These are the \fB\-m\fR options defined for the 68000 series. The default
9601 values for these options depends on which style of 68000 was selected when
9602 the compiler was configured; the defaults for the most common choices are
9604 .IP "\fB\-m68000\fR" 4
9607 .IP "\fB\-mc68000\fR" 4
9610 Generate output for a 68000. This is the default
9611 when the compiler is configured for 68000\-based systems.
9613 Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
9614 including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
9615 .IP "\fB\-m68020\fR" 4
9618 .IP "\fB\-mc68020\fR" 4
9621 Generate output for a 68020. This is the default
9622 when the compiler is configured for 68020\-based systems.
9623 .IP "\fB\-m68881\fR" 4
9625 Generate output containing 68881 instructions for floating point.
9626 This is the default for most 68020 systems unless \fB\-\-nfp\fR was
9627 specified when the compiler was configured.
9628 .IP "\fB\-m68030\fR" 4
9630 Generate output for a 68030. This is the default when the compiler is
9631 configured for 68030\-based systems.
9632 .IP "\fB\-m68040\fR" 4
9634 Generate output for a 68040. This is the default when the compiler is
9635 configured for 68040\-based systems.
9637 This option inhibits the use of 68881/68882 instructions that have to be
9638 emulated by software on the 68040. Use this option if your 68040 does not
9639 have code to emulate those instructions.
9640 .IP "\fB\-m68060\fR" 4
9642 Generate output for a 68060. This is the default when the compiler is
9643 configured for 68060\-based systems.
9645 This option inhibits the use of 68020 and 68881/68882 instructions that
9646 have to be emulated by software on the 68060. Use this option if your 68060
9647 does not have code to emulate those instructions.
9648 .IP "\fB\-mcpu32\fR" 4
9650 Generate output for a \s-1CPU32\s0. This is the default
9651 when the compiler is configured for CPU32\-based systems.
9653 Use this option for microcontrollers with a
9654 \&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
9655 68336, 68340, 68341, 68349 and 68360.
9656 .IP "\fB\-m5200\fR" 4
9658 Generate output for a 520X \*(L"coldfire\*(R" family cpu. This is the default
9659 when the compiler is configured for 520X\-based systems.
9661 Use this option for microcontroller with a 5200 core, including
9662 the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5202\s0.
9663 .IP "\fB\-mcfv4e\fR" 4
9665 Generate output for a ColdFire V4e family cpu (e.g. 547x/548x).
9666 This includes use of hardware floating point instructions.
9667 .IP "\fB\-m68020\-40\fR" 4
9668 .IX Item "-m68020-40"
9669 Generate output for a 68040, without using any of the new instructions.
9670 This results in code which can run relatively efficiently on either a
9671 68020/68881 or a 68030 or a 68040. The generated code does use the
9672 68881 instructions that are emulated on the 68040.
9673 .IP "\fB\-m68020\-60\fR" 4
9674 .IX Item "-m68020-60"
9675 Generate output for a 68060, without using any of the new instructions.
9676 This results in code which can run relatively efficiently on either a
9677 68020/68881 or a 68030 or a 68040. The generated code does use the
9678 68881 instructions that are emulated on the 68060.
9679 .IP "\fB\-msoft\-float\fR" 4
9680 .IX Item "-msoft-float"
9681 Generate output containing library calls for floating point.
9682 \&\fBWarning:\fR the requisite libraries are not available for all m68k
9683 targets. Normally the facilities of the machine's usual C compiler are
9684 used, but this can't be done directly in cross\-compilation. You must
9685 make your own arrangements to provide suitable library functions for
9686 cross\-compilation. The embedded targets \fBm68k\-*\-aout\fR and
9687 \&\fBm68k\-*\-coff\fR do provide software floating point support.
9688 .IP "\fB\-mshort\fR" 4
9690 Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
9691 Additionally, parameters passed on the stack are also aligned to a
9692 16\-bit boundary even on targets whose \s-1API\s0 mandates promotion to 32\-bit.
9693 .IP "\fB\-mnobitfield\fR" 4
9694 .IX Item "-mnobitfield"
9695 Do not use the bit-field instructions. The \fB\-m68000\fR, \fB\-mcpu32\fR
9696 and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
9697 .IP "\fB\-mbitfield\fR" 4
9698 .IX Item "-mbitfield"
9699 Do use the bit-field instructions. The \fB\-m68020\fR option implies
9700 \&\fB\-mbitfield\fR. This is the default if you use a configuration
9701 designed for a 68020.
9702 .IP "\fB\-mrtd\fR" 4
9704 Use a different function-calling convention, in which functions
9705 that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
9706 instruction, which pops their arguments while returning. This
9707 saves one instruction in the caller since there is no need to pop
9708 the arguments there.
9710 This calling convention is incompatible with the one normally
9711 used on Unix, so you cannot use it if you need to call libraries
9712 compiled with the Unix compiler.
9714 Also, you must provide function prototypes for all functions that
9715 take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
9716 otherwise incorrect code will be generated for calls to those
9719 In addition, seriously incorrect code will result if you call a
9720 function with too many arguments. (Normally, extra arguments are
9721 harmlessly ignored.)
9723 The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
9724 68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
9725 .IP "\fB\-malign\-int\fR" 4
9726 .IX Item "-malign-int"
9728 .IP "\fB\-mno\-align\-int\fR" 4
9729 .IX Item "-mno-align-int"
9731 Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
9732 \&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
9733 boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
9734 Aligning variables on 32\-bit boundaries produces code that runs somewhat
9735 faster on processors with 32\-bit busses at the expense of more memory.
9737 \&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
9738 align structures containing the above types differently than
9739 most published application binary interface specifications for the m68k.
9740 .IP "\fB\-mpcrel\fR" 4
9742 Use the pc-relative addressing mode of the 68000 directly, instead of
9743 using a global offset table. At present, this option implies \fB\-fpic\fR,
9744 allowing at most a 16\-bit offset for pc-relative addressing. \fB\-fPIC\fR is
9745 not presently supported with \fB\-mpcrel\fR, though this could be supported for
9746 68020 and higher processors.
9747 .IP "\fB\-mno\-strict\-align\fR" 4
9748 .IX Item "-mno-strict-align"
9750 .IP "\fB\-mstrict\-align\fR" 4
9751 .IX Item "-mstrict-align"
9753 Do not (do) assume that unaligned memory references will be handled by
9755 .IP "\fB\-msep\-data\fR" 4
9756 .IX Item "-msep-data"
9757 Generate code that allows the data segment to be located in a different
9758 area of memory from the text segment. This allows for execute in place in
9759 an environment without virtual memory management. This option implies
9761 .IP "\fB\-mno\-sep\-data\fR" 4
9762 .IX Item "-mno-sep-data"
9763 Generate code that assumes that the data segment follows the text segment.
9764 This is the default.
9765 .IP "\fB\-mid\-shared\-library\fR" 4
9766 .IX Item "-mid-shared-library"
9767 Generate code that supports shared libraries via the library \s-1ID\s0 method.
9768 This allows for execute in place and shared libraries in an environment
9769 without virtual memory management. This option implies \fB\-fPIC\fR.
9770 .IP "\fB\-mno\-id\-shared\-library\fR" 4
9771 .IX Item "-mno-id-shared-library"
9772 Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
9773 This is the default.
9774 .IP "\fB\-mshared\-library\-id=n\fR" 4
9775 .IX Item "-mshared-library-id=n"
9776 Specified the identification number of the \s-1ID\s0 based shared library being
9777 compiled. Specifying a value of 0 will generate more compact code, specifying
9778 other values will force the allocation of that number to the current
9779 library but is no more space or time efficient than omitting this option.
9781 \fIM68hc1x Options\fR
9782 .IX Subsection "M68hc1x Options"
9784 These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
9785 microcontrollers. The default values for these options depends on
9786 which style of microcontroller was selected when the compiler was configured;
9787 the defaults for the most common choices are given below.
9788 .IP "\fB\-m6811\fR" 4
9791 .IP "\fB\-m68hc11\fR" 4
9794 Generate output for a 68HC11. This is the default
9795 when the compiler is configured for 68HC11\-based systems.
9796 .IP "\fB\-m6812\fR" 4
9799 .IP "\fB\-m68hc12\fR" 4
9802 Generate output for a 68HC12. This is the default
9803 when the compiler is configured for 68HC12\-based systems.
9804 .IP "\fB\-m68S12\fR" 4
9807 .IP "\fB\-m68hcs12\fR" 4
9808 .IX Item "-m68hcs12"
9810 Generate output for a 68HCS12.
9811 .IP "\fB\-mauto\-incdec\fR" 4
9812 .IX Item "-mauto-incdec"
9813 Enable the use of 68HC12 pre and post auto-increment and auto-decrement
9815 .IP "\fB\-minmax\fR" 4
9818 .IP "\fB\-nominmax\fR" 4
9819 .IX Item "-nominmax"
9821 Enable the use of 68HC12 min and max instructions.
9822 .IP "\fB\-mlong\-calls\fR" 4
9823 .IX Item "-mlong-calls"
9825 .IP "\fB\-mno\-long\-calls\fR" 4
9826 .IX Item "-mno-long-calls"
9828 Treat all calls as being far away (near). If calls are assumed to be
9829 far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
9830 call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
9831 .IP "\fB\-mshort\fR" 4
9833 Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
9834 .IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
9835 .IX Item "-msoft-reg-count=count"
9836 Specify the number of pseudo-soft registers which are used for the
9837 code generation. The maximum number is 32. Using more pseudo-soft
9838 register may or may not result in better code depending on the program.
9839 The default is 4 for 68HC11 and 2 for 68HC12.
9842 .IX Subsection "MCore Options"
9844 These are the \fB\-m\fR options defined for the Motorola M*Core
9846 .IP "\fB\-mhardlit\fR" 4
9847 .IX Item "-mhardlit"
9849 .IP "\fB\-mno\-hardlit\fR" 4
9850 .IX Item "-mno-hardlit"
9852 Inline constants into the code stream if it can be done in two
9853 instructions or less.
9854 .IP "\fB\-mdiv\fR" 4
9857 .IP "\fB\-mno\-div\fR" 4
9860 Use the divide instruction. (Enabled by default).
9861 .IP "\fB\-mrelax\-immediate\fR" 4
9862 .IX Item "-mrelax-immediate"
9864 .IP "\fB\-mno\-relax\-immediate\fR" 4
9865 .IX Item "-mno-relax-immediate"
9867 Allow arbitrary sized immediates in bit operations.
9868 .IP "\fB\-mwide\-bitfields\fR" 4
9869 .IX Item "-mwide-bitfields"
9871 .IP "\fB\-mno\-wide\-bitfields\fR" 4
9872 .IX Item "-mno-wide-bitfields"
9874 Always treat bit-fields as int\-sized.
9875 .IP "\fB\-m4byte\-functions\fR" 4
9876 .IX Item "-m4byte-functions"
9878 .IP "\fB\-mno\-4byte\-functions\fR" 4
9879 .IX Item "-mno-4byte-functions"
9881 Force all functions to be aligned to a four byte boundary.
9882 .IP "\fB\-mcallgraph\-data\fR" 4
9883 .IX Item "-mcallgraph-data"
9885 .IP "\fB\-mno\-callgraph\-data\fR" 4
9886 .IX Item "-mno-callgraph-data"
9888 Emit callgraph information.
9889 .IP "\fB\-mslow\-bytes\fR" 4
9890 .IX Item "-mslow-bytes"
9892 .IP "\fB\-mno\-slow\-bytes\fR" 4
9893 .IX Item "-mno-slow-bytes"
9895 Prefer word access when reading byte quantities.
9896 .IP "\fB\-mlittle\-endian\fR" 4
9897 .IX Item "-mlittle-endian"
9899 .IP "\fB\-mbig\-endian\fR" 4
9900 .IX Item "-mbig-endian"
9902 Generate code for a little endian target.
9903 .IP "\fB\-m210\fR" 4
9906 .IP "\fB\-m340\fR" 4
9909 Generate code for the 210 processor.
9911 \fI\s-1MIPS\s0 Options\fR
9912 .IX Subsection "MIPS Options"
9915 Generate big-endian code.
9918 Generate little-endian code. This is the default for \fBmips*el\-*\-*\fR
9920 .IP "\fB\-march=\fR\fIarch\fR" 4
9921 .IX Item "-march=arch"
9922 Generate code that will run on \fIarch\fR, which can be the name of a
9923 generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
9924 The \s-1ISA\s0 names are:
9925 \&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
9926 \&\fBmips32\fR, \fBmips32r2\fR, and \fBmips64\fR.
9927 The processor names are:
9928 \&\fB4kc\fR, \fB4km\fR, \fB4kp\fR,
9929 \&\fB5kc\fR, \fB5kf\fR,
9931 \&\fB24k\fR, \fB24kc\fR, \fB24kf\fR, \fB24kx\fR,
9934 \&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
9935 \&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR,
9936 \&\fBrm7000\fR, \fBrm9000\fR,
9939 \&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4130\fR, \fBvr4300\fR,
9940 \&\fBvr5000\fR, \fBvr5400\fR and \fBvr5500\fR.
9941 The special value \fBfrom-abi\fR selects the
9942 most compatible architecture for the selected \s-1ABI\s0 (that is,
9943 \&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
9945 In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
9946 (for example, \fB\-march=r2k\fR). Prefixes are optional, and
9947 \&\fBvr\fR may be written \fBr\fR.
9949 \&\s-1GCC\s0 defines two macros based on the value of this option. The first
9950 is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
9951 a string. The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
9952 where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
9953 For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
9954 to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
9956 Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
9957 above. In other words, it will have the full prefix and will not
9958 abbreviate \fB000\fR as \fBk\fR. In the case of \fBfrom-abi\fR,
9959 the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
9960 \&\fB\*(L"mips3\*(R"\fR). It names the default architecture when no
9961 \&\fB\-march\fR option is given.
9962 .IP "\fB\-mtune=\fR\fIarch\fR" 4
9963 .IX Item "-mtune=arch"
9964 Optimize for \fIarch\fR. Among other things, this option controls
9965 the way instructions are scheduled, and the perceived cost of arithmetic
9966 operations. The list of \fIarch\fR values is the same as for
9969 When this option is not used, \s-1GCC\s0 will optimize for the processor
9970 specified by \fB\-march\fR. By using \fB\-march\fR and
9971 \&\fB\-mtune\fR together, it is possible to generate code that will
9972 run on a family of processors, but optimize the code for one
9973 particular member of that family.
9975 \&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
9976 \&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
9977 \&\fB\-march\fR ones described above.
9978 .IP "\fB\-mips1\fR" 4
9980 Equivalent to \fB\-march=mips1\fR.
9981 .IP "\fB\-mips2\fR" 4
9983 Equivalent to \fB\-march=mips2\fR.
9984 .IP "\fB\-mips3\fR" 4
9986 Equivalent to \fB\-march=mips3\fR.
9987 .IP "\fB\-mips4\fR" 4
9989 Equivalent to \fB\-march=mips4\fR.
9990 .IP "\fB\-mips32\fR" 4
9992 Equivalent to \fB\-march=mips32\fR.
9993 .IP "\fB\-mips32r2\fR" 4
9994 .IX Item "-mips32r2"
9995 Equivalent to \fB\-march=mips32r2\fR.
9996 .IP "\fB\-mips64\fR" 4
9998 Equivalent to \fB\-march=mips64\fR.
9999 .IP "\fB\-mips16\fR" 4
10002 .IP "\fB\-mno\-mips16\fR" 4
10003 .IX Item "-mno-mips16"
10005 Generate (do not generate) \s-1MIPS16\s0 code. If \s-1GCC\s0 is targetting a
10006 \&\s-1MIPS32\s0 or \s-1MIPS64\s0 architecture, it will make use of the MIPS16e \s-1ASE\s0.
10007 .IP "\fB\-mabi=32\fR" 4
10008 .IX Item "-mabi=32"
10010 .IP "\fB\-mabi=o64\fR" 4
10011 .IX Item "-mabi=o64"
10012 .IP "\fB\-mabi=n32\fR" 4
10013 .IX Item "-mabi=n32"
10014 .IP "\fB\-mabi=64\fR" 4
10015 .IX Item "-mabi=64"
10016 .IP "\fB\-mabi=eabi\fR" 4
10017 .IX Item "-mabi=eabi"
10019 Generate code for the given \s-1ABI\s0.
10021 Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant. \s-1GCC\s0 normally
10022 generates 64\-bit code when you select a 64\-bit architecture, but you
10023 can use \fB\-mgp32\fR to get 32\-bit code instead.
10025 For information about the O64 \s-1ABI\s0, see
10026 <\fBhttp://gcc.gnu.org/projects/mipso64\-abi.html\fR>.
10027 .IP "\fB\-mabicalls\fR" 4
10028 .IX Item "-mabicalls"
10030 .IP "\fB\-mno\-abicalls\fR" 4
10031 .IX Item "-mno-abicalls"
10033 Generate (do not generate) code that is suitable for SVR4\-style
10034 dynamic objects. \fB\-mabicalls\fR is the default for SVR4\-based
10036 .IP "\fB\-mshared\fR" 4
10037 .IX Item "-mshared"
10039 .IP "\fB\-mno\-shared\fR" 4
10040 .IX Item "-mno-shared"
10042 Generate (do not generate) code that is fully position\-independent,
10043 and that can therefore be linked into shared libraries. This option
10044 only affects \fB\-mabicalls\fR.
10046 All \fB\-mabicalls\fR code has traditionally been position\-independent,
10047 regardless of options like \fB\-fPIC\fR and \fB\-fpic\fR. However,
10048 as an extension, the \s-1GNU\s0 toolchain allows executables to use absolute
10049 accesses for locally-binding symbols. It can also use shorter \s-1GP\s0
10050 initialization sequences and generate direct calls to locally-defined
10051 functions. This mode is selected by \fB\-mno\-shared\fR.
10053 \&\fB\-mno\-shared\fR depends on binutils 2.16 or higher and generates
10054 objects that can only be linked by the \s-1GNU\s0 linker. However, the option
10055 does not affect the \s-1ABI\s0 of the final executable; it only affects the \s-1ABI\s0
10056 of relocatable objects. Using \fB\-mno\-shared\fR will generally make
10057 executables both smaller and quicker.
10059 \&\fB\-mshared\fR is the default.
10060 .IP "\fB\-mxgot\fR" 4
10063 .IP "\fB\-mno\-xgot\fR" 4
10064 .IX Item "-mno-xgot"
10066 Lift (do not lift) the usual restrictions on the size of the global
10069 \&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
10070 While this is relatively efficient, it will only work if the \s-1GOT\s0
10071 is smaller than about 64k. Anything larger will cause the linker
10072 to report an error such as:
10075 \& relocation truncated to fit: R_MIPS_GOT16 foobar
10078 If this happens, you should recompile your code with \fB\-mxgot\fR.
10079 It should then work with very large GOTs, although it will also be
10080 less efficient, since it will take three instructions to fetch the
10081 value of a global symbol.
10083 Note that some linkers can create multiple GOTs. If you have such a
10084 linker, you should only need to use \fB\-mxgot\fR when a single object
10085 file accesses more than 64k's worth of \s-1GOT\s0 entries. Very few do.
10087 These options have no effect unless \s-1GCC\s0 is generating position
10089 .IP "\fB\-mgp32\fR" 4
10091 Assume that general-purpose registers are 32 bits wide.
10092 .IP "\fB\-mgp64\fR" 4
10094 Assume that general-purpose registers are 64 bits wide.
10095 .IP "\fB\-mfp32\fR" 4
10097 Assume that floating-point registers are 32 bits wide.
10098 .IP "\fB\-mfp64\fR" 4
10100 Assume that floating-point registers are 64 bits wide.
10101 .IP "\fB\-mhard\-float\fR" 4
10102 .IX Item "-mhard-float"
10103 Use floating-point coprocessor instructions.
10104 .IP "\fB\-msoft\-float\fR" 4
10105 .IX Item "-msoft-float"
10106 Do not use floating-point coprocessor instructions. Implement
10107 floating-point calculations using library calls instead.
10108 .IP "\fB\-msingle\-float\fR" 4
10109 .IX Item "-msingle-float"
10110 Assume that the floating-point coprocessor only supports single-precision
10112 .IP "\fB\-mdouble\-float\fR" 4
10113 .IX Item "-mdouble-float"
10114 Assume that the floating-point coprocessor supports double-precision
10115 operations. This is the default.
10116 .IP "\fB\-mdsp\fR" 4
10119 .IP "\fB\-mno\-dsp\fR" 4
10120 .IX Item "-mno-dsp"
10122 Use (do not use) the \s-1MIPS\s0 \s-1DSP\s0 \s-1ASE\s0.
10123 .IP "\fB\-mpaired\-single\fR" 4
10124 .IX Item "-mpaired-single"
10126 .IP "\fB\-mno\-paired\-single\fR" 4
10127 .IX Item "-mno-paired-single"
10129 Use (do not use) paired-single floating-point instructions.
10130 This option can only be used
10131 when generating 64\-bit code and requires hardware floating-point
10132 support to be enabled.
10133 .IP "\fB\-mips3d\fR" 4
10136 .IP "\fB\-mno\-mips3d\fR" 4
10137 .IX Item "-mno-mips3d"
10139 Use (do not use) the \s-1MIPS\-3D\s0 \s-1ASE\s0.
10140 The option \fB\-mips3d\fR implies \fB\-mpaired\-single\fR.
10141 .IP "\fB\-mlong64\fR" 4
10142 .IX Item "-mlong64"
10143 Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide. See \fB\-mlong32\fR for
10144 an explanation of the default and the way that the pointer size is
10146 .IP "\fB\-mlong32\fR" 4
10147 .IX Item "-mlong32"
10148 Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
10150 The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
10151 the \s-1ABI\s0. All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs. The n64 \s-1ABI\s0
10152 uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
10153 32\-bit \f(CW\*(C`long\*(C'\fRs. Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
10154 or the same size as integer registers, whichever is smaller.
10155 .IP "\fB\-msym32\fR" 4
10158 .IP "\fB\-mno\-sym32\fR" 4
10159 .IX Item "-mno-sym32"
10161 Assume (do not assume) that all symbols have 32\-bit values, regardless
10162 of the selected \s-1ABI\s0. This option is useful in combination with
10163 \&\fB\-mabi=64\fR and \fB\-mno\-abicalls\fR because it allows \s-1GCC\s0
10164 to generate shorter and faster references to symbolic addresses.
10165 .IP "\fB\-G\fR \fInum\fR" 4
10167 Put global and static items less than or equal to \fInum\fR bytes into
10168 the small data or bss section instead of the normal data or bss section.
10169 This allows the data to be accessed using a single instruction.
10171 All modules should be compiled with the same \fB\-G\fR \fInum\fR
10173 .IP "\fB\-membedded\-data\fR" 4
10174 .IX Item "-membedded-data"
10176 .IP "\fB\-mno\-embedded\-data\fR" 4
10177 .IX Item "-mno-embedded-data"
10179 Allocate variables to the read-only data section first if possible, then
10180 next in the small data section if possible, otherwise in data. This gives
10181 slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
10182 when executing, and thus may be preferred for some embedded systems.
10183 .IP "\fB\-muninit\-const\-in\-rodata\fR" 4
10184 .IX Item "-muninit-const-in-rodata"
10186 .IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
10187 .IX Item "-mno-uninit-const-in-rodata"
10189 Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
10190 This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
10191 .IP "\fB\-msplit\-addresses\fR" 4
10192 .IX Item "-msplit-addresses"
10194 .IP "\fB\-mno\-split\-addresses\fR" 4
10195 .IX Item "-mno-split-addresses"
10197 Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
10198 relocation operators. This option has been superseded by
10199 \&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
10200 .IP "\fB\-mexplicit\-relocs\fR" 4
10201 .IX Item "-mexplicit-relocs"
10203 .IP "\fB\-mno\-explicit\-relocs\fR" 4
10204 .IX Item "-mno-explicit-relocs"
10206 Use (do not use) assembler relocation operators when dealing with symbolic
10207 addresses. The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
10208 is to use assembler macros instead.
10210 \&\fB\-mexplicit\-relocs\fR is the default if \s-1GCC\s0 was configured
10211 to use an assembler that supports relocation operators.
10212 .IP "\fB\-mcheck\-zero\-division\fR" 4
10213 .IX Item "-mcheck-zero-division"
10215 .IP "\fB\-mno\-check\-zero\-division\fR" 4
10216 .IX Item "-mno-check-zero-division"
10218 Trap (do not trap) on integer division by zero. The default is
10219 \&\fB\-mcheck\-zero\-division\fR.
10220 .IP "\fB\-mdivide\-traps\fR" 4
10221 .IX Item "-mdivide-traps"
10223 .IP "\fB\-mdivide\-breaks\fR" 4
10224 .IX Item "-mdivide-breaks"
10226 \&\s-1MIPS\s0 systems check for division by zero by generating either a
10227 conditional trap or a break instruction. Using traps results in
10228 smaller code, but is only supported on \s-1MIPS\s0 \s-1II\s0 and later. Also, some
10229 versions of the Linux kernel have a bug that prevents trap from
10230 generating the proper signal (\f(CW\*(C`SIGFPE\*(C'\fR). Use \fB\-mdivide\-traps\fR to
10231 allow conditional traps on architectures that support them and
10232 \&\fB\-mdivide\-breaks\fR to force the use of breaks.
10234 The default is usually \fB\-mdivide\-traps\fR, but this can be
10235 overridden at configure time using \fB\-\-with\-divide=breaks\fR.
10236 Divide-by-zero checks can be completely disabled using
10237 \&\fB\-mno\-check\-zero\-division\fR.
10238 .IP "\fB\-mmemcpy\fR" 4
10239 .IX Item "-mmemcpy"
10241 .IP "\fB\-mno\-memcpy\fR" 4
10242 .IX Item "-mno-memcpy"
10244 Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
10245 moves. The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
10246 most constant-sized copies.
10247 .IP "\fB\-mlong\-calls\fR" 4
10248 .IX Item "-mlong-calls"
10250 .IP "\fB\-mno\-long\-calls\fR" 4
10251 .IX Item "-mno-long-calls"
10253 Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction. Calling
10254 functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
10255 and callee to be in the same 256 megabyte segment.
10257 This option has no effect on abicalls code. The default is
10258 \&\fB\-mno\-long\-calls\fR.
10259 .IP "\fB\-mmad\fR" 4
10262 .IP "\fB\-mno\-mad\fR" 4
10263 .IX Item "-mno-mad"
10265 Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
10266 instructions, as provided by the R4650 \s-1ISA\s0.
10267 .IP "\fB\-mfused\-madd\fR" 4
10268 .IX Item "-mfused-madd"
10270 .IP "\fB\-mno\-fused\-madd\fR" 4
10271 .IX Item "-mno-fused-madd"
10273 Enable (disable) use of the floating point multiply-accumulate
10274 instructions, when they are available. The default is
10275 \&\fB\-mfused\-madd\fR.
10277 When multiply-accumulate instructions are used, the intermediate
10278 product is calculated to infinite precision and is not subject to
10279 the \s-1FCSR\s0 Flush to Zero bit. This may be undesirable in some
10281 .IP "\fB\-nocpp\fR" 4
10283 Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
10284 assembler files (with a \fB.s\fR suffix) when assembling them.
10285 .IP "\fB\-mfix\-r4000\fR" 4
10286 .IX Item "-mfix-r4000"
10288 .IP "\fB\-mno\-fix\-r4000\fR" 4
10289 .IX Item "-mno-fix-r4000"
10291 Work around certain R4000 \s-1CPU\s0 errata:
10294 A double-word or a variable shift may give an incorrect result if executed
10295 immediately after starting an integer division.
10297 A double-word or a variable shift may give an incorrect result if executed
10298 while an integer multiplication is in progress.
10300 An integer division may give an incorrect result if started in a delay slot
10301 of a taken branch or a jump.
10305 .IP "\fB\-mfix\-r4400\fR" 4
10306 .IX Item "-mfix-r4400"
10308 .IP "\fB\-mno\-fix\-r4400\fR" 4
10309 .IX Item "-mno-fix-r4400"
10311 Work around certain R4400 \s-1CPU\s0 errata:
10314 A double-word or a variable shift may give an incorrect result if executed
10315 immediately after starting an integer division.
10319 .IP "\fB\-mfix\-vr4120\fR" 4
10320 .IX Item "-mfix-vr4120"
10322 .IP "\fB\-mno\-fix\-vr4120\fR" 4
10323 .IX Item "-mno-fix-vr4120"
10325 Work around certain \s-1VR4120\s0 errata:
10328 \&\f(CW\*(C`dmultu\*(C'\fR does not always produce the correct result.
10330 \&\f(CW\*(C`div\*(C'\fR and \f(CW\*(C`ddiv\*(C'\fR do not always produce the correct result if one
10331 of the operands is negative.
10335 The workarounds for the division errata rely on special functions in
10336 \&\fIlibgcc.a\fR. At present, these functions are only provided by
10337 the \f(CW\*(C`mips64vr*\-elf\*(C'\fR configurations.
10339 Other \s-1VR4120\s0 errata require a nop to be inserted between certain pairs of
10340 instructions. These errata are handled by the assembler, not by \s-1GCC\s0 itself.
10342 .IP "\fB\-mfix\-vr4130\fR" 4
10343 .IX Item "-mfix-vr4130"
10344 Work around the \s-1VR4130\s0 \f(CW\*(C`mflo\*(C'\fR/\f(CW\*(C`mfhi\*(C'\fR errata. The
10345 workarounds are implemented by the assembler rather than by \s-1GCC\s0,
10346 although \s-1GCC\s0 will avoid using \f(CW\*(C`mflo\*(C'\fR and \f(CW\*(C`mfhi\*(C'\fR if the
10347 \&\s-1VR4130\s0 \f(CW\*(C`macc\*(C'\fR, \f(CW\*(C`macchi\*(C'\fR, \f(CW\*(C`dmacc\*(C'\fR and \f(CW\*(C`dmacchi\*(C'\fR
10348 instructions are available instead.
10349 .IP "\fB\-mfix\-sb1\fR" 4
10350 .IX Item "-mfix-sb1"
10352 .IP "\fB\-mno\-fix\-sb1\fR" 4
10353 .IX Item "-mno-fix-sb1"
10355 Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
10356 (This flag currently works around the \s-1SB\-1\s0 revision 2
10357 \&\*(L"F1\*(R" and \*(L"F2\*(R" floating point errata.)
10358 .IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
10359 .IX Item "-mflush-func=func"
10361 .IP "\fB\-mno\-flush\-func\fR" 4
10362 .IX Item "-mno-flush-func"
10364 Specifies the function to call to flush the I and D caches, or to not
10365 call any such function. If called, the function must take the same
10366 arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
10367 memory range for which the cache is being flushed, the size of the
10368 memory range, and the number 3 (to flush both caches). The default
10369 depends on the target \s-1GCC\s0 was configured for, but commonly is either
10370 \&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
10371 .IP "\fB\-mbranch\-likely\fR" 4
10372 .IX Item "-mbranch-likely"
10374 .IP "\fB\-mno\-branch\-likely\fR" 4
10375 .IX Item "-mno-branch-likely"
10377 Enable or disable use of Branch Likely instructions, regardless of the
10378 default for the selected architecture. By default, Branch Likely
10379 instructions may be generated if they are supported by the selected
10380 architecture. An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
10381 and processors which implement those architectures; for those, Branch
10382 Likely instructions will not be generated by default because the \s-1MIPS32\s0
10383 and \s-1MIPS64\s0 architectures specifically deprecate their use.
10384 .IP "\fB\-mfp\-exceptions\fR" 4
10385 .IX Item "-mfp-exceptions"
10387 .IP "\fB\-mno\-fp\-exceptions\fR" 4
10388 .IX Item "-mno-fp-exceptions"
10390 Specifies whether \s-1FP\s0 exceptions are enabled. This affects how we schedule
10391 \&\s-1FP\s0 instructions for some processors. The default is that \s-1FP\s0 exceptions are
10394 For instance, on the \s-1SB\-1\s0, if \s-1FP\s0 exceptions are disabled, and we are emitting
10395 64\-bit code, then we can use both \s-1FP\s0 pipes. Otherwise, we can only use one
10397 .IP "\fB\-mvr4130\-align\fR" 4
10398 .IX Item "-mvr4130-align"
10400 .IP "\fB\-mno\-vr4130\-align\fR" 4
10401 .IX Item "-mno-vr4130-align"
10403 The \s-1VR4130\s0 pipeline is two-way superscalar, but can only issue two
10404 instructions together if the first one is 8\-byte aligned. When this
10405 option is enabled, \s-1GCC\s0 will align pairs of instructions that it
10406 thinks should execute in parallel.
10408 This option only has an effect when optimizing for the \s-1VR4130\s0.
10409 It normally makes code faster, but at the expense of making it bigger.
10410 It is enabled by default at optimization level \fB\-O3\fR.
10412 \fI\s-1MMIX\s0 Options\fR
10413 .IX Subsection "MMIX Options"
10415 These options are defined for the \s-1MMIX:\s0
10416 .IP "\fB\-mlibfuncs\fR" 4
10417 .IX Item "-mlibfuncs"
10419 .IP "\fB\-mno\-libfuncs\fR" 4
10420 .IX Item "-mno-libfuncs"
10422 Specify that intrinsic library functions are being compiled, passing all
10423 values in registers, no matter the size.
10424 .IP "\fB\-mepsilon\fR" 4
10425 .IX Item "-mepsilon"
10427 .IP "\fB\-mno\-epsilon\fR" 4
10428 .IX Item "-mno-epsilon"
10430 Generate floating-point comparison instructions that compare with respect
10431 to the \f(CW\*(C`rE\*(C'\fR epsilon register.
10432 .IP "\fB\-mabi=mmixware\fR" 4
10433 .IX Item "-mabi=mmixware"
10435 .IP "\fB\-mabi=gnu\fR" 4
10436 .IX Item "-mabi=gnu"
10438 Generate code that passes function parameters and return values that (in
10439 the called function) are seen as registers \f(CW$0\fR and up, as opposed to
10440 the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
10441 .IP "\fB\-mzero\-extend\fR" 4
10442 .IX Item "-mzero-extend"
10444 .IP "\fB\-mno\-zero\-extend\fR" 4
10445 .IX Item "-mno-zero-extend"
10447 When reading data from memory in sizes shorter than 64 bits, use (do not
10448 use) zero-extending load instructions by default, rather than
10449 sign-extending ones.
10450 .IP "\fB\-mknuthdiv\fR" 4
10451 .IX Item "-mknuthdiv"
10453 .IP "\fB\-mno\-knuthdiv\fR" 4
10454 .IX Item "-mno-knuthdiv"
10456 Make the result of a division yielding a remainder have the same sign as
10457 the divisor. With the default, \fB\-mno\-knuthdiv\fR, the sign of the
10458 remainder follows the sign of the dividend. Both methods are
10459 arithmetically valid, the latter being almost exclusively used.
10460 .IP "\fB\-mtoplevel\-symbols\fR" 4
10461 .IX Item "-mtoplevel-symbols"
10463 .IP "\fB\-mno\-toplevel\-symbols\fR" 4
10464 .IX Item "-mno-toplevel-symbols"
10466 Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
10467 code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
10468 .IP "\fB\-melf\fR" 4
10470 Generate an executable in the \s-1ELF\s0 format, rather than the default
10471 \&\fBmmo\fR format used by the \fBmmix\fR simulator.
10472 .IP "\fB\-mbranch\-predict\fR" 4
10473 .IX Item "-mbranch-predict"
10475 .IP "\fB\-mno\-branch\-predict\fR" 4
10476 .IX Item "-mno-branch-predict"
10478 Use (do not use) the probable-branch instructions, when static branch
10479 prediction indicates a probable branch.
10480 .IP "\fB\-mbase\-addresses\fR" 4
10481 .IX Item "-mbase-addresses"
10483 .IP "\fB\-mno\-base\-addresses\fR" 4
10484 .IX Item "-mno-base-addresses"
10486 Generate (do not generate) code that uses \fIbase addresses\fR. Using a
10487 base address automatically generates a request (handled by the assembler
10488 and the linker) for a constant to be set up in a global register. The
10489 register is used for one or more base address requests within the range 0
10490 to 255 from the value held in the register. The generally leads to short
10491 and fast code, but the number of different data items that can be
10492 addressed is limited. This means that a program that uses lots of static
10493 data may require \fB\-mno\-base\-addresses\fR.
10494 .IP "\fB\-msingle\-exit\fR" 4
10495 .IX Item "-msingle-exit"
10497 .IP "\fB\-mno\-single\-exit\fR" 4
10498 .IX Item "-mno-single-exit"
10500 Force (do not force) generated code to have a single exit point in each
10503 \fI\s-1MN10300\s0 Options\fR
10504 .IX Subsection "MN10300 Options"
10506 These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
10507 .IP "\fB\-mmult\-bug\fR" 4
10508 .IX Item "-mmult-bug"
10509 Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
10510 processors. This is the default.
10511 .IP "\fB\-mno\-mult\-bug\fR" 4
10512 .IX Item "-mno-mult-bug"
10513 Do not generate code to avoid bugs in the multiply instructions for the
10514 \&\s-1MN10300\s0 processors.
10515 .IP "\fB\-mam33\fR" 4
10517 Generate code which uses features specific to the \s-1AM33\s0 processor.
10518 .IP "\fB\-mno\-am33\fR" 4
10519 .IX Item "-mno-am33"
10520 Do not generate code which uses features specific to the \s-1AM33\s0 processor. This
10522 .IP "\fB\-mreturn\-pointer\-on\-d0\fR" 4
10523 .IX Item "-mreturn-pointer-on-d0"
10524 When generating a function which returns a pointer, return the pointer
10525 in both \f(CW\*(C`a0\*(C'\fR and \f(CW\*(C`d0\*(C'\fR. Otherwise, the pointer is returned
10526 only in a0, and attempts to call such functions without a prototype
10527 would result in errors. Note that this option is on by default; use
10528 \&\fB\-mno\-return\-pointer\-on\-d0\fR to disable it.
10529 .IP "\fB\-mno\-crt0\fR" 4
10530 .IX Item "-mno-crt0"
10531 Do not link in the C run-time initialization object file.
10532 .IP "\fB\-mrelax\fR" 4
10534 Indicate to the linker that it should perform a relaxation optimization pass
10535 to shorten branches, calls and absolute memory addresses. This option only
10536 has an effect when used on the command line for the final link step.
10538 This option makes symbolic debugging impossible.
10540 \fI\s-1MT\s0 Options\fR
10541 .IX Subsection "MT Options"
10543 These \fB\-m\fR options are defined for Morpho \s-1MT\s0 architectures:
10544 .IP "\fB\-march=\fR\fIcpu-type\fR" 4
10545 .IX Item "-march=cpu-type"
10546 Generate code that will run on \fIcpu-type\fR, which is the name of a system
10547 representing a certain processor type. Possible values for
10548 \&\fIcpu-type\fR are \fBms1\-64\-001\fR, \fBms1\-16\-002\fR,
10549 \&\fBms1\-16\-003\fR and \fBms2\fR.
10551 When this option is not used, the default is \fB\-march=ms1\-16\-002\fR.
10552 .IP "\fB\-mbacc\fR" 4
10554 Use byte loads and stores when generating code.
10555 .IP "\fB\-mno\-bacc\fR" 4
10556 .IX Item "-mno-bacc"
10557 Do not use byte loads and stores when generating code.
10558 .IP "\fB\-msim\fR" 4
10560 Use simulator runtime
10561 .IP "\fB\-mno\-crt0\fR" 4
10562 .IX Item "-mno-crt0"
10563 Do not link in the C run-time initialization object file
10564 \&\fIcrti.o\fR. Other run-time initialization and termination files
10565 such as \fIstartup.o\fR and \fIexit.o\fR are still included on the
10566 linker command line.
10568 \fI\s-1PDP\-11\s0 Options\fR
10569 .IX Subsection "PDP-11 Options"
10571 These options are defined for the \s-1PDP\-11:\s0
10572 .IP "\fB\-mfpu\fR" 4
10574 Use hardware \s-1FPP\s0 floating point. This is the default. (\s-1FIS\s0 floating
10575 point on the \s-1PDP\-11/40\s0 is not supported.)
10576 .IP "\fB\-msoft\-float\fR" 4
10577 .IX Item "-msoft-float"
10578 Do not use hardware floating point.
10579 .IP "\fB\-mac0\fR" 4
10581 Return floating-point results in ac0 (fr0 in Unix assembler syntax).
10582 .IP "\fB\-mno\-ac0\fR" 4
10583 .IX Item "-mno-ac0"
10584 Return floating-point results in memory. This is the default.
10585 .IP "\fB\-m40\fR" 4
10587 Generate code for a \s-1PDP\-11/40\s0.
10588 .IP "\fB\-m45\fR" 4
10590 Generate code for a \s-1PDP\-11/45\s0. This is the default.
10591 .IP "\fB\-m10\fR" 4
10593 Generate code for a \s-1PDP\-11/10\s0.
10594 .IP "\fB\-mbcopy\-builtin\fR" 4
10595 .IX Item "-mbcopy-builtin"
10596 Use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory. This is the
10598 .IP "\fB\-mbcopy\fR" 4
10600 Do not use inline \f(CW\*(C`movmemhi\*(C'\fR patterns for copying memory.
10601 .IP "\fB\-mint16\fR" 4
10604 .IP "\fB\-mno\-int32\fR" 4
10605 .IX Item "-mno-int32"
10607 Use 16\-bit \f(CW\*(C`int\*(C'\fR. This is the default.
10608 .IP "\fB\-mint32\fR" 4
10611 .IP "\fB\-mno\-int16\fR" 4
10612 .IX Item "-mno-int16"
10614 Use 32\-bit \f(CW\*(C`int\*(C'\fR.
10615 .IP "\fB\-mfloat64\fR" 4
10616 .IX Item "-mfloat64"
10618 .IP "\fB\-mno\-float32\fR" 4
10619 .IX Item "-mno-float32"
10621 Use 64\-bit \f(CW\*(C`float\*(C'\fR. This is the default.
10622 .IP "\fB\-mfloat32\fR" 4
10623 .IX Item "-mfloat32"
10625 .IP "\fB\-mno\-float64\fR" 4
10626 .IX Item "-mno-float64"
10628 Use 32\-bit \f(CW\*(C`float\*(C'\fR.
10629 .IP "\fB\-mabshi\fR" 4
10631 Use \f(CW\*(C`abshi2\*(C'\fR pattern. This is the default.
10632 .IP "\fB\-mno\-abshi\fR" 4
10633 .IX Item "-mno-abshi"
10634 Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
10635 .IP "\fB\-mbranch\-expensive\fR" 4
10636 .IX Item "-mbranch-expensive"
10637 Pretend that branches are expensive. This is for experimenting with
10638 code generation only.
10639 .IP "\fB\-mbranch\-cheap\fR" 4
10640 .IX Item "-mbranch-cheap"
10641 Do not pretend that branches are expensive. This is the default.
10642 .IP "\fB\-msplit\fR" 4
10644 Generate code for a system with split I&D.
10645 .IP "\fB\-mno\-split\fR" 4
10646 .IX Item "-mno-split"
10647 Generate code for a system without split I&D. This is the default.
10648 .IP "\fB\-munix\-asm\fR" 4
10649 .IX Item "-munix-asm"
10650 Use Unix assembler syntax. This is the default when configured for
10651 \&\fBpdp11\-*\-bsd\fR.
10652 .IP "\fB\-mdec\-asm\fR" 4
10653 .IX Item "-mdec-asm"
10654 Use \s-1DEC\s0 assembler syntax. This is the default when configured for any
10655 \&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
10657 \fIPowerPC Options\fR
10658 .IX Subsection "PowerPC Options"
10660 These are listed under
10662 \fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
10663 .IX Subsection "IBM RS/6000 and PowerPC Options"
10665 These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
10666 .IP "\fB\-mpower\fR" 4
10669 .IP "\fB\-mno\-power\fR" 4
10670 .IX Item "-mno-power"
10671 .IP "\fB\-mpower2\fR" 4
10672 .IX Item "-mpower2"
10673 .IP "\fB\-mno\-power2\fR" 4
10674 .IX Item "-mno-power2"
10675 .IP "\fB\-mpowerpc\fR" 4
10676 .IX Item "-mpowerpc"
10677 .IP "\fB\-mno\-powerpc\fR" 4
10678 .IX Item "-mno-powerpc"
10679 .IP "\fB\-mpowerpc\-gpopt\fR" 4
10680 .IX Item "-mpowerpc-gpopt"
10681 .IP "\fB\-mno\-powerpc\-gpopt\fR" 4
10682 .IX Item "-mno-powerpc-gpopt"
10683 .IP "\fB\-mpowerpc\-gfxopt\fR" 4
10684 .IX Item "-mpowerpc-gfxopt"
10685 .IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
10686 .IX Item "-mno-powerpc-gfxopt"
10687 .IP "\fB\-mpowerpc64\fR" 4
10688 .IX Item "-mpowerpc64"
10689 .IP "\fB\-mno\-powerpc64\fR" 4
10690 .IX Item "-mno-powerpc64"
10691 .IP "\fB\-mmfcrf\fR" 4
10693 .IP "\fB\-mno\-mfcrf\fR" 4
10694 .IX Item "-mno-mfcrf"
10695 .IP "\fB\-mpopcntb\fR" 4
10696 .IX Item "-mpopcntb"
10697 .IP "\fB\-mno\-popcntb\fR" 4
10698 .IX Item "-mno-popcntb"
10699 .IP "\fB\-mfprnd\fR" 4
10701 .IP "\fB\-mno\-fprnd\fR" 4
10702 .IX Item "-mno-fprnd"
10704 \&\s-1GCC\s0 supports two related instruction set architectures for the
10705 \&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those
10706 instructions supported by the \fBrios\fR chip set used in the original
10707 \&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
10708 architecture of the Freescale MPC5xx, MPC6xx, MPC8xx microprocessors, and
10709 the \s-1IBM\s0 4xx, 6xx, and follow-on microprocessors.
10711 Neither architecture is a subset of the other. However there is a
10712 large common subset of instructions supported by both. An \s-1MQ\s0
10713 register is included in processors supporting the \s-1POWER\s0 architecture.
10715 You use these options to specify which instructions are available on the
10716 processor you are using. The default value of these options is
10717 determined when configuring \s-1GCC\s0. Specifying the
10718 \&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
10719 options. We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
10720 rather than the options listed above.
10722 The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
10723 are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
10724 Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
10725 to generate instructions that are present in the \s-1POWER2\s0 architecture but
10726 not the original \s-1POWER\s0 architecture.
10728 The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
10729 are found only in the 32\-bit subset of the PowerPC architecture.
10730 Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
10731 \&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
10732 General Purpose group, including floating-point square root. Specifying
10733 \&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
10734 use the optional PowerPC architecture instructions in the Graphics
10735 group, including floating-point select.
10737 The \fB\-mmfcrf\fR option allows \s-1GCC\s0 to generate the move from
10738 condition register field instruction implemented on the \s-1POWER4\s0
10739 processor and other processors that support the PowerPC V2.01
10741 The \fB\-mpopcntb\fR option allows \s-1GCC\s0 to generate the popcount and
10742 double precision \s-1FP\s0 reciprocal estimate instruction implemented on the
10743 \&\s-1POWER5\s0 processor and other processors that support the PowerPC V2.02
10745 The \fB\-mfprnd\fR option allows \s-1GCC\s0 to generate the \s-1FP\s0 round to
10746 integer instructions implemented on the \s-1POWER5+\s0 processor and other
10747 processors that support the PowerPC V2.03 architecture.
10749 The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
10750 64\-bit instructions that are found in the full PowerPC64 architecture
10751 and to treat GPRs as 64\-bit, doubleword quantities. \s-1GCC\s0 defaults to
10752 \&\fB\-mno\-powerpc64\fR.
10754 If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
10755 will use only the instructions in the common subset of both
10756 architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
10757 the \s-1MQ\s0 register. Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
10758 permits \s-1GCC\s0 to use any instruction from either architecture and to
10759 allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
10760 .IP "\fB\-mnew\-mnemonics\fR" 4
10761 .IX Item "-mnew-mnemonics"
10763 .IP "\fB\-mold\-mnemonics\fR" 4
10764 .IX Item "-mold-mnemonics"
10766 Select which mnemonics to use in the generated assembler code. With
10767 \&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
10768 the PowerPC architecture. With \fB\-mold\-mnemonics\fR it uses the
10769 assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions
10770 defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
10771 mnemonic irrespective of which of these options is specified.
10773 \&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
10774 use. Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
10775 value of these option. Unless you are building a cross\-compiler, you
10776 should normally not specify either \fB\-mnew\-mnemonics\fR or
10777 \&\fB\-mold\-mnemonics\fR, but should instead accept the default.
10778 .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
10779 .IX Item "-mcpu=cpu_type"
10780 Set architecture type, register usage, choice of mnemonics, and
10781 instruction scheduling parameters for machine type \fIcpu_type\fR.
10782 Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
10783 \&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB505\fR,
10784 \&\fB601\fR, \fB602\fR, \fB603\fR, \fB603e\fR, \fB604\fR,
10785 \&\fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR, \fB7400\fR,
10786 \&\fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
10787 \&\fB860\fR, \fB970\fR, \fB8540\fR, \fBec603e\fR, \fBG3\fR,
10788 \&\fBG4\fR, \fBG5\fR, \fBpower\fR, \fBpower2\fR, \fBpower3\fR,
10789 \&\fBpower4\fR, \fBpower5\fR, \fBpower5+\fR, \fBpower6\fR,
10790 \&\fBcommon\fR, \fBpowerpc\fR, \fBpowerpc64\fR,
10791 \&\fBrios\fR, \fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64\fR.
10793 \&\fB\-mcpu=common\fR selects a completely generic processor. Code
10794 generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
10795 \&\s-1GCC\s0 will use only the instructions in the common subset of both
10796 architectures, and will not use the \s-1MQ\s0 register. \s-1GCC\s0 assumes a generic
10797 processor model for scheduling purposes.
10799 \&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
10800 \&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
10801 PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
10802 types, with an appropriate, generic processor model assumed for
10803 scheduling purposes.
10805 The other options specify a specific processor. Code generated under
10806 those options will run best on that processor, and may not run at all on
10809 The \fB\-mcpu\fR options automatically enable or disable the
10810 following options: \fB\-maltivec\fR, \fB\-mfprnd\fR,
10811 \&\fB\-mhard\-float\fR, \fB\-mmfcrf\fR, \fB\-mmultiple\fR,
10812 \&\fB\-mnew\-mnemonics\fR, \fB\-mpopcntb\fR, \fB\-mpower\fR,
10813 \&\fB\-mpower2\fR, \fB\-mpowerpc64\fR, \fB\-mpowerpc\-gpopt\fR,
10814 \&\fB\-mpowerpc\-gfxopt\fR, \fB\-mstring\fR, \fB\-mmulhw\fR, \fB\-mdlmzb\fR.
10815 The particular options
10816 set for any particular \s-1CPU\s0 will vary between compiler versions,
10817 depending on what setting seems to produce optimal code for that \s-1CPU\s0;
10818 it doesn't necessarily reflect the actual hardware's capabilities. If
10819 you wish to set an individual option to a particular value, you may
10820 specify it after the \fB\-mcpu\fR option, like \fB\-mcpu=970
10821 \&\-mno\-altivec\fR.
10823 On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
10824 not enabled or disabled by the \fB\-mcpu\fR option at present because
10825 \&\s-1AIX\s0 does not have full support for these options. You may still
10826 enable or disable them individually if you're sure it'll work in your
10828 .IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
10829 .IX Item "-mtune=cpu_type"
10830 Set the instruction scheduling parameters for machine type
10831 \&\fIcpu_type\fR, but do not set the architecture type, register usage, or
10832 choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would. The same
10833 values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
10834 \&\fB\-mcpu\fR. If both are specified, the code generated will use the
10835 architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
10836 scheduling parameters set by \fB\-mtune\fR.
10837 .IP "\fB\-mswdiv\fR" 4
10840 .IP "\fB\-mno\-swdiv\fR" 4
10841 .IX Item "-mno-swdiv"
10843 Generate code to compute division as reciprocal estimate and iterative
10844 refinement, creating opportunities for increased throughput. This
10845 feature requires: optional PowerPC Graphics instruction set for single
10846 precision and \s-1FRE\s0 instruction for double precision, assuming divides
10847 cannot generate user-visible traps, and the domain values not include
10848 Infinities, denormals or zero denominator.
10849 .IP "\fB\-maltivec\fR" 4
10850 .IX Item "-maltivec"
10852 .IP "\fB\-mno\-altivec\fR" 4
10853 .IX Item "-mno-altivec"
10855 Generate code that uses (does not use) AltiVec instructions, and also
10856 enable the use of built-in functions that allow more direct access to
10857 the AltiVec instruction set. You may also need to set
10858 \&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
10860 .IP "\fB\-mvrsave\fR" 4
10861 .IX Item "-mvrsave"
10863 .IP "\fB\-mno\-vrsave\fR" 4
10864 .IX Item "-mno-vrsave"
10866 Generate \s-1VRSAVE\s0 instructions when generating AltiVec code.
10867 .IP "\fB\-msecure\-plt\fR" 4
10868 .IX Item "-msecure-plt"
10869 Generate code that allows ld and ld.so to build executables and shared
10870 libraries with non-exec .plt and .got sections. This is a PowerPC
10871 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
10872 .IP "\fB\-mbss\-plt\fR" 4
10873 .IX Item "-mbss-plt"
10874 Generate code that uses a \s-1BSS\s0 .plt section that ld.so fills in, and
10875 requires .plt and .got sections that are both writable and executable.
10876 This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
10877 .IP "\fB\-misel\fR" 4
10880 .IP "\fB\-mno\-isel\fR" 4
10881 .IX Item "-mno-isel"
10883 This switch enables or disables the generation of \s-1ISEL\s0 instructions.
10884 .IP "\fB\-misel=\fR\fIyes/no\fR" 4
10885 .IX Item "-misel=yes/no"
10886 This switch has been deprecated. Use \fB\-misel\fR and
10887 \&\fB\-mno\-isel\fR instead.
10888 .IP "\fB\-mspe\fR" 4
10891 .IP "\fB\-mno\-spe\fR" 4
10892 .IX Item "-mno-spe"
10894 This switch enables or disables the generation of \s-1SPE\s0 simd
10896 .IP "\fB\-mspe=\fR\fIyes/no\fR" 4
10897 .IX Item "-mspe=yes/no"
10898 This option has been deprecated. Use \fB\-mspe\fR and
10899 \&\fB\-mno\-spe\fR instead.
10900 .IP "\fB\-mfloat\-gprs=\fR\fIyes/single/double/no\fR" 4
10901 .IX Item "-mfloat-gprs=yes/single/double/no"
10903 .IP "\fB\-mfloat\-gprs\fR" 4
10904 .IX Item "-mfloat-gprs"
10906 This switch enables or disables the generation of floating point
10907 operations on the general purpose registers for architectures that
10910 The argument \fIyes\fR or \fIsingle\fR enables the use of
10911 single-precision floating point operations.
10913 The argument \fIdouble\fR enables the use of single and
10914 double-precision floating point operations.
10916 The argument \fIno\fR disables floating point operations on the
10917 general purpose registers.
10919 This option is currently only available on the MPC854x.
10920 .IP "\fB\-m32\fR" 4
10923 .IP "\fB\-m64\fR" 4
10926 Generate code for 32\-bit or 64\-bit environments of Darwin and \s-1SVR4\s0
10927 targets (including GNU/Linux). The 32\-bit environment sets int, long
10928 and pointer to 32 bits and generates code that runs on any PowerPC
10929 variant. The 64\-bit environment sets int to 32 bits and long and
10930 pointer to 64 bits, and generates code for PowerPC64, as for
10931 \&\fB\-mpowerpc64\fR.
10932 .IP "\fB\-mfull\-toc\fR" 4
10933 .IX Item "-mfull-toc"
10935 .IP "\fB\-mno\-fp\-in\-toc\fR" 4
10936 .IX Item "-mno-fp-in-toc"
10937 .IP "\fB\-mno\-sum\-in\-toc\fR" 4
10938 .IX Item "-mno-sum-in-toc"
10939 .IP "\fB\-mminimal\-toc\fR" 4
10940 .IX Item "-mminimal-toc"
10942 Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
10943 every executable file. The \fB\-mfull\-toc\fR option is selected by
10944 default. In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
10945 each unique non-automatic variable reference in your program. \s-1GCC\s0
10946 will also place floating-point constants in the \s-1TOC\s0. However, only
10947 16,384 entries are available in the \s-1TOC\s0.
10949 If you receive a linker error message that saying you have overflowed
10950 the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
10951 with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
10952 \&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
10953 constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
10954 generate code to calculate the sum of an address and a constant at
10955 run-time instead of putting that sum into the \s-1TOC\s0. You may specify one
10956 or both of these options. Each causes \s-1GCC\s0 to produce very slightly
10957 slower and larger code at the expense of conserving \s-1TOC\s0 space.
10959 If you still run out of space in the \s-1TOC\s0 even when you specify both of
10960 these options, specify \fB\-mminimal\-toc\fR instead. This option causes
10961 \&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file. When you specify this
10962 option, \s-1GCC\s0 will produce code that is slower and larger but which
10963 uses extremely little \s-1TOC\s0 space. You may wish to use this option
10964 only on files that contain less frequently executed code.
10965 .IP "\fB\-maix64\fR" 4
10968 .IP "\fB\-maix32\fR" 4
10971 Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
10972 \&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
10973 Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
10974 \&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
10975 implies \fB\-mno\-powerpc64\fR. \s-1GCC\s0 defaults to \fB\-maix32\fR.
10976 .IP "\fB\-mxl\-compat\fR" 4
10977 .IX Item "-mxl-compat"
10979 .IP "\fB\-mno\-xl\-compat\fR" 4
10980 .IX Item "-mno-xl-compat"
10982 Produce code that conforms more closely to \s-1IBM\s0 \s-1XL\s0 compiler semantics
10983 when using AIX-compatible \s-1ABI\s0. Pass floating-point arguments to
10984 prototyped functions beyond the register save area (\s-1RSA\s0) on the stack
10985 in addition to argument FPRs. Do not assume that most significant
10986 double in 128\-bit long double value is properly rounded when comparing
10987 values and converting to double. Use \s-1XL\s0 symbol names for long double
10990 The \s-1AIX\s0 calling convention was extended but not initially documented to
10991 handle an obscure K&R C case of calling a function that takes the
10992 address of its arguments with fewer arguments than declared. \s-1IBM\s0 \s-1XL\s0
10993 compilers access floating point arguments which do not fit in the
10994 \&\s-1RSA\s0 from the stack when a subroutine is compiled without
10995 optimization. Because always storing floating-point arguments on the
10996 stack is inefficient and rarely needed, this option is not enabled by
10997 default and only is necessary when calling subroutines compiled by \s-1IBM\s0
10998 \&\s-1XL\s0 compilers without optimization.
10999 .IP "\fB\-mpe\fR" 4
11001 Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0). Link an
11002 application written to use message passing with special startup code to
11003 enable the application to run. The system must have \s-1PE\s0 installed in the
11004 standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
11005 must be overridden with the \fB\-specs=\fR option to specify the
11006 appropriate directory location. The Parallel Environment does not
11007 support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
11008 option are incompatible.
11009 .IP "\fB\-malign\-natural\fR" 4
11010 .IX Item "-malign-natural"
11012 .IP "\fB\-malign\-power\fR" 4
11013 .IX Item "-malign-power"
11015 On \s-1AIX\s0, 32\-bit Darwin, and 64\-bit PowerPC GNU/Linux, the option
11016 \&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
11017 types, such as floating-point doubles, on their natural size-based boundary.
11018 The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
11019 alignment rules. \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
11021 On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
11023 .IP "\fB\-msoft\-float\fR" 4
11024 .IX Item "-msoft-float"
11026 .IP "\fB\-mhard\-float\fR" 4
11027 .IX Item "-mhard-float"
11029 Generate code that does not use (uses) the floating-point register set.
11030 Software floating point emulation is provided if you use the
11031 \&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
11032 .IP "\fB\-mmultiple\fR" 4
11033 .IX Item "-mmultiple"
11035 .IP "\fB\-mno\-multiple\fR" 4
11036 .IX Item "-mno-multiple"
11038 Generate code that uses (does not use) the load multiple word
11039 instructions and the store multiple word instructions. These
11040 instructions are generated by default on \s-1POWER\s0 systems, and not
11041 generated on PowerPC systems. Do not use \fB\-mmultiple\fR on little
11042 endian PowerPC systems, since those instructions do not work when the
11043 processor is in little endian mode. The exceptions are \s-1PPC740\s0 and
11044 \&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
11045 .IP "\fB\-mstring\fR" 4
11046 .IX Item "-mstring"
11048 .IP "\fB\-mno\-string\fR" 4
11049 .IX Item "-mno-string"
11051 Generate code that uses (does not use) the load string instructions
11052 and the store string word instructions to save multiple registers and
11053 do small block moves. These instructions are generated by default on
11054 \&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use
11055 \&\fB\-mstring\fR on little endian PowerPC systems, since those
11056 instructions do not work when the processor is in little endian mode.
11057 The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
11058 usage in little endian mode.
11059 .IP "\fB\-mupdate\fR" 4
11060 .IX Item "-mupdate"
11062 .IP "\fB\-mno\-update\fR" 4
11063 .IX Item "-mno-update"
11065 Generate code that uses (does not use) the load or store instructions
11066 that update the base register to the address of the calculated memory
11067 location. These instructions are generated by default. If you use
11068 \&\fB\-mno\-update\fR, there is a small window between the time that the
11069 stack pointer is updated and the address of the previous frame is
11070 stored, which means code that walks the stack frame across interrupts or
11071 signals may get corrupted data.
11072 .IP "\fB\-mfused\-madd\fR" 4
11073 .IX Item "-mfused-madd"
11075 .IP "\fB\-mno\-fused\-madd\fR" 4
11076 .IX Item "-mno-fused-madd"
11078 Generate code that uses (does not use) the floating point multiply and
11079 accumulate instructions. These instructions are generated by default if
11080 hardware floating is used.
11081 .IP "\fB\-mmulhw\fR" 4
11084 .IP "\fB\-mno\-mulhw\fR" 4
11085 .IX Item "-mno-mulhw"
11087 Generate code that uses (does not use) the half-word multiply and
11088 multiply-accumulate instructions on the \s-1IBM\s0 405 and 440 processors.
11089 These instructions are generated by default when targetting those
11091 .IP "\fB\-mdlmzb\fR" 4
11094 .IP "\fB\-mno\-dlmzb\fR" 4
11095 .IX Item "-mno-dlmzb"
11097 Generate code that uses (does not use) the string-search \fBdlmzb\fR
11098 instruction on the \s-1IBM\s0 405 and 440 processors. This instruction is
11099 generated by default when targetting those processors.
11100 .IP "\fB\-mno\-bit\-align\fR" 4
11101 .IX Item "-mno-bit-align"
11103 .IP "\fB\-mbit\-align\fR" 4
11104 .IX Item "-mbit-align"
11106 On System V.4 and embedded PowerPC systems do not (do) force structures
11107 and unions that contain bit-fields to be aligned to the base type of the
11110 For example, by default a structure containing nothing but 8
11111 \&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
11112 boundary and have a size of 4 bytes. By using \fB\-mno\-bit\-align\fR,
11113 the structure would be aligned to a 1 byte boundary and be one byte in
11115 .IP "\fB\-mno\-strict\-align\fR" 4
11116 .IX Item "-mno-strict-align"
11118 .IP "\fB\-mstrict\-align\fR" 4
11119 .IX Item "-mstrict-align"
11121 On System V.4 and embedded PowerPC systems do not (do) assume that
11122 unaligned memory references will be handled by the system.
11123 .IP "\fB\-mrelocatable\fR" 4
11124 .IX Item "-mrelocatable"
11126 .IP "\fB\-mno\-relocatable\fR" 4
11127 .IX Item "-mno-relocatable"
11129 On embedded PowerPC systems generate code that allows (does not allow)
11130 the program to be relocated to a different address at runtime. If you
11131 use \fB\-mrelocatable\fR on any module, all objects linked together must
11132 be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
11133 .IP "\fB\-mrelocatable\-lib\fR" 4
11134 .IX Item "-mrelocatable-lib"
11136 .IP "\fB\-mno\-relocatable\-lib\fR" 4
11137 .IX Item "-mno-relocatable-lib"
11139 On embedded PowerPC systems generate code that allows (does not allow)
11140 the program to be relocated to a different address at runtime. Modules
11141 compiled with \fB\-mrelocatable\-lib\fR can be linked with either modules
11142 compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable\-lib\fR or
11143 with modules compiled with the \fB\-mrelocatable\fR options.
11144 .IP "\fB\-mno\-toc\fR" 4
11145 .IX Item "-mno-toc"
11147 .IP "\fB\-mtoc\fR" 4
11150 On System V.4 and embedded PowerPC systems do not (do) assume that
11151 register 2 contains a pointer to a global area pointing to the addresses
11152 used in the program.
11153 .IP "\fB\-mlittle\fR" 4
11154 .IX Item "-mlittle"
11156 .IP "\fB\-mlittle\-endian\fR" 4
11157 .IX Item "-mlittle-endian"
11159 On System V.4 and embedded PowerPC systems compile code for the
11160 processor in little endian mode. The \fB\-mlittle\-endian\fR option is
11161 the same as \fB\-mlittle\fR.
11162 .IP "\fB\-mbig\fR" 4
11165 .IP "\fB\-mbig\-endian\fR" 4
11166 .IX Item "-mbig-endian"
11168 On System V.4 and embedded PowerPC systems compile code for the
11169 processor in big endian mode. The \fB\-mbig\-endian\fR option is
11170 the same as \fB\-mbig\fR.
11171 .IP "\fB\-mdynamic\-no\-pic\fR" 4
11172 .IX Item "-mdynamic-no-pic"
11173 On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
11174 relocatable, but that its external references are relocatable. The
11175 resulting code is suitable for applications, but not shared
11177 .IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
11178 .IX Item "-mprioritize-restricted-insns=priority"
11179 This option controls the priority that is assigned to
11180 dispatch-slot restricted instructions during the second scheduling
11181 pass. The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
11182 \&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
11184 .IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
11185 .IX Item "-msched-costly-dep=dependence_type"
11186 This option controls which dependences are considered costly
11187 by the target during instruction scheduling. The argument
11188 \&\fIdependence_type\fR takes one of the following values:
11189 \&\fIno\fR: no dependence is costly,
11190 \&\fIall\fR: all dependences are costly,
11191 \&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
11192 \&\fIstore_to_load\fR: any dependence from store to load is costly,
11193 \&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
11194 .IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
11195 .IX Item "-minsert-sched-nops=scheme"
11196 This option controls which nop insertion scheme will be used during
11197 the second scheduling pass. The argument \fIscheme\fR takes one of the
11199 \&\fIno\fR: Don't insert nops.
11200 \&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
11201 according to the scheduler's grouping.
11202 \&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
11203 separate groups. Insert exactly as many nops as needed to force an insn
11204 to a new group, according to the estimated processor grouping.
11205 \&\fInumber\fR: Insert nops to force costly dependent insns into
11206 separate groups. Insert \fInumber\fR nops to force an insn to a new group.
11207 .IP "\fB\-mcall\-sysv\fR" 4
11208 .IX Item "-mcall-sysv"
11209 On System V.4 and embedded PowerPC systems compile code using calling
11210 conventions that adheres to the March 1995 draft of the System V
11211 Application Binary Interface, PowerPC processor supplement. This is the
11212 default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
11213 .IP "\fB\-mcall\-sysv\-eabi\fR" 4
11214 .IX Item "-mcall-sysv-eabi"
11215 Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
11216 .IP "\fB\-mcall\-sysv\-noeabi\fR" 4
11217 .IX Item "-mcall-sysv-noeabi"
11218 Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
11219 .IP "\fB\-mcall\-solaris\fR" 4
11220 .IX Item "-mcall-solaris"
11221 On System V.4 and embedded PowerPC systems compile code for the Solaris
11223 .IP "\fB\-mcall\-linux\fR" 4
11224 .IX Item "-mcall-linux"
11225 On System V.4 and embedded PowerPC systems compile code for the
11226 Linux-based \s-1GNU\s0 system.
11227 .IP "\fB\-mcall\-gnu\fR" 4
11228 .IX Item "-mcall-gnu"
11229 On System V.4 and embedded PowerPC systems compile code for the
11230 Hurd-based \s-1GNU\s0 system.
11231 .IP "\fB\-mcall\-netbsd\fR" 4
11232 .IX Item "-mcall-netbsd"
11233 On System V.4 and embedded PowerPC systems compile code for the
11234 NetBSD operating system.
11235 .IP "\fB\-maix\-struct\-return\fR" 4
11236 .IX Item "-maix-struct-return"
11237 Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
11238 .IP "\fB\-msvr4\-struct\-return\fR" 4
11239 .IX Item "-msvr4-struct-return"
11240 Return structures smaller than 8 bytes in registers (as specified by the
11241 \&\s-1SVR4\s0 \s-1ABI\s0).
11242 .IP "\fB\-mabi=\fR\fIabi-type\fR" 4
11243 .IX Item "-mabi=abi-type"
11244 Extend the current \s-1ABI\s0 with a particular extension, or remove such extension.
11245 Valid values are \fIaltivec\fR, \fIno-altivec\fR, \fIspe\fR,
11246 \&\fIno-spe\fR, \fIibmlongdouble\fR, \fIieeelongdouble\fR.
11247 .IP "\fB\-mabi=spe\fR" 4
11248 .IX Item "-mabi=spe"
11249 Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions. This does not change
11250 the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
11252 .IP "\fB\-mabi=no\-spe\fR" 4
11253 .IX Item "-mabi=no-spe"
11254 Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
11255 .IP "\fB\-mabi=ibmlongdouble\fR" 4
11256 .IX Item "-mabi=ibmlongdouble"
11257 Change the current \s-1ABI\s0 to use \s-1IBM\s0 extended precision long double.
11258 This is a PowerPC 32\-bit \s-1SYSV\s0 \s-1ABI\s0 option.
11259 .IP "\fB\-mabi=ieeelongdouble\fR" 4
11260 .IX Item "-mabi=ieeelongdouble"
11261 Change the current \s-1ABI\s0 to use \s-1IEEE\s0 extended precision long double.
11262 This is a PowerPC 32\-bit Linux \s-1ABI\s0 option.
11263 .IP "\fB\-mprototype\fR" 4
11264 .IX Item "-mprototype"
11266 .IP "\fB\-mno\-prototype\fR" 4
11267 .IX Item "-mno-prototype"
11269 On System V.4 and embedded PowerPC systems assume that all calls to
11270 variable argument functions are properly prototyped. Otherwise, the
11271 compiler must insert an instruction before every non prototyped call to
11272 set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
11273 indicate whether floating point values were passed in the floating point
11274 registers in case the function takes a variable arguments. With
11275 \&\fB\-mprototype\fR, only calls to prototyped variable argument functions
11276 will set or clear the bit.
11277 .IP "\fB\-msim\fR" 4
11279 On embedded PowerPC systems, assume that the startup module is called
11280 \&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
11281 \&\fIlibc.a\fR. This is the default for \fBpowerpc\-*\-eabisim\fR.
11283 .IP "\fB\-mmvme\fR" 4
11285 On embedded PowerPC systems, assume that the startup module is called
11286 \&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
11288 .IP "\fB\-mads\fR" 4
11290 On embedded PowerPC systems, assume that the startup module is called
11291 \&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
11293 .IP "\fB\-myellowknife\fR" 4
11294 .IX Item "-myellowknife"
11295 On embedded PowerPC systems, assume that the startup module is called
11296 \&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
11298 .IP "\fB\-mvxworks\fR" 4
11299 .IX Item "-mvxworks"
11300 On System V.4 and embedded PowerPC systems, specify that you are
11301 compiling for a VxWorks system.
11302 .IP "\fB\-mwindiss\fR" 4
11303 .IX Item "-mwindiss"
11304 Specify that you are compiling for the WindISS simulation environment.
11305 .IP "\fB\-memb\fR" 4
11307 On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
11308 header to indicate that \fBeabi\fR extended relocations are used.
11309 .IP "\fB\-meabi\fR" 4
11312 .IP "\fB\-mno\-eabi\fR" 4
11313 .IX Item "-mno-eabi"
11315 On System V.4 and embedded PowerPC systems do (do not) adhere to the
11316 Embedded Applications Binary Interface (eabi) which is a set of
11317 modifications to the System V.4 specifications. Selecting \fB\-meabi\fR
11318 means that the stack is aligned to an 8 byte boundary, a function
11319 \&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
11320 environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
11321 \&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas. Selecting
11322 \&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
11323 do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
11324 \&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
11325 small data area. The \fB\-meabi\fR option is on by default if you
11326 configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
11327 .IP "\fB\-msdata=eabi\fR" 4
11328 .IX Item "-msdata=eabi"
11329 On System V.4 and embedded PowerPC systems, put small initialized
11330 \&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
11331 is pointed to by register \f(CW\*(C`r2\*(C'\fR. Put small initialized
11332 non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
11333 which is pointed to by register \f(CW\*(C`r13\*(C'\fR. Put small uninitialized
11334 global and static data in the \fB.sbss\fR section, which is adjacent to
11335 the \fB.sdata\fR section. The \fB\-msdata=eabi\fR option is
11336 incompatible with the \fB\-mrelocatable\fR option. The
11337 \&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
11338 .IP "\fB\-msdata=sysv\fR" 4
11339 .IX Item "-msdata=sysv"
11340 On System V.4 and embedded PowerPC systems, put small global and static
11341 data in the \fB.sdata\fR section, which is pointed to by register
11342 \&\f(CW\*(C`r13\*(C'\fR. Put small uninitialized global and static data in the
11343 \&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
11344 The \fB\-msdata=sysv\fR option is incompatible with the
11345 \&\fB\-mrelocatable\fR option.
11346 .IP "\fB\-msdata=default\fR" 4
11347 .IX Item "-msdata=default"
11349 .IP "\fB\-msdata\fR" 4
11352 On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
11353 compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
11354 same as \fB\-msdata=sysv\fR.
11355 .IP "\fB\-msdata\-data\fR" 4
11356 .IX Item "-msdata-data"
11357 On System V.4 and embedded PowerPC systems, put small global
11358 data in the \fB.sdata\fR section. Put small uninitialized global
11359 data in the \fB.sbss\fR section. Do not use register \f(CW\*(C`r13\*(C'\fR
11360 to address small data however. This is the default behavior unless
11361 other \fB\-msdata\fR options are used.
11362 .IP "\fB\-msdata=none\fR" 4
11363 .IX Item "-msdata=none"
11365 .IP "\fB\-mno\-sdata\fR" 4
11366 .IX Item "-mno-sdata"
11368 On embedded PowerPC systems, put all initialized global and static data
11369 in the \fB.data\fR section, and all uninitialized data in the
11370 \&\fB.bss\fR section.
11371 .IP "\fB\-G\fR \fInum\fR" 4
11373 On embedded PowerPC systems, put global and static items less than or
11374 equal to \fInum\fR bytes into the small data or bss sections instead of
11375 the normal data or bss section. By default, \fInum\fR is 8. The
11376 \&\fB\-G\fR \fInum\fR switch is also passed to the linker.
11377 All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
11378 .IP "\fB\-mregnames\fR" 4
11379 .IX Item "-mregnames"
11381 .IP "\fB\-mno\-regnames\fR" 4
11382 .IX Item "-mno-regnames"
11384 On System V.4 and embedded PowerPC systems do (do not) emit register
11385 names in the assembly language output using symbolic forms.
11386 .IP "\fB\-mlongcall\fR" 4
11387 .IX Item "-mlongcall"
11389 .IP "\fB\-mno\-longcall\fR" 4
11390 .IX Item "-mno-longcall"
11392 By default assume that all calls are far away so that a longer more
11393 expensive calling sequence is required. This is required for calls
11394 further than 32 megabytes (33,554,432 bytes) from the current location.
11395 A short call will be generated if the compiler knows
11396 the call cannot be that far away. This setting can be overridden by
11397 the \f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma
11398 longcall(0)\*(C'\fR.
11400 Some linkers are capable of detecting out-of-range calls and generating
11401 glue code on the fly. On these systems, long calls are unnecessary and
11402 generate slower code. As of this writing, the \s-1AIX\s0 linker can do this,
11403 as can the \s-1GNU\s0 linker for PowerPC/64. It is planned to add this feature
11404 to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
11406 On Darwin/PPC systems, \f(CW\*(C`#pragma longcall\*(C'\fR will generate \*(L"jbsr
11407 callee, L42\*(R", plus a \*(L"branch island\*(R" (glue code). The two target
11408 addresses represent the callee and the \*(L"branch island\*(R". The
11409 Darwin/PPC linker will prefer the first address and generate a \*(L"bl
11410 callee\*(R" if the \s-1PPC\s0 \*(L"bl\*(R" instruction will reach the callee directly;
11411 otherwise, the linker will generate \*(L"bl L42\*(R" to call the \*(L"branch
11412 island\*(R". The \*(L"branch island\*(R" is appended to the body of the
11413 calling function; it computes the full 32\-bit address of the callee
11416 On Mach-O (Darwin) systems, this option directs the compiler emit to
11417 the glue for every direct call, and the Darwin linker decides whether
11418 to use or discard it.
11420 In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
11421 when the linker is known to generate glue.
11422 .IP "\fB\-pthread\fR" 4
11423 .IX Item "-pthread"
11424 Adds support for multithreading with the \fIpthreads\fR library.
11425 This option sets flags for both the preprocessor and linker.
11427 \fIS/390 and zSeries Options\fR
11428 .IX Subsection "S/390 and zSeries Options"
11430 These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
11431 .IP "\fB\-mhard\-float\fR" 4
11432 .IX Item "-mhard-float"
11434 .IP "\fB\-msoft\-float\fR" 4
11435 .IX Item "-msoft-float"
11437 Use (do not use) the hardware floating-point instructions and registers
11438 for floating-point operations. When \fB\-msoft\-float\fR is specified,
11439 functions in \fIlibgcc.a\fR will be used to perform floating-point
11440 operations. When \fB\-mhard\-float\fR is specified, the compiler
11441 generates \s-1IEEE\s0 floating-point instructions. This is the default.
11442 .IP "\fB\-mlong\-double\-64\fR" 4
11443 .IX Item "-mlong-double-64"
11445 .IP "\fB\-mlong\-double\-128\fR" 4
11446 .IX Item "-mlong-double-128"
11448 These switches control the size of \f(CW\*(C`long double\*(C'\fR type. A size
11449 of 64bit makes the \f(CW\*(C`long double\*(C'\fR type equivalent to the \f(CW\*(C`double\*(C'\fR
11450 type. This is the default.
11451 .IP "\fB\-mbackchain\fR" 4
11452 .IX Item "-mbackchain"
11454 .IP "\fB\-mno\-backchain\fR" 4
11455 .IX Item "-mno-backchain"
11457 Store (do not store) the address of the caller's frame as backchain pointer
11458 into the callee's stack frame.
11459 A backchain may be needed to allow debugging using tools that do not understand
11460 \&\s-1DWARF\-2\s0 call frame information.
11461 When \fB\-mno\-packed\-stack\fR is in effect, the backchain pointer is stored
11462 at the bottom of the stack frame; when \fB\-mpacked\-stack\fR is in effect,
11463 the backchain is placed into the topmost word of the 96/160 byte register
11466 In general, code compiled with \fB\-mbackchain\fR is call-compatible with
11467 code compiled with \fB\-mmo\-backchain\fR; however, use of the backchain
11468 for debugging purposes usually requires that the whole binary is built with
11469 \&\fB\-mbackchain\fR. Note that the combination of \fB\-mbackchain\fR,
11470 \&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
11471 to build a linux kernel use \fB\-msoft\-float\fR.
11473 The default is to not maintain the backchain.
11474 .IP "\fB\-mpacked\-stack\fR" 4
11475 .IX Item "-mpacked-stack"
11477 .IP "\fB\-mno\-packed\-stack\fR" 4
11478 .IX Item "-mno-packed-stack"
11480 Use (do not use) the packed stack layout. When \fB\-mno\-packed\-stack\fR is
11481 specified, the compiler uses the all fields of the 96/160 byte register save
11482 area only for their default purpose; unused fields still take up stack space.
11483 When \fB\-mpacked\-stack\fR is specified, register save slots are densely
11484 packed at the top of the register save area; unused space is reused for other
11485 purposes, allowing for more efficient use of the available stack space.
11486 However, when \fB\-mbackchain\fR is also in effect, the topmost word of
11487 the save area is always used to store the backchain, and the return address
11488 register is always saved two words below the backchain.
11490 As long as the stack frame backchain is not used, code generated with
11491 \&\fB\-mpacked\-stack\fR is call-compatible with code generated with
11492 \&\fB\-mno\-packed\-stack\fR. Note that some non-FSF releases of \s-1GCC\s0 2.95 for
11493 S/390 or zSeries generated code that uses the stack frame backchain at run
11494 time, not just for debugging purposes. Such code is not call-compatible
11495 with code compiled with \fB\-mpacked\-stack\fR. Also, note that the
11496 combination of \fB\-mbackchain\fR,
11497 \&\fB\-mpacked\-stack\fR and \fB\-mhard\-float\fR is not supported. In order
11498 to build a linux kernel use \fB\-msoft\-float\fR.
11500 The default is to not use the packed stack layout.
11501 .IP "\fB\-msmall\-exec\fR" 4
11502 .IX Item "-msmall-exec"
11504 .IP "\fB\-mno\-small\-exec\fR" 4
11505 .IX Item "-mno-small-exec"
11507 Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
11508 to do subroutine calls.
11509 This only works reliably if the total executable size does not
11510 exceed 64k. The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
11511 which does not have this limitation.
11512 .IP "\fB\-m64\fR" 4
11515 .IP "\fB\-m31\fR" 4
11518 When \fB\-m31\fR is specified, generate code compliant to the
11519 GNU/Linux for S/390 \s-1ABI\s0. When \fB\-m64\fR is specified, generate
11520 code compliant to the GNU/Linux for zSeries \s-1ABI\s0. This allows \s-1GCC\s0 in
11521 particular to generate 64\-bit instructions. For the \fBs390\fR
11522 targets, the default is \fB\-m31\fR, while the \fBs390x\fR
11523 targets default to \fB\-m64\fR.
11524 .IP "\fB\-mzarch\fR" 4
11527 .IP "\fB\-mesa\fR" 4
11530 When \fB\-mzarch\fR is specified, generate code using the
11531 instructions available on z/Architecture.
11532 When \fB\-mesa\fR is specified, generate code using the
11533 instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is
11534 not possible with \fB\-m64\fR.
11535 When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
11536 the default is \fB\-mesa\fR. When generating code compliant
11537 to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
11538 .IP "\fB\-mmvcle\fR" 4
11541 .IP "\fB\-mno\-mvcle\fR" 4
11542 .IX Item "-mno-mvcle"
11544 Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
11545 to perform block moves. When \fB\-mno\-mvcle\fR is specified,
11546 use a \f(CW\*(C`mvc\*(C'\fR loop instead. This is the default unless optimizing for
11548 .IP "\fB\-mdebug\fR" 4
11551 .IP "\fB\-mno\-debug\fR" 4
11552 .IX Item "-mno-debug"
11554 Print (or do not print) additional debug information when compiling.
11555 The default is to not print debug information.
11556 .IP "\fB\-march=\fR\fIcpu-type\fR" 4
11557 .IX Item "-march=cpu-type"
11558 Generate code that will run on \fIcpu-type\fR, which is the name of a system
11559 representing a certain processor type. Possible values for
11560 \&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, and \fBz990\fR.
11561 When generating code using the instructions available on z/Architecture,
11562 the default is \fB\-march=z900\fR. Otherwise, the default is
11563 \&\fB\-march=g5\fR.
11564 .IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
11565 .IX Item "-mtune=cpu-type"
11566 Tune to \fIcpu-type\fR everything applicable about the generated code,
11567 except for the \s-1ABI\s0 and the set of available instructions.
11568 The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
11569 The default is the value used for \fB\-march\fR.
11570 .IP "\fB\-mtpf\-trace\fR" 4
11571 .IX Item "-mtpf-trace"
11573 .IP "\fB\-mno\-tpf\-trace\fR" 4
11574 .IX Item "-mno-tpf-trace"
11576 Generate code that adds (does not add) in \s-1TPF\s0 \s-1OS\s0 specific branches to trace
11577 routines in the operating system. This option is off by default, even
11578 when compiling for the \s-1TPF\s0 \s-1OS\s0.
11579 .IP "\fB\-mfused\-madd\fR" 4
11580 .IX Item "-mfused-madd"
11582 .IP "\fB\-mno\-fused\-madd\fR" 4
11583 .IX Item "-mno-fused-madd"
11585 Generate code that uses (does not use) the floating point multiply and
11586 accumulate instructions. These instructions are generated by default if
11587 hardware floating point is used.
11588 .IP "\fB\-mwarn\-framesize=\fR\fIframesize\fR" 4
11589 .IX Item "-mwarn-framesize=framesize"
11590 Emit a warning if the current function exceeds the given frame size. Because
11591 this is a compile time check it doesn't need to be a real problem when the program
11592 runs. It is intended to identify functions which most probably cause
11593 a stack overflow. It is useful to be used in an environment with limited stack
11594 size e.g. the linux kernel.
11595 .IP "\fB\-mwarn\-dynamicstack\fR" 4
11596 .IX Item "-mwarn-dynamicstack"
11597 Emit a warning if the function calls alloca or uses dynamically
11598 sized arrays. This is generally a bad idea with a limited stack size.
11599 .IP "\fB\-mstack\-guard=\fR\fIstack-guard\fR" 4
11600 .IX Item "-mstack-guard=stack-guard"
11602 .IP "\fB\-mstack\-size=\fR\fIstack-size\fR" 4
11603 .IX Item "-mstack-size=stack-size"
11605 These arguments always have to be used in conjunction. If they are present the s390
11606 back end emits additional instructions in the function prologue which trigger a trap
11607 if the stack size is \fIstack-guard\fR bytes above the \fIstack-size\fR
11608 (remember that the stack on s390 grows downward). These options are intended to
11609 be used to help debugging stack overflow problems. The additionally emitted code
11610 causes only little overhead and hence can also be used in production like systems
11611 without greater performance degradation. The given values have to be exact
11612 powers of 2 and \fIstack-size\fR has to be greater than \fIstack-guard\fR without
11614 In order to be efficient the extra code makes the assumption that the stack starts
11615 at an address aligned to the value given by \fIstack-size\fR.
11617 \fIScore Options\fR
11618 .IX Subsection "Score Options"
11620 These options are defined for Score implementations:
11621 .IP "\fB\-meb\fR" 4
11623 Compile code for big endian mode. This is the default.
11624 .IP "\fB\-mel\fR" 4
11626 Compile code for little endian mode.
11627 .IP "\fB\-mnhwloop\fR" 4
11628 .IX Item "-mnhwloop"
11629 Disable generate bcnz instruction.
11630 .IP "\fB\-muls\fR" 4
11632 Enable generate unaligned load and store instruction.
11633 .IP "\fB\-mmac\fR" 4
11635 Enable the use of multiply-accumulate instructions. Disabled by default.
11636 .IP "\fB\-mscore5\fR" 4
11637 .IX Item "-mscore5"
11638 Specify the \s-1SCORE5\s0 as the target architecture.
11639 .IP "\fB\-mscore5u\fR" 4
11640 .IX Item "-mscore5u"
11641 Specify the \s-1SCORE5U\s0 of the target architecture.
11642 .IP "\fB\-mscore7\fR" 4
11643 .IX Item "-mscore7"
11644 Specify the \s-1SCORE7\s0 as the target architecture. This is the default.
11645 .IP "\fB\-mscore7d\fR" 4
11646 .IX Item "-mscore7d"
11647 Specify the \s-1SCORE7D\s0 as the target architecture.
11649 \fI\s-1SH\s0 Options\fR
11650 .IX Subsection "SH Options"
11652 These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
11655 Generate code for the \s-1SH1\s0.
11658 Generate code for the \s-1SH2\s0.
11659 .IP "\fB\-m2e\fR" 4
11661 Generate code for the SH2e.
11664 Generate code for the \s-1SH3\s0.
11665 .IP "\fB\-m3e\fR" 4
11667 Generate code for the SH3e.
11668 .IP "\fB\-m4\-nofpu\fR" 4
11669 .IX Item "-m4-nofpu"
11670 Generate code for the \s-1SH4\s0 without a floating-point unit.
11671 .IP "\fB\-m4\-single\-only\fR" 4
11672 .IX Item "-m4-single-only"
11673 Generate code for the \s-1SH4\s0 with a floating-point unit that only
11674 supports single-precision arithmetic.
11675 .IP "\fB\-m4\-single\fR" 4
11676 .IX Item "-m4-single"
11677 Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
11678 single-precision mode by default.
11681 Generate code for the \s-1SH4\s0.
11682 .IP "\fB\-m4a\-nofpu\fR" 4
11683 .IX Item "-m4a-nofpu"
11684 Generate code for the SH4al\-dsp, or for a SH4a in such a way that the
11685 floating-point unit is not used.
11686 .IP "\fB\-m4a\-single\-only\fR" 4
11687 .IX Item "-m4a-single-only"
11688 Generate code for the SH4a, in such a way that no double-precision
11689 floating point operations are used.
11690 .IP "\fB\-m4a\-single\fR" 4
11691 .IX Item "-m4a-single"
11692 Generate code for the SH4a assuming the floating-point unit is in
11693 single-precision mode by default.
11694 .IP "\fB\-m4a\fR" 4
11696 Generate code for the SH4a.
11697 .IP "\fB\-m4al\fR" 4
11699 Same as \fB\-m4a\-nofpu\fR, except that it implicitly passes
11700 \&\fB\-dsp\fR to the assembler. \s-1GCC\s0 doesn't generate any \s-1DSP\s0
11701 instructions at the moment.
11704 Compile code for the processor in big endian mode.
11707 Compile code for the processor in little endian mode.
11708 .IP "\fB\-mdalign\fR" 4
11709 .IX Item "-mdalign"
11710 Align doubles at 64\-bit boundaries. Note that this changes the calling
11711 conventions, and thus some functions from the standard C library will
11712 not work unless you recompile it first with \fB\-mdalign\fR.
11713 .IP "\fB\-mrelax\fR" 4
11715 Shorten some address references at link time, when possible; uses the
11716 linker option \fB\-relax\fR.
11717 .IP "\fB\-mbigtable\fR" 4
11718 .IX Item "-mbigtable"
11719 Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables. The default is to use
11721 .IP "\fB\-mfmovd\fR" 4
11723 Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.
11724 .IP "\fB\-mhitachi\fR" 4
11725 .IX Item "-mhitachi"
11726 Comply with the calling conventions defined by Renesas.
11727 .IP "\fB\-mrenesas\fR" 4
11728 .IX Item "-mrenesas"
11729 Comply with the calling conventions defined by Renesas.
11730 .IP "\fB\-mno\-renesas\fR" 4
11731 .IX Item "-mno-renesas"
11732 Comply with the calling conventions defined for \s-1GCC\s0 before the Renesas
11733 conventions were available. This option is the default for all
11734 targets of the \s-1SH\s0 toolchain except for \fBsh-symbianelf\fR.
11735 .IP "\fB\-mnomacsave\fR" 4
11736 .IX Item "-mnomacsave"
11737 Mark the \f(CW\*(C`MAC\*(C'\fR register as call\-clobbered, even if
11738 \&\fB\-mhitachi\fR is given.
11739 .IP "\fB\-mieee\fR" 4
11741 Increase IEEE-compliance of floating-point code.
11742 At the moment, this is equivalent to \fB\-fno\-finite\-math\-only\fR.
11743 When generating 16 bit \s-1SH\s0 opcodes, getting IEEE-conforming results for
11744 comparisons of NANs / infinities incurs extra overhead in every
11745 floating point comparison, therefore the default is set to
11746 \&\fB\-ffinite\-math\-only\fR.
11747 .IP "\fB\-misize\fR" 4
11749 Dump instruction size and location in the assembly code.
11750 .IP "\fB\-mpadstruct\fR" 4
11751 .IX Item "-mpadstruct"
11752 This option is deprecated. It pads structures to multiple of 4 bytes,
11753 which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
11754 .IP "\fB\-mspace\fR" 4
11756 Optimize for space instead of speed. Implied by \fB\-Os\fR.
11757 .IP "\fB\-mprefergot\fR" 4
11758 .IX Item "-mprefergot"
11759 When generating position-independent code, emit function calls using
11760 the Global Offset Table instead of the Procedure Linkage Table.
11761 .IP "\fB\-musermode\fR" 4
11762 .IX Item "-musermode"
11763 Generate a library function call to invalidate instruction cache
11764 entries, after fixing up a trampoline. This library function call
11765 doesn't assume it can write to the whole memory address space. This
11766 is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
11767 .IP "\fB\-multcost=\fR\fInumber\fR" 4
11768 .IX Item "-multcost=number"
11769 Set the cost to assume for a multiply insn.
11770 .IP "\fB\-mdiv=\fR\fIstrategy\fR" 4
11771 .IX Item "-mdiv=strategy"
11772 Set the division strategy to use for SHmedia code. \fIstrategy\fR must be
11773 one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
11774 inv:call2, inv:fp .
11775 \&\*(L"fp\*(R" performs the operation in floating point. This has a very high latency,
11776 but needs only a few instructions, so it might be a good choice if
11777 your code has enough easily exploitable \s-1ILP\s0 to allow the compiler to
11778 schedule the floating point instructions together with other instructions.
11779 Division by zero causes a floating point exception.
11780 \&\*(L"inv\*(R" uses integer operations to calculate the inverse of the divisor,
11781 and then multiplies the dividend with the inverse. This strategy allows
11782 cse and hoisting of the inverse calculation. Division by zero calculates
11783 an unspecified result, but does not trap.
11784 \&\*(L"inv:minlat\*(R" is a variant of \*(L"inv\*(R" where if no cse / hoisting opportunities
11785 have been found, or if the entire operation has been hoisted to the same
11786 place, the last stages of the inverse calculation are intertwined with the
11787 final multiply to reduce the overall latency, at the expense of using a few
11788 more instructions, and thus offering fewer scheduling opportunities with
11790 \&\*(L"call\*(R" calls a library function that usually implements the inv:minlat
11792 This gives high code density for m5\-*media\-nofpu compilations.
11793 \&\*(L"call2\*(R" uses a different entry point of the same library function, where it
11794 assumes that a pointer to a lookup table has already been set up, which
11795 exposes the pointer load to cse / code hoisting optimizations.
11796 \&\*(L"inv:call\*(R", \*(L"inv:call2\*(R" and \*(L"inv:fp\*(R" all use the \*(L"inv\*(R" algorithm for initial
11797 code generation, but if the code stays unoptimized, revert to the \*(L"call\*(R",
11798 \&\*(L"call2\*(R", or \*(L"fp\*(R" strategies, respectively. Note that the
11799 potentially-trapping side effect of division by zero is carried by a
11800 separate instruction, so it is possible that all the integer instructions
11801 are hoisted out, but the marker for the side effect stays where it is.
11802 A recombination to fp operations or a call is not possible in that case.
11803 \&\*(L"inv20u\*(R" and \*(L"inv20l\*(R" are variants of the \*(L"inv:minlat\*(R" strategy. In the case
11804 that the inverse calculation was nor separated from the multiply, they speed
11805 up division where the dividend fits into 20 bits (plus sign where applicable),
11806 by inserting a test to skip a number of operations in this case; this test
11807 slows down the case of larger dividends. inv20u assumes the case of a such
11808 a small dividend to be unlikely, and inv20l assumes it to be likely.
11809 .IP "\fB\-mdivsi3_libfunc=\fR\fIname\fR" 4
11810 .IX Item "-mdivsi3_libfunc=name"
11811 Set the name of the library function used for 32 bit signed division to
11812 \&\fIname\fR. This only affect the name used in the call and inv:call
11813 division strategies, and the compiler will still expect the same
11814 sets of input/output/clobbered registers as if this option was not present.
11815 .IP "\fB\-madjust\-unroll\fR" 4
11816 .IX Item "-madjust-unroll"
11817 Throttle unrolling to avoid thrashing target registers.
11818 This option only has an effect if the gcc code base supports the
11819 \&\s-1TARGET_ADJUST_UNROLL_MAX\s0 target hook.
11820 .IP "\fB\-mindexed\-addressing\fR" 4
11821 .IX Item "-mindexed-addressing"
11822 Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
11823 This is only safe if the hardware and/or \s-1OS\s0 implement 32 bit wrap-around
11824 semantics for the indexed addressing mode. The architecture allows the
11825 implementation of processors with 64 bit \s-1MMU\s0, which the \s-1OS\s0 could use to
11826 get 32 bit addressing, but since no current hardware implementation supports
11827 this or any other way to make the indexed addressing mode safe to use in
11828 the 32 bit \s-1ABI\s0, the default is \-mno\-indexed\-addressing.
11829 .IP "\fB\-mgettrcost=\fR\fInumber\fR" 4
11830 .IX Item "-mgettrcost=number"
11831 Set the cost assumed for the gettr instruction to \fInumber\fR.
11832 The default is 2 if \fB\-mpt\-fixed\fR is in effect, 100 otherwise.
11833 .IP "\fB\-mpt\-fixed\fR" 4
11834 .IX Item "-mpt-fixed"
11835 Assume pt* instructions won't trap. This will generally generate better
11836 scheduled code, but is unsafe on current hardware. The current architecture
11837 definition says that ptabs and ptrel trap when the target anded with 3 is 3.
11838 This has the unintentional effect of making it unsafe to schedule ptabs /
11839 ptrel before a branch, or hoist it out of a loop. For example,
11840 _\|_do_global_ctors, a part of libgcc that runs constructors at program
11841 startup, calls functions in a list which is delimited by \-1. With the
11842 \&\-mpt\-fixed option, the ptabs will be done before testing against \-1.
11843 That means that all the constructors will be run a bit quicker, but when
11844 the loop comes to the end of the list, the program crashes because ptabs
11845 loads \-1 into a target register. Since this option is unsafe for any
11846 hardware implementing the current architecture specification, the default
11847 is \-mno\-pt\-fixed. Unless the user specifies a specific cost with
11848 \&\fB\-mgettrcost\fR, \-mno\-pt\-fixed also implies \fB\-mgettrcost=100\fR;
11849 this deters register allocation using target registers for storing
11851 .IP "\fB\-minvalid\-symbols\fR" 4
11852 .IX Item "-minvalid-symbols"
11853 Assume symbols might be invalid. Ordinary function symbols generated by
11854 the compiler will always be valid to load with movi/shori/ptabs or
11855 movi/shori/ptrel, but with assembler and/or linker tricks it is possible
11856 to generate symbols that will cause ptabs / ptrel to trap.
11857 This option is only meaningful when \fB\-mno\-pt\-fixed\fR is in effect.
11858 It will then prevent cross-basic-block cse, hoisting and most scheduling
11859 of symbol loads. The default is \fB\-mno\-invalid\-symbols\fR.
11861 \fI\s-1SPARC\s0 Options\fR
11862 .IX Subsection "SPARC Options"
11864 These \fB\-m\fR options are supported on the \s-1SPARC:\s0
11865 .IP "\fB\-mno\-app\-regs\fR" 4
11866 .IX Item "-mno-app-regs"
11868 .IP "\fB\-mapp\-regs\fR" 4
11869 .IX Item "-mapp-regs"
11871 Specify \fB\-mapp\-regs\fR to generate output using the global registers
11872 2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications. This
11875 To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
11876 specify \fB\-mno\-app\-regs\fR. You should compile libraries and system
11877 software with this option.
11878 .IP "\fB\-mfpu\fR" 4
11881 .IP "\fB\-mhard\-float\fR" 4
11882 .IX Item "-mhard-float"
11884 Generate output containing floating point instructions. This is the
11886 .IP "\fB\-mno\-fpu\fR" 4
11887 .IX Item "-mno-fpu"
11889 .IP "\fB\-msoft\-float\fR" 4
11890 .IX Item "-msoft-float"
11892 Generate output containing library calls for floating point.
11893 \&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
11894 targets. Normally the facilities of the machine's usual C compiler are
11895 used, but this cannot be done directly in cross\-compilation. You must make
11896 your own arrangements to provide suitable library functions for
11897 cross\-compilation. The embedded targets \fBsparc\-*\-aout\fR and
11898 \&\fBsparclite\-*\-*\fR do provide software floating point support.
11900 \&\fB\-msoft\-float\fR changes the calling convention in the output file;
11901 therefore, it is only useful if you compile \fIall\fR of a program with
11902 this option. In particular, you need to compile \fIlibgcc.a\fR, the
11903 library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
11905 .IP "\fB\-mhard\-quad\-float\fR" 4
11906 .IX Item "-mhard-quad-float"
11907 Generate output containing quad-word (long double) floating point
11909 .IP "\fB\-msoft\-quad\-float\fR" 4
11910 .IX Item "-msoft-quad-float"
11911 Generate output containing library calls for quad-word (long double)
11912 floating point instructions. The functions called are those specified
11913 in the \s-1SPARC\s0 \s-1ABI\s0. This is the default.
11915 As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
11916 support for the quad-word floating point instructions. They all invoke
11917 a trap handler for one of these instructions, and then the trap handler
11918 emulates the effect of the instruction. Because of the trap handler overhead,
11919 this is much slower than calling the \s-1ABI\s0 library routines. Thus the
11920 \&\fB\-msoft\-quad\-float\fR option is the default.
11921 .IP "\fB\-mno\-unaligned\-doubles\fR" 4
11922 .IX Item "-mno-unaligned-doubles"
11924 .IP "\fB\-munaligned\-doubles\fR" 4
11925 .IX Item "-munaligned-doubles"
11927 Assume that doubles have 8 byte alignment. This is the default.
11929 With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
11930 alignment only if they are contained in another type, or if they have an
11931 absolute address. Otherwise, it assumes they have 4 byte alignment.
11932 Specifying this option avoids some rare compatibility problems with code
11933 generated by other compilers. It is not the default because it results
11934 in a performance loss, especially for floating point code.
11935 .IP "\fB\-mno\-faster\-structs\fR" 4
11936 .IX Item "-mno-faster-structs"
11938 .IP "\fB\-mfaster\-structs\fR" 4
11939 .IX Item "-mfaster-structs"
11941 With \fB\-mfaster\-structs\fR, the compiler assumes that structures
11942 should have 8 byte alignment. This enables the use of pairs of
11943 \&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
11944 assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
11945 However, the use of this changed alignment directly violates the \s-1SPARC\s0
11946 \&\s-1ABI\s0. Thus, it's intended only for use on targets where the developer
11947 acknowledges that their resulting code will not be directly in line with
11948 the rules of the \s-1ABI\s0.
11949 .IP "\fB\-mimpure\-text\fR" 4
11950 .IX Item "-mimpure-text"
11951 \&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
11952 the compiler to not pass \fB\-z text\fR to the linker when linking a
11953 shared object. Using this option, you can link position-dependent
11954 code into a shared object.
11956 \&\fB\-mimpure\-text\fR suppresses the \*(L"relocations remain against
11957 allocatable but non-writable sections\*(R" linker error message.
11958 However, the necessary relocations will trigger copy\-on\-write, and the
11959 shared object is not actually shared across processes. Instead of
11960 using \fB\-mimpure\-text\fR, you should compile all source code with
11961 \&\fB\-fpic\fR or \fB\-fPIC\fR.
11963 This option is only available on SunOS and Solaris.
11964 .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
11965 .IX Item "-mcpu=cpu_type"
11966 Set the instruction set, register set, and instruction scheduling parameters
11967 for machine type \fIcpu_type\fR. Supported values for \fIcpu_type\fR are
11968 \&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR,
11969 \&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR,
11970 \&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR,
11971 \&\fBultrasparc3\fR, and \fBniagara\fR.
11973 Default instruction scheduling parameters are used for values that select
11974 an architecture and not an implementation. These are \fBv7\fR, \fBv8\fR,
11975 \&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
11977 Here is a list of each supported architecture and their supported
11982 \& v8: supersparc, hypersparc
11983 \& sparclite: f930, f934, sparclite86x
11984 \& sparclet: tsc701
11985 \& v9: ultrasparc, ultrasparc3, niagara
11988 By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
11989 variant of the \s-1SPARC\s0 architecture. With \fB\-mcpu=cypress\fR, the compiler
11990 additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
11991 SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
11992 SPARCStation 1, 2, \s-1IPX\s0 etc.
11994 With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
11995 architecture. The only difference from V7 code is that the compiler emits
11996 the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
11997 but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=supersparc\fR, the compiler additionally
11998 optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
12001 With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
12002 the \s-1SPARC\s0 architecture. This adds the integer multiply, integer divide step
12003 and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
12004 With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
12005 Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0. With
12006 \&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
12007 \&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
12009 With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
12010 the \s-1SPARC\s0 architecture. This adds the integer multiply, multiply/accumulate,
12011 integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
12012 but not in \s-1SPARC\-V7\s0. With \fB\-mcpu=tsc701\fR, the compiler additionally
12013 optimizes it for the \s-1TEMIC\s0 SPARClet chip.
12015 With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
12016 architecture. This adds 64\-bit integer and floating-point move instructions,
12017 3 additional floating-point condition code registers and conditional move
12018 instructions. With \fB\-mcpu=ultrasparc\fR, the compiler additionally
12019 optimizes it for the Sun UltraSPARC I/II/IIi chips. With
12020 \&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
12021 Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
12022 \&\fB\-mcpu=niagara\fR, the compiler additionally optimizes it for
12023 Sun UltraSPARC T1 chips.
12024 .IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
12025 .IX Item "-mtune=cpu_type"
12026 Set the instruction scheduling parameters for machine type
12027 \&\fIcpu_type\fR, but do not set the instruction set or register set that the
12028 option \fB\-mcpu=\fR\fIcpu_type\fR would.
12030 The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
12031 \&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
12032 that select a particular cpu implementation. Those are \fBcypress\fR,
12033 \&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR,
12034 \&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR,
12035 \&\fBultrasparc3\fR, and \fBniagara\fR.
12036 .IP "\fB\-mv8plus\fR" 4
12037 .IX Item "-mv8plus"
12039 .IP "\fB\-mno\-v8plus\fR" 4
12040 .IX Item "-mno-v8plus"
12042 With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0. The
12043 difference from the V8 \s-1ABI\s0 is that the global and out registers are
12044 considered 64\-bit wide. This is enabled by default on Solaris in 32\-bit
12045 mode for all \s-1SPARC\-V9\s0 processors.
12046 .IP "\fB\-mvis\fR" 4
12049 .IP "\fB\-mno\-vis\fR" 4
12050 .IX Item "-mno-vis"
12052 With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
12053 Visual Instruction Set extensions. The default is \fB\-mno\-vis\fR.
12055 These \fB\-m\fR options are supported in addition to the above
12056 on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
12057 .IP "\fB\-mlittle\-endian\fR" 4
12058 .IX Item "-mlittle-endian"
12059 Generate code for a processor running in little-endian mode. It is only
12060 available for a few configurations and most notably not on Solaris and Linux.
12061 .IP "\fB\-m32\fR" 4
12064 .IP "\fB\-m64\fR" 4
12067 Generate code for a 32\-bit or 64\-bit environment.
12068 The 32\-bit environment sets int, long and pointer to 32 bits.
12069 The 64\-bit environment sets int to 32 bits and long and pointer
12071 .IP "\fB\-mcmodel=medlow\fR" 4
12072 .IX Item "-mcmodel=medlow"
12073 Generate code for the Medium/Low code model: 64\-bit addresses, programs
12074 must be linked in the low 32 bits of memory. Programs can be statically
12075 or dynamically linked.
12076 .IP "\fB\-mcmodel=medmid\fR" 4
12077 .IX Item "-mcmodel=medmid"
12078 Generate code for the Medium/Middle code model: 64\-bit addresses, programs
12079 must be linked in the low 44 bits of memory, the text and data segments must
12080 be less than 2GB in size and the data segment must be located within 2GB of
12082 .IP "\fB\-mcmodel=medany\fR" 4
12083 .IX Item "-mcmodel=medany"
12084 Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
12085 may be linked anywhere in memory, the text and data segments must be less
12086 than 2GB in size and the data segment must be located within 2GB of the
12088 .IP "\fB\-mcmodel=embmedany\fR" 4
12089 .IX Item "-mcmodel=embmedany"
12090 Generate code for the Medium/Anywhere code model for embedded systems:
12091 64\-bit addresses, the text and data segments must be less than 2GB in
12092 size, both starting anywhere in memory (determined at link time). The
12093 global register \f(CW%g4\fR points to the base of the data segment. Programs
12094 are statically linked and \s-1PIC\s0 is not supported.
12095 .IP "\fB\-mstack\-bias\fR" 4
12096 .IX Item "-mstack-bias"
12098 .IP "\fB\-mno\-stack\-bias\fR" 4
12099 .IX Item "-mno-stack-bias"
12101 With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
12102 frame pointer if present, are offset by \-2047 which must be added back
12103 when making stack frame references. This is the default in 64\-bit mode.
12104 Otherwise, assume no such offset is present.
12106 These switches are supported in addition to the above on Solaris:
12107 .IP "\fB\-threads\fR" 4
12108 .IX Item "-threads"
12109 Add support for multithreading using the Solaris threads library. This
12110 option sets flags for both the preprocessor and linker. This option does
12111 not affect the thread safety of object code produced by the compiler or
12112 that of libraries supplied with it.
12113 .IP "\fB\-pthreads\fR" 4
12114 .IX Item "-pthreads"
12115 Add support for multithreading using the \s-1POSIX\s0 threads library. This
12116 option sets flags for both the preprocessor and linker. This option does
12117 not affect the thread safety of object code produced by the compiler or
12118 that of libraries supplied with it.
12119 .IP "\fB\-pthread\fR" 4
12120 .IX Item "-pthread"
12121 This is a synonym for \fB\-pthreads\fR.
12123 \fIOptions for System V\fR
12124 .IX Subsection "Options for System V"
12126 These additional options are available on System V Release 4 for
12127 compatibility with other compilers on those systems:
12130 Create a shared object.
12131 It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
12134 Identify the versions of each tool used by the compiler, in a
12135 \&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
12138 Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
12140 .IP "\fB\-YP,\fR\fIdirs\fR" 4
12141 .IX Item "-YP,dirs"
12142 Search the directories \fIdirs\fR, and no others, for libraries
12143 specified with \fB\-l\fR.
12144 .IP "\fB\-Ym,\fR\fIdir\fR" 4
12146 Look in the directory \fIdir\fR to find the M4 preprocessor.
12147 The assembler uses this option.
12149 \fITMS320C3x/C4x Options\fR
12150 .IX Subsection "TMS320C3x/C4x Options"
12152 These \fB\-m\fR options are defined for TMS320C3x/C4x implementations:
12153 .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
12154 .IX Item "-mcpu=cpu_type"
12155 Set the instruction set, register set, and instruction scheduling
12156 parameters for machine type \fIcpu_type\fR. Supported values for
12157 \&\fIcpu_type\fR are \fBc30\fR, \fBc31\fR, \fBc32\fR, \fBc40\fR, and
12158 \&\fBc44\fR. The default is \fBc40\fR to generate code for the
12159 \&\s-1TMS320C40\s0.
12160 .IP "\fB\-mbig\-memory\fR" 4
12161 .IX Item "-mbig-memory"
12163 .IP "\fB\-mbig\fR" 4
12165 .IP "\fB\-msmall\-memory\fR" 4
12166 .IX Item "-msmall-memory"
12167 .IP "\fB\-msmall\fR" 4
12170 Generates code for the big or small memory model. The small memory
12171 model assumed that all data fits into one 64K word page. At run-time
12172 the data page (\s-1DP\s0) register must be set to point to the 64K page
12173 containing the .bss and .data program sections. The big memory model is
12174 the default and requires reloading of the \s-1DP\s0 register for every direct
12176 .IP "\fB\-mbk\fR" 4
12179 .IP "\fB\-mno\-bk\fR" 4
12182 Allow (disallow) allocation of general integer operands into the block
12183 count register \s-1BK\s0.
12184 .IP "\fB\-mdb\fR" 4
12187 .IP "\fB\-mno\-db\fR" 4
12190 Enable (disable) generation of code using decrement and branch,
12191 DBcond(D), instructions. This is enabled by default for the C4x. To be
12192 on the safe side, this is disabled for the C3x, since the maximum
12193 iteration count on the C3x is 2^{23 + 1} (but who iterates loops more than
12194 2^{23} times on the C3x?). Note that \s-1GCC\s0 will try to reverse a loop so
12195 that it can utilize the decrement and branch instruction, but will give
12196 up if there is more than one memory reference in the loop. Thus a loop
12197 where the loop counter is decremented can generate slightly more
12198 efficient code, in cases where the \s-1RPTB\s0 instruction cannot be utilized.
12199 .IP "\fB\-mdp\-isr\-reload\fR" 4
12200 .IX Item "-mdp-isr-reload"
12202 .IP "\fB\-mparanoid\fR" 4
12203 .IX Item "-mparanoid"
12205 Force the \s-1DP\s0 register to be saved on entry to an interrupt service
12206 routine (\s-1ISR\s0), reloaded to point to the data section, and restored on
12207 exit from the \s-1ISR\s0. This should not be required unless someone has
12208 violated the small memory model by modifying the \s-1DP\s0 register, say within
12210 .IP "\fB\-mmpyi\fR" 4
12213 .IP "\fB\-mno\-mpyi\fR" 4
12214 .IX Item "-mno-mpyi"
12216 For the C3x use the 24\-bit \s-1MPYI\s0 instruction for integer multiplies
12217 instead of a library call to guarantee 32\-bit results. Note that if one
12218 of the operands is a constant, then the multiplication will be performed
12219 using shifts and adds. If the \fB\-mmpyi\fR option is not specified for the C3x,
12220 then squaring operations are performed inline instead of a library call.
12221 .IP "\fB\-mfast\-fix\fR" 4
12222 .IX Item "-mfast-fix"
12224 .IP "\fB\-mno\-fast\-fix\fR" 4
12225 .IX Item "-mno-fast-fix"
12227 The C3x/C4x \s-1FIX\s0 instruction to convert a floating point value to an
12228 integer value chooses the nearest integer less than or equal to the
12229 floating point value rather than to the nearest integer. Thus if the
12230 floating point number is negative, the result will be incorrectly
12231 truncated an additional code is necessary to detect and correct this
12232 case. This option can be used to disable generation of the additional
12233 code required to correct the result.
12234 .IP "\fB\-mrptb\fR" 4
12237 .IP "\fB\-mno\-rptb\fR" 4
12238 .IX Item "-mno-rptb"
12240 Enable (disable) generation of repeat block sequences using the \s-1RPTB\s0
12241 instruction for zero overhead looping. The \s-1RPTB\s0 construct is only used
12242 for innermost loops that do not call functions or jump across the loop
12243 boundaries. There is no advantage having nested \s-1RPTB\s0 loops due to the
12244 overhead required to save and restore the \s-1RC\s0, \s-1RS\s0, and \s-1RE\s0 registers.
12245 This is enabled by default with \fB\-O2\fR.
12246 .IP "\fB\-mrpts=\fR\fIcount\fR" 4
12247 .IX Item "-mrpts=count"
12249 .IP "\fB\-mno\-rpts\fR" 4
12250 .IX Item "-mno-rpts"
12252 Enable (disable) the use of the single instruction repeat instruction
12253 \&\s-1RPTS\s0. If a repeat block contains a single instruction, and the loop
12254 count can be guaranteed to be less than the value \fIcount\fR, \s-1GCC\s0 will
12255 emit a \s-1RPTS\s0 instruction instead of a \s-1RPTB\s0. If no value is specified,
12256 then a \s-1RPTS\s0 will be emitted even if the loop count cannot be determined
12257 at compile time. Note that the repeated instruction following \s-1RPTS\s0 does
12258 not have to be reloaded from memory each iteration, thus freeing up the
12259 \&\s-1CPU\s0 buses for operands. However, since interrupts are blocked by this
12260 instruction, it is disabled by default.
12261 .IP "\fB\-mloop\-unsigned\fR" 4
12262 .IX Item "-mloop-unsigned"
12264 .IP "\fB\-mno\-loop\-unsigned\fR" 4
12265 .IX Item "-mno-loop-unsigned"
12267 The maximum iteration count when using \s-1RPTS\s0 and \s-1RPTB\s0 (and \s-1DB\s0 on the C40)
12268 is 2^{31 + 1} since these instructions test if the iteration count is
12269 negative to terminate the loop. If the iteration count is unsigned
12270 there is a possibility than the 2^{31 + 1} maximum iteration count may be
12271 exceeded. This switch allows an unsigned iteration count.
12272 .IP "\fB\-mti\fR" 4
12274 Try to emit an assembler syntax that the \s-1TI\s0 assembler (asm30) is happy
12275 with. This also enforces compatibility with the \s-1API\s0 employed by the \s-1TI\s0
12276 C3x C compiler. For example, long doubles are passed as structures
12277 rather than in floating point registers.
12278 .IP "\fB\-mregparm\fR" 4
12279 .IX Item "-mregparm"
12281 .IP "\fB\-mmemparm\fR" 4
12282 .IX Item "-mmemparm"
12284 Generate code that uses registers (stack) for passing arguments to functions.
12285 By default, arguments are passed in registers where possible rather
12286 than by pushing arguments on to the stack.
12287 .IP "\fB\-mparallel\-insns\fR" 4
12288 .IX Item "-mparallel-insns"
12290 .IP "\fB\-mno\-parallel\-insns\fR" 4
12291 .IX Item "-mno-parallel-insns"
12293 Allow the generation of parallel instructions. This is enabled by
12294 default with \fB\-O2\fR.
12295 .IP "\fB\-mparallel\-mpy\fR" 4
12296 .IX Item "-mparallel-mpy"
12298 .IP "\fB\-mno\-parallel\-mpy\fR" 4
12299 .IX Item "-mno-parallel-mpy"
12301 Allow the generation of MPY||ADD and MPY||SUB parallel instructions,
12302 provided \fB\-mparallel\-insns\fR is also specified. These instructions have
12303 tight register constraints which can pessimize the code generation
12304 of large functions.
12307 .IX Subsection "V850 Options"
12309 These \fB\-m\fR options are defined for V850 implementations:
12310 .IP "\fB\-mlong\-calls\fR" 4
12311 .IX Item "-mlong-calls"
12313 .IP "\fB\-mno\-long\-calls\fR" 4
12314 .IX Item "-mno-long-calls"
12316 Treat all calls as being far away (near). If calls are assumed to be
12317 far away, the compiler will always load the functions address up into a
12318 register, and call indirect through the pointer.
12319 .IP "\fB\-mno\-ep\fR" 4
12322 .IP "\fB\-mep\fR" 4
12325 Do not optimize (do optimize) basic blocks that use the same index
12326 pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
12327 use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions. The \fB\-mep\fR
12328 option is on by default if you optimize.
12329 .IP "\fB\-mno\-prolog\-function\fR" 4
12330 .IX Item "-mno-prolog-function"
12332 .IP "\fB\-mprolog\-function\fR" 4
12333 .IX Item "-mprolog-function"
12335 Do not use (do use) external functions to save and restore registers
12336 at the prologue and epilogue of a function. The external functions
12337 are slower, but use less code space if more than one function saves
12338 the same number of registers. The \fB\-mprolog\-function\fR option
12339 is on by default if you optimize.
12340 .IP "\fB\-mspace\fR" 4
12342 Try to make the code as small as possible. At present, this just turns
12343 on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
12344 .IP "\fB\-mtda=\fR\fIn\fR" 4
12346 Put static or global variables whose size is \fIn\fR bytes or less into
12347 the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to. The tiny data
12348 area can hold up to 256 bytes in total (128 bytes for byte references).
12349 .IP "\fB\-msda=\fR\fIn\fR" 4
12351 Put static or global variables whose size is \fIn\fR bytes or less into
12352 the small data area that register \f(CW\*(C`gp\*(C'\fR points to. The small data
12353 area can hold up to 64 kilobytes.
12354 .IP "\fB\-mzda=\fR\fIn\fR" 4
12356 Put static or global variables whose size is \fIn\fR bytes or less into
12357 the first 32 kilobytes of memory.
12358 .IP "\fB\-mv850\fR" 4
12360 Specify that the target processor is the V850.
12361 .IP "\fB\-mbig\-switch\fR" 4
12362 .IX Item "-mbig-switch"
12363 Generate code suitable for big switch tables. Use this option only if
12364 the assembler/linker complain about out of range branches within a switch
12366 .IP "\fB\-mapp\-regs\fR" 4
12367 .IX Item "-mapp-regs"
12368 This option will cause r2 and r5 to be used in the code generated by
12369 the compiler. This setting is the default.
12370 .IP "\fB\-mno\-app\-regs\fR" 4
12371 .IX Item "-mno-app-regs"
12372 This option will cause r2 and r5 to be treated as fixed registers.
12373 .IP "\fB\-mv850e1\fR" 4
12374 .IX Item "-mv850e1"
12375 Specify that the target processor is the V850E1. The preprocessor
12376 constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
12377 this option is used.
12378 .IP "\fB\-mv850e\fR" 4
12380 Specify that the target processor is the V850E. The preprocessor
12381 constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
12383 If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
12384 are defined then a default target processor will be chosen and the
12385 relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
12387 The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
12388 defined, regardless of which processor variant is the target.
12389 .IP "\fB\-mdisable\-callt\fR" 4
12390 .IX Item "-mdisable-callt"
12391 This option will suppress generation of the \s-1CALLT\s0 instruction for the
12392 v850e and v850e1 flavors of the v850 architecture. The default is
12393 \&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
12395 \fI\s-1VAX\s0 Options\fR
12396 .IX Subsection "VAX Options"
12398 These \fB\-m\fR options are defined for the \s-1VAX:\s0
12399 .IP "\fB\-munix\fR" 4
12401 Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
12402 that the Unix assembler for the \s-1VAX\s0 cannot handle across long
12404 .IP "\fB\-mgnu\fR" 4
12406 Do output those jump instructions, on the assumption that you
12407 will assemble with the \s-1GNU\s0 assembler.
12410 Output code for g\-format floating point numbers instead of d\-format.
12412 \fIx86\-64 Options\fR
12413 .IX Subsection "x86-64 Options"
12415 These are listed under
12417 \fIXstormy16 Options\fR
12418 .IX Subsection "Xstormy16 Options"
12420 These options are defined for Xstormy16:
12421 .IP "\fB\-msim\fR" 4
12423 Choose startup files and linker script suitable for the simulator.
12425 \fIXtensa Options\fR
12426 .IX Subsection "Xtensa Options"
12428 These options are supported for Xtensa targets:
12429 .IP "\fB\-mconst16\fR" 4
12430 .IX Item "-mconst16"
12432 .IP "\fB\-mno\-const16\fR" 4
12433 .IX Item "-mno-const16"
12435 Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
12436 constant values. The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
12437 standard option from Tensilica. When enabled, \f(CW\*(C`CONST16\*(C'\fR
12438 instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
12439 instructions. The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
12440 the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
12441 .IP "\fB\-mfused\-madd\fR" 4
12442 .IX Item "-mfused-madd"
12444 .IP "\fB\-mno\-fused\-madd\fR" 4
12445 .IX Item "-mno-fused-madd"
12447 Enable or disable use of fused multiply/add and multiply/subtract
12448 instructions in the floating-point option. This has no effect if the
12449 floating-point option is not also enabled. Disabling fused multiply/add
12450 and multiply/subtract instructions forces the compiler to use separate
12451 instructions for the multiply and add/subtract operations. This may be
12452 desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
12453 required: the fused multiply add/subtract instructions do not round the
12454 intermediate result, thereby producing results with \fImore\fR bits of
12455 precision than specified by the \s-1IEEE\s0 standard. Disabling fused multiply
12456 add/subtract instructions also ensures that the program output is not
12457 sensitive to the compiler's ability to combine multiply and add/subtract
12459 .IP "\fB\-mtext\-section\-literals\fR" 4
12460 .IX Item "-mtext-section-literals"
12462 .IP "\fB\-mno\-text\-section\-literals\fR" 4
12463 .IX Item "-mno-text-section-literals"
12465 Control the treatment of literal pools. The default is
12466 \&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
12467 section in the output file. This allows the literal pool to be placed
12468 in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
12469 pools from separate object files to remove redundant literals and
12470 improve code size. With \fB\-mtext\-section\-literals\fR, the literals
12471 are interspersed in the text section in order to keep them as close as
12472 possible to their references. This may be necessary for large assembly
12474 .IP "\fB\-mtarget\-align\fR" 4
12475 .IX Item "-mtarget-align"
12477 .IP "\fB\-mno\-target\-align\fR" 4
12478 .IX Item "-mno-target-align"
12480 When this option is enabled, \s-1GCC\s0 instructs the assembler to
12481 automatically align instructions to reduce branch penalties at the
12482 expense of some code density. The assembler attempts to widen density
12483 instructions to align branch targets and the instructions following call
12484 instructions. If there are not enough preceding safe density
12485 instructions to align a target, no widening will be performed. The
12486 default is \fB\-mtarget\-align\fR. These options do not affect the
12487 treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
12488 assembler will always align, either by widening density instructions or
12489 by inserting no-op instructions.
12490 .IP "\fB\-mlongcalls\fR" 4
12491 .IX Item "-mlongcalls"
12493 .IP "\fB\-mno\-longcalls\fR" 4
12494 .IX Item "-mno-longcalls"
12496 When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
12497 direct calls to indirect calls unless it can determine that the target
12498 of a direct call is in the range allowed by the call instruction. This
12499 translation typically occurs for calls to functions in other source
12500 files. Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
12501 instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
12502 The default is \fB\-mno\-longcalls\fR. This option should be used in
12503 programs where the call target can potentially be out of range. This
12504 option is implemented in the assembler, not the compiler, so the
12505 assembly code generated by \s-1GCC\s0 will still show direct call
12506 instructions\-\-\-look at the disassembled object code to see the actual
12507 instructions. Note that the assembler will use an indirect call for
12508 every cross-file call, not just those that really will be out of range.
12510 \fIzSeries Options\fR
12511 .IX Subsection "zSeries Options"
12513 These are listed under
12514 .Sh "Options for Code Generation Conventions"
12515 .IX Subsection "Options for Code Generation Conventions"
12516 These machine-independent options control the interface conventions
12517 used in code generation.
12519 Most of them have both positive and negative forms; the negative form
12520 of \fB\-ffoo\fR would be \fB\-fno\-foo\fR. In the table below, only
12521 one of the forms is listed\-\-\-the one which is not the default. You
12522 can figure out the other form by either removing \fBno\-\fR or adding
12524 .IP "\fB\-fbounds\-check\fR" 4
12525 .IX Item "-fbounds-check"
12526 For front-ends that support it, generate additional code to check that
12527 indices used to access arrays are within the declared range. This is
12528 currently only supported by the Java and Fortran front\-ends, where
12529 this option defaults to true and false respectively.
12530 .IP "\fB\-ftrapv\fR" 4
12532 This option generates traps for signed overflow on addition, subtraction,
12533 multiplication operations.
12534 .IP "\fB\-fwrapv\fR" 4
12536 This option instructs the compiler to assume that signed arithmetic
12537 overflow of addition, subtraction and multiplication wraps around
12538 using twos-complement representation. This flag enables some optimizations
12539 and disables others. This option is enabled by default for the Java
12540 front\-end, as required by the Java language specification.
12541 .IP "\fB\-fexceptions\fR" 4
12542 .IX Item "-fexceptions"
12543 Enable exception handling. Generates extra code needed to propagate
12544 exceptions. For some targets, this implies \s-1GCC\s0 will generate frame
12545 unwind information for all functions, which can produce significant data
12546 size overhead, although it does not affect execution. If you do not
12547 specify this option, \s-1GCC\s0 will enable it by default for languages like
12548 \&\*(C+ which normally require exception handling, and disable it for
12549 languages like C that do not normally require it. However, you may need
12550 to enable this option when compiling C code that needs to interoperate
12551 properly with exception handlers written in \*(C+. You may also wish to
12552 disable this option if you are compiling older \*(C+ programs that don't
12553 use exception handling.
12554 .IP "\fB\-fnon\-call\-exceptions\fR" 4
12555 .IX Item "-fnon-call-exceptions"
12556 Generate code that allows trapping instructions to throw exceptions.
12557 Note that this requires platform-specific runtime support that does
12558 not exist everywhere. Moreover, it only allows \fItrapping\fR
12559 instructions to throw exceptions, i.e. memory references or floating
12560 point instructions. It does not allow exceptions to be thrown from
12561 arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
12562 .IP "\fB\-funwind\-tables\fR" 4
12563 .IX Item "-funwind-tables"
12564 Similar to \fB\-fexceptions\fR, except that it will just generate any needed
12565 static data, but will not affect the generated code in any other way.
12566 You will normally not enable this option; instead, a language processor
12567 that needs this handling would enable it on your behalf.
12568 .IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
12569 .IX Item "-fasynchronous-unwind-tables"
12570 Generate unwind table in dwarf2 format, if supported by target machine. The
12571 table is exact at each instruction boundary, so it can be used for stack
12572 unwinding from asynchronous events (such as debugger or garbage collector).
12573 .IP "\fB\-fpcc\-struct\-return\fR" 4
12574 .IX Item "-fpcc-struct-return"
12575 Return \*(L"short\*(R" \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
12576 longer ones, rather than in registers. This convention is less
12577 efficient, but it has the advantage of allowing intercallability between
12578 GCC-compiled files and files compiled with other compilers, particularly
12579 the Portable C Compiler (pcc).
12581 The precise convention for returning structures in memory depends
12582 on the target configuration macros.
12584 Short structures and unions are those whose size and alignment match
12585 that of some integer type.
12587 \&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
12588 switch is not binary compatible with code compiled with the
12589 \&\fB\-freg\-struct\-return\fR switch.
12590 Use it to conform to a non-default application binary interface.
12591 .IP "\fB\-freg\-struct\-return\fR" 4
12592 .IX Item "-freg-struct-return"
12593 Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
12594 This is more efficient for small structures than
12595 \&\fB\-fpcc\-struct\-return\fR.
12597 If you specify neither \fB\-fpcc\-struct\-return\fR nor
12598 \&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
12599 standard for the target. If there is no standard convention, \s-1GCC\s0
12600 defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
12601 the principal compiler. In those cases, we can choose the standard, and
12602 we chose the more efficient register return alternative.
12604 \&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
12605 switch is not binary compatible with code compiled with the
12606 \&\fB\-fpcc\-struct\-return\fR switch.
12607 Use it to conform to a non-default application binary interface.
12608 .IP "\fB\-fshort\-enums\fR" 4
12609 .IX Item "-fshort-enums"
12610 Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
12611 declared range of possible values. Specifically, the \f(CW\*(C`enum\*(C'\fR type
12612 will be equivalent to the smallest integer type which has enough room.
12614 \&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
12615 code that is not binary compatible with code generated without that switch.
12616 Use it to conform to a non-default application binary interface.
12617 .IP "\fB\-fshort\-double\fR" 4
12618 .IX Item "-fshort-double"
12619 Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
12621 \&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
12622 code that is not binary compatible with code generated without that switch.
12623 Use it to conform to a non-default application binary interface.
12624 .IP "\fB\-fshort\-wchar\fR" 4
12625 .IX Item "-fshort-wchar"
12626 Override the underlying type for \fBwchar_t\fR to be \fBshort
12627 unsigned int\fR instead of the default for the target. This option is
12628 useful for building programs to run under \s-1WINE\s0.
12630 \&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
12631 code that is not binary compatible with code generated without that switch.
12632 Use it to conform to a non-default application binary interface.
12633 .IP "\fB\-fno\-common\fR" 4
12634 .IX Item "-fno-common"
12635 In C, allocate even uninitialized global variables in the data section of the
12636 object file, rather than generating them as common blocks. This has the
12637 effect that if the same variable is declared (without \f(CW\*(C`extern\*(C'\fR) in
12638 two different compilations, you will get an error when you link them.
12639 The only reason this might be useful is if you wish to verify that the
12640 program will work on other systems which always work this way.
12641 .IP "\fB\-fno\-ident\fR" 4
12642 .IX Item "-fno-ident"
12643 Ignore the \fB#ident\fR directive.
12644 .IP "\fB\-finhibit\-size\-directive\fR" 4
12645 .IX Item "-finhibit-size-directive"
12646 Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
12647 would cause trouble if the function is split in the middle, and the
12648 two halves are placed at locations far apart in memory. This option is
12649 used when compiling \fIcrtstuff.c\fR; you should not need to use it
12651 .IP "\fB\-fverbose\-asm\fR" 4
12652 .IX Item "-fverbose-asm"
12653 Put extra commentary information in the generated assembly code to
12654 make it more readable. This option is generally only of use to those
12655 who actually need to read the generated assembly code (perhaps while
12656 debugging the compiler itself).
12658 \&\fB\-fno\-verbose\-asm\fR, the default, causes the
12659 extra information to be omitted and is useful when comparing two assembler
12661 .IP "\fB\-fpic\fR" 4
12663 Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
12664 library, if supported for the target machine. Such code accesses all
12665 constant addresses through a global offset table (\s-1GOT\s0). The dynamic
12666 loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
12667 loader is not part of \s-1GCC\s0; it is part of the operating system). If
12668 the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
12669 maximum size, you get an error message from the linker indicating that
12670 \&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
12671 instead. (These maximums are 8k on the \s-1SPARC\s0 and 32k
12672 on the m68k and \s-1RS/6000\s0. The 386 has no such limit.)
12674 Position-independent code requires special support, and therefore works
12675 only on certain machines. For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
12676 but not for the Sun 386i. Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
12677 position\-independent.
12679 When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
12681 .IP "\fB\-fPIC\fR" 4
12683 If supported for the target machine, emit position-independent code,
12684 suitable for dynamic linking and avoiding any limit on the size of the
12685 global offset table. This option makes a difference on the m68k,
12686 PowerPC and \s-1SPARC\s0.
12688 Position-independent code requires special support, and therefore works
12689 only on certain machines.
12691 When this flag is set, the macros \f(CW\*(C`_\|_pic_\|_\*(C'\fR and \f(CW\*(C`_\|_PIC_\|_\*(C'\fR
12693 .IP "\fB\-fpie\fR" 4
12696 .IP "\fB\-fPIE\fR" 4
12699 These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
12700 generated position independent code can be only linked into executables.
12701 Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
12702 used during linking.
12703 .IP "\fB\-fno\-jump\-tables\fR" 4
12704 .IX Item "-fno-jump-tables"
12705 Do not use jump tables for switch statements even where it would be
12706 more efficient than other code generation strategies. This option is
12707 of use in conjunction with \fB\-fpic\fR or \fB\-fPIC\fR for
12708 building code which forms part of a dynamic linker and cannot
12709 reference the address of a jump table. On some targets, jump tables
12710 do not require a \s-1GOT\s0 and this option is not needed.
12711 .IP "\fB\-ffixed\-\fR\fIreg\fR" 4
12712 .IX Item "-ffixed-reg"
12713 Treat the register named \fIreg\fR as a fixed register; generated code
12714 should never refer to it (except perhaps as a stack pointer, frame
12715 pointer or in some other fixed role).
12717 \&\fIreg\fR must be the name of a register. The register names accepted
12718 are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
12719 macro in the machine description macro file.
12721 This flag does not have a negative form, because it specifies a
12723 .IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
12724 .IX Item "-fcall-used-reg"
12725 Treat the register named \fIreg\fR as an allocable register that is
12726 clobbered by function calls. It may be allocated for temporaries or
12727 variables that do not live across a call. Functions compiled this way
12728 will not save and restore the register \fIreg\fR.
12730 It is an error to used this flag with the frame pointer or stack pointer.
12731 Use of this flag for other registers that have fixed pervasive roles in
12732 the machine's execution model will produce disastrous results.
12734 This flag does not have a negative form, because it specifies a
12736 .IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
12737 .IX Item "-fcall-saved-reg"
12738 Treat the register named \fIreg\fR as an allocable register saved by
12739 functions. It may be allocated even for temporaries or variables that
12740 live across a call. Functions compiled this way will save and restore
12741 the register \fIreg\fR if they use it.
12743 It is an error to used this flag with the frame pointer or stack pointer.
12744 Use of this flag for other registers that have fixed pervasive roles in
12745 the machine's execution model will produce disastrous results.
12747 A different sort of disaster will result from the use of this flag for
12748 a register in which function values may be returned.
12750 This flag does not have a negative form, because it specifies a
12752 .IP "\fB\-fpack\-struct[=\fR\fIn\fR\fB]\fR" 4
12753 .IX Item "-fpack-struct[=n]"
12754 Without a value specified, pack all structure members together without
12755 holes. When a value is specified (which must be a small power of two), pack
12756 structure members according to this value, representing the maximum
12757 alignment (that is, objects with default alignment requirements larger than
12758 this will be output potentially unaligned at the next fitting location.
12760 \&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
12761 code that is not binary compatible with code generated without that switch.
12762 Additionally, it makes the code suboptimal.
12763 Use it to conform to a non-default application binary interface.
12764 .IP "\fB\-finstrument\-functions\fR" 4
12765 .IX Item "-finstrument-functions"
12766 Generate instrumentation calls for entry and exit to functions. Just
12767 after function entry and just before function exit, the following
12768 profiling functions will be called with the address of the current
12769 function and its call site. (On some platforms,
12770 \&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
12771 function, so the call site information may not be available to the
12772 profiling functions otherwise.)
12775 \& void __cyg_profile_func_enter (void *this_fn,
12776 \& void *call_site);
12777 \& void __cyg_profile_func_exit (void *this_fn,
12778 \& void *call_site);
12781 The first argument is the address of the start of the current function,
12782 which may be looked up exactly in the symbol table.
12784 This instrumentation is also done for functions expanded inline in other
12785 functions. The profiling calls will indicate where, conceptually, the
12786 inline function is entered and exited. This means that addressable
12787 versions of such functions must be available. If all your uses of a
12788 function are expanded inline, this may mean an additional expansion of
12789 code size. If you use \fBextern inline\fR in your C code, an
12790 addressable version of such functions must be provided. (This is
12791 normally the case anyways, but if you get lucky and the optimizer always
12792 expands the functions inline, you might have gotten away without
12793 providing static copies.)
12795 A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
12796 which case this instrumentation will not be done. This can be used, for
12797 example, for the profiling functions listed above, high-priority
12798 interrupt routines, and any functions from which the profiling functions
12799 cannot safely be called (perhaps signal handlers, if the profiling
12800 routines generate output or allocate memory).
12801 .IP "\fB\-fstack\-check\fR" 4
12802 .IX Item "-fstack-check"
12803 Generate code to verify that you do not go beyond the boundary of the
12804 stack. You should specify this flag if you are running in an
12805 environment with multiple threads, but only rarely need to specify it in
12806 a single-threaded environment since stack overflow is automatically
12807 detected on nearly all systems if there is only one stack.
12809 Note that this switch does not actually cause checking to be done; the
12810 operating system must do that. The switch causes generation of code
12811 to ensure that the operating system sees the stack being extended.
12812 .IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
12813 .IX Item "-fstack-limit-register=reg"
12815 .IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
12816 .IX Item "-fstack-limit-symbol=sym"
12817 .IP "\fB\-fno\-stack\-limit\fR" 4
12818 .IX Item "-fno-stack-limit"
12820 Generate code to ensure that the stack does not grow beyond a certain value,
12821 either the value of a register or the address of a symbol. If the stack
12822 would grow beyond the value, a signal is raised. For most targets,
12823 the signal is raised before the stack overruns the boundary, so
12824 it is possible to catch the signal without taking special precautions.
12826 For instance, if the stack starts at absolute address \fB0x80000000\fR
12827 and grows downwards, you can use the flags
12828 \&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
12829 \&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
12830 of 128KB. Note that this may only work with the \s-1GNU\s0 linker.
12831 .IP "\fB\-fargument\-alias\fR" 4
12832 .IX Item "-fargument-alias"
12834 .IP "\fB\-fargument\-noalias\fR" 4
12835 .IX Item "-fargument-noalias"
12836 .IP "\fB\-fargument\-noalias\-global\fR" 4
12837 .IX Item "-fargument-noalias-global"
12838 .IP "\fB\-fargument\-noalias\-anything\fR" 4
12839 .IX Item "-fargument-noalias-anything"
12841 Specify the possible relationships among parameters and between
12842 parameters and global data.
12844 \&\fB\-fargument\-alias\fR specifies that arguments (parameters) may
12845 alias each other and may alias global storage.\fB\-fargument\-noalias\fR specifies that arguments do not alias
12846 each other, but may alias global storage.\fB\-fargument\-noalias\-global\fR specifies that arguments do not
12847 alias each other and do not alias global storage.
12848 \&\fB\-fargument\-noalias\-anything\fR specifies that arguments do not
12849 alias any other storage.
12851 Each language will automatically use whatever option is required by
12852 the language standard. You should not need to use these options yourself.
12853 .IP "\fB\-fleading\-underscore\fR" 4
12854 .IX Item "-fleading-underscore"
12855 This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
12856 change the way C symbols are represented in the object file. One use
12857 is to help link with legacy assembly code.
12859 \&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
12860 generate code that is not binary compatible with code generated without that
12861 switch. Use it to conform to a non-default application binary interface.
12862 Not all targets provide complete support for this switch.
12863 .IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
12864 .IX Item "-ftls-model=model"
12865 Alter the thread-local storage model to be used.
12866 The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
12867 \&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
12869 The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
12870 \&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
12871 .IP "\fB\-fvisibility=\fR\fIdefault|internal|hidden|protected\fR" 4
12872 .IX Item "-fvisibility=default|internal|hidden|protected"
12873 Set the default \s-1ELF\s0 image symbol visibility to the specified option\-\-\-all
12874 symbols will be marked with this unless overridden within the code.
12875 Using this feature can very substantially improve linking and
12876 load times of shared object libraries, produce more optimized
12877 code, provide near-perfect \s-1API\s0 export and prevent symbol clashes.
12878 It is \fBstrongly\fR recommended that you use this in any shared objects
12881 Despite the nomenclature, \f(CW\*(C`default\*(C'\fR always means public ie;
12882 available to be linked against from outside the shared object.
12883 \&\f(CW\*(C`protected\*(C'\fR and \f(CW\*(C`internal\*(C'\fR are pretty useless in real-world
12884 usage so the only other commonly used option will be \f(CW\*(C`hidden\*(C'\fR.
12885 The default if \fB\-fvisibility\fR isn't specified is
12886 \&\f(CW\*(C`default\*(C'\fR, i.e., make every
12887 symbol public\-\-\-this causes the same behavior as previous versions of
12890 A good explanation of the benefits offered by ensuring \s-1ELF\s0
12891 symbols have the correct visibility is given by \*(L"How To Write
12892 Shared Libraries\*(R" by Ulrich Drepper (which can be found at
12893 <\fBhttp://people.redhat.com/~drepper/\fR>)\-\-\-however a superior
12894 solution made possible by this option to marking things hidden when
12895 the default is public is to make the default hidden and mark things
12896 public. This is the norm with \s-1DLL\s0's on Windows and with \fB\-fvisibility=hidden\fR
12897 and \f(CW\*(C`_\|_attribute_\|_ ((visibility("default")))\*(C'\fR instead of
12898 \&\f(CW\*(C`_\|_declspec(dllexport)\*(C'\fR you get almost identical semantics with
12899 identical syntax. This is a great boon to those working with
12900 cross-platform projects.
12902 For those adding visibility support to existing code, you may find
12903 \&\fB#pragma \s-1GCC\s0 visibility\fR of use. This works by you enclosing
12904 the declarations you wish to set visibility for with (for example)
12905 \&\fB#pragma \s-1GCC\s0 visibility push(hidden)\fR and
12906 \&\fB#pragma \s-1GCC\s0 visibility pop\fR.
12907 Bear in mind that symbol visibility should be viewed \fBas
12908 part of the \s-1API\s0 interface contract\fR and thus all new code should
12909 always specify visibility when it is not the default ie; declarations
12910 only for use within the local \s-1DSO\s0 should \fBalways\fR be marked explicitly
12911 as hidden as so to avoid \s-1PLT\s0 indirection overheads\-\-\-making this
12912 abundantly clear also aids readability and self-documentation of the code.
12913 Note that due to \s-1ISO\s0 \*(C+ specification requirements, operator new and
12914 operator delete must always be of default visibility.
12916 Be aware that headers from outside your project, in particular system
12917 headers and headers from any other library you use, may not be
12918 expecting to be compiled with visibility other than the default. You
12919 may need to explicitly say \fB#pragma \s-1GCC\s0 visibility push(default)\fR
12920 before including any such headers.
12922 \&\fBextern\fR declarations are not affected by \fB\-fvisibility\fR, so
12923 a lot of code can be recompiled with \fB\-fvisibility=hidden\fR with
12924 no modifications. However, this means that calls to \fBextern\fR
12925 functions with no explicit visibility will use the \s-1PLT\s0, so it is more
12926 effective to use \fB_\|_attribute ((visibility))\fR and/or
12927 \&\fB#pragma \s-1GCC\s0 visibility\fR to tell the compiler which \fBextern\fR
12928 declarations should be treated as hidden.
12930 Note that \fB\-fvisibility\fR does affect \*(C+ vague linkage
12931 entities. This means that, for instance, an exception class that will
12932 be thrown between DSOs must be explicitly marked with default
12933 visibility so that the \fBtype_info\fR nodes will be unified between
12936 An overview of these techniques, their benefits and how to use them
12937 is at <\fBhttp://gcc.gnu.org/wiki/Visibility\fR>.
12939 .IX Header "ENVIRONMENT"
12940 This section describes several environment variables that affect how \s-1GCC\s0
12941 operates. Some of them work by specifying directories or prefixes to use
12942 when searching for various kinds of files. Some are used to specify other
12943 aspects of the compilation environment.
12945 Note that you can also specify places to search using options such as
12946 \&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR. These
12947 take precedence over places specified using environment variables, which
12948 in turn take precedence over those specified by the configuration of \s-1GCC\s0.
12949 .IP "\fB\s-1LANG\s0\fR" 4
12952 .IP "\fB\s-1LC_CTYPE\s0\fR" 4
12953 .IX Item "LC_CTYPE"
12954 .IP "\fB\s-1LC_MESSAGES\s0\fR" 4
12955 .IX Item "LC_MESSAGES"
12956 .IP "\fB\s-1LC_ALL\s0\fR" 4
12959 These environment variables control the way that \s-1GCC\s0 uses
12960 localization information that allow \s-1GCC\s0 to work with different
12961 national conventions. \s-1GCC\s0 inspects the locale categories
12962 \&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
12963 so. These locale categories can be set to any value supported by your
12964 installation. A typical value is \fBen_GB.UTF\-8\fR for English in the United
12965 Kingdom encoded in \s-1UTF\-8\s0.
12967 The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
12968 classification. \s-1GCC\s0 uses it to determine the character boundaries in
12969 a string; this is needed for some multibyte encodings that contain quote
12970 and escape characters that would otherwise be interpreted as a string
12973 The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
12974 use in diagnostic messages.
12976 If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
12977 of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
12978 and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
12979 environment variable. If none of these variables are set, \s-1GCC\s0
12980 defaults to traditional C English behavior.
12981 .IP "\fB\s-1TMPDIR\s0\fR" 4
12983 If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
12984 files. \s-1GCC\s0 uses temporary files to hold the output of one stage of
12985 compilation which is to be used as input to the next stage: for example,
12986 the output of the preprocessor, which is the input to the compiler
12988 .IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
12989 .IX Item "GCC_EXEC_PREFIX"
12990 If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
12991 names of the subprograms executed by the compiler. No slash is added
12992 when this prefix is combined with the name of a subprogram, but you can
12993 specify a prefix that ends with a slash if you wish.
12995 If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
12996 an appropriate prefix to use based on the pathname it was invoked with.
12998 If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
12999 tries looking in the usual places for the subprogram.
13001 The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
13002 \&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the value
13003 of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
13005 Other prefixes specified with \fB\-B\fR take precedence over this prefix.
13007 This prefix is also used for finding files such as \fIcrt0.o\fR that are
13010 In addition, the prefix is used in an unusual way in finding the
13011 directories to search for header files. For each of the standard
13012 directories whose name normally begins with \fB/usr/local/lib/gcc\fR
13013 (more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
13014 replacing that beginning with the specified prefix to produce an
13015 alternate directory name. Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
13016 \&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
13017 These alternate directories are searched first; the standard directories
13019 .IP "\fB\s-1COMPILER_PATH\s0\fR" 4
13020 .IX Item "COMPILER_PATH"
13021 The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
13022 directories, much like \fB\s-1PATH\s0\fR. \s-1GCC\s0 tries the directories thus
13023 specified when searching for subprograms, if it can't find the
13024 subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
13025 .IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
13026 .IX Item "LIBRARY_PATH"
13027 The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
13028 directories, much like \fB\s-1PATH\s0\fR. When configured as a native compiler,
13029 \&\s-1GCC\s0 tries the directories thus specified when searching for special
13030 linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR. Linking
13031 using \s-1GCC\s0 also uses these directories when searching for ordinary
13032 libraries for the \fB\-l\fR option (but directories specified with
13033 \&\fB\-L\fR come first).
13034 .IP "\fB\s-1LANG\s0\fR" 4
13036 This variable is used to pass locale information to the compiler. One way in
13037 which this information is used is to determine the character set to be used
13038 when character literals, string literals and comments are parsed in C and \*(C+.
13039 When the compiler is configured to allow multibyte characters,
13040 the following values for \fB\s-1LANG\s0\fR are recognized:
13042 .IP "\fBC\-JIS\fR" 4
13044 Recognize \s-1JIS\s0 characters.
13045 .IP "\fBC\-SJIS\fR" 4
13047 Recognize \s-1SJIS\s0 characters.
13048 .IP "\fBC\-EUCJP\fR" 4
13050 Recognize \s-1EUCJP\s0 characters.
13054 If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
13055 compiler will use mblen and mbtowc as defined by the default locale to
13056 recognize and translate multibyte characters.
13059 Some additional environments variables affect the behavior of the
13061 .IP "\fB\s-1CPATH\s0\fR" 4
13064 .IP "\fBC_INCLUDE_PATH\fR" 4
13065 .IX Item "C_INCLUDE_PATH"
13066 .IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
13067 .IX Item "CPLUS_INCLUDE_PATH"
13068 .IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
13069 .IX Item "OBJC_INCLUDE_PATH"
13071 Each variable's value is a list of directories separated by a special
13072 character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
13073 The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
13074 determined at \s-1GCC\s0 build time. For Microsoft Windows-based targets it is a
13075 semicolon, and for almost all other targets it is a colon.
13077 \&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
13078 specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
13079 options on the command line. This environment variable is used
13080 regardless of which language is being preprocessed.
13082 The remaining environment variables apply only when preprocessing the
13083 particular language indicated. Each specifies a list of directories
13084 to be searched as if specified with \fB\-isystem\fR, but after any
13085 paths given with \fB\-isystem\fR options on the command line.
13087 In all these variables, an empty element instructs the compiler to
13088 search its current working directory. Empty elements can appear at the
13089 beginning or end of a path. For instance, if the value of
13090 \&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
13091 effect as \fB\-I.\ \-I/special/include\fR.
13092 .IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
13093 .IX Item "DEPENDENCIES_OUTPUT"
13094 If this variable is set, its value specifies how to output
13095 dependencies for Make based on the non-system header files processed
13096 by the compiler. System header files are ignored in the dependency
13099 The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
13100 which case the Make rules are written to that file, guessing the target
13101 name from the source file name. Or the value can have the form
13102 \&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
13103 file \fIfile\fR using \fItarget\fR as the target name.
13105 In other words, this environment variable is equivalent to combining
13106 the options \fB\-MM\fR and \fB\-MF\fR,
13107 with an optional \fB\-MT\fR switch too.
13108 .IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
13109 .IX Item "SUNPRO_DEPENDENCIES"
13110 This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
13111 except that system header files are not ignored, so it implies
13112 \&\fB\-M\fR rather than \fB\-MM\fR. However, the dependence on the
13113 main input file is omitted.
13116 For instructions on reporting bugs, see
13117 <\fBhttp://gcc.gnu.org/bugs.html\fR>.
13119 .IX Header "FOOTNOTES"
13121 On some systems, \fBgcc \-shared\fR
13122 needs to build supplementary stub code for constructors to work. On
13123 multi-libbed systems, \fBgcc \-shared\fR must select the correct support
13124 libraries to link against. Failing to supply the correct flags may lead
13125 to subtle defects. Supplying them in cases where they are not necessary
13128 .IX Header "SEE ALSO"
13129 \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
13130 \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
13131 and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIas\fR,
13132 \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
13134 .IX Header "AUTHOR"
13135 See the Info entry for \fBgcc\fR, or
13136 <\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
13137 for contributors to \s-1GCC\s0.
13139 .IX Header "COPYRIGHT"
13140 Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
13141 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
13143 Permission is granted to copy, distribute and/or modify this document
13144 under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
13145 any later version published by the Free Software Foundation; with the
13146 Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
13147 Free Software\*(R", the Front-Cover texts being (a) (see below), and with
13148 the Back-Cover Texts being (b) (see below). A copy of the license is
13149 included in the \fIgfdl\fR\|(7) man page.
13151 (a) The \s-1FSF\s0's Front-Cover Text is:
13157 (b) The \s-1FSF\s0's Back-Cover Text is:
13160 \& You have freedom to copy and modify this GNU Manual, like GNU
13161 \& software. Copies published by the Free Software Foundation raise
13162 \& funds for GNU development.