2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
4 * Copyright (C) 2004-2007 Texas Instruments
5 * Copyright (C) 2008 Nokia Corporation
6 * Contact: Felipe Balbi <felipe.balbi@nokia.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * - HS USB ULPI mode works.
24 * - 3-pin mode support may be added in future.
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/interrupt.h>
30 #include <linux/platform_device.h>
31 #include <linux/spinlock.h>
32 #include <linux/workqueue.h>
34 #include <linux/delay.h>
35 #include <linux/usb/otg.h>
36 #include <linux/usb/ulpi.h>
37 #include <linux/i2c/twl.h>
38 #include <linux/regulator/consumer.h>
39 #include <linux/err.h>
40 #include <linux/notifier.h>
41 #include <linux/slab.h>
43 /* Register defines */
45 #define MCPC_CTRL 0x30
46 #define MCPC_CTRL_RTSOL (1 << 7)
47 #define MCPC_CTRL_EXTSWR (1 << 6)
48 #define MCPC_CTRL_EXTSWC (1 << 5)
49 #define MCPC_CTRL_VOICESW (1 << 4)
50 #define MCPC_CTRL_OUT64K (1 << 3)
51 #define MCPC_CTRL_RTSCTSSW (1 << 2)
52 #define MCPC_CTRL_HS_UART (1 << 0)
54 #define MCPC_IO_CTRL 0x33
55 #define MCPC_IO_CTRL_MICBIASEN (1 << 5)
56 #define MCPC_IO_CTRL_CTS_NPU (1 << 4)
57 #define MCPC_IO_CTRL_RXD_PU (1 << 3)
58 #define MCPC_IO_CTRL_TXDTYP (1 << 2)
59 #define MCPC_IO_CTRL_CTSTYP (1 << 1)
60 #define MCPC_IO_CTRL_RTSTYP (1 << 0)
62 #define MCPC_CTRL2 0x36
63 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
65 #define OTHER_FUNC_CTRL 0x80
66 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
67 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
69 #define OTHER_IFC_CTRL 0x83
70 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
71 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
72 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
73 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
74 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
75 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
77 #define OTHER_INT_EN_RISE 0x86
78 #define OTHER_INT_EN_FALL 0x89
79 #define OTHER_INT_STS 0x8C
80 #define OTHER_INT_LATCH 0x8D
81 #define OTHER_INT_VB_SESS_VLD (1 << 7)
82 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
83 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
84 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
85 #define OTHER_INT_MANU (1 << 1)
86 #define OTHER_INT_ABNORMAL_STRESS (1 << 0)
88 #define ID_STATUS 0x96
89 #define ID_RES_FLOAT (1 << 4)
90 #define ID_RES_440K (1 << 3)
91 #define ID_RES_200K (1 << 2)
92 #define ID_RES_102K (1 << 1)
93 #define ID_RES_GND (1 << 0)
95 #define POWER_CTRL 0xAC
96 #define POWER_CTRL_OTG_ENAB (1 << 5)
98 #define OTHER_IFC_CTRL2 0xAF
99 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
100 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
101 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
102 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
103 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
104 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
106 #define REG_CTRL_EN 0xB2
107 #define REG_CTRL_ERROR 0xB5
108 #define ULPI_I2C_CONFLICT_INTEN (1 << 0)
110 #define OTHER_FUNC_CTRL2 0xB8
111 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
113 /* following registers do not have separate _clr and _set registers */
114 #define VBUS_DEBOUNCE 0xC0
115 #define ID_DEBOUNCE 0xC1
116 #define VBAT_TIMER 0xD3
117 #define PHY_PWR_CTRL 0xFD
118 #define PHY_PWR_PHYPWD (1 << 0)
119 #define PHY_CLK_CTRL 0xFE
120 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
121 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
122 #define REQ_PHY_DPLL_CLK (1 << 0)
123 #define PHY_CLK_CTRL_STS 0xFF
124 #define PHY_DPLL_CLK (1 << 0)
126 /* In module TWL4030_MODULE_PM_MASTER */
127 #define PROTECT_KEY 0x0E
128 #define STS_HW_CONDITIONS 0x0F
130 /* In module TWL4030_MODULE_PM_RECEIVER */
131 #define VUSB_DEDICATED1 0x7D
132 #define VUSB_DEDICATED2 0x7E
133 #define VUSB1V5_DEV_GRP 0x71
134 #define VUSB1V5_TYPE 0x72
135 #define VUSB1V5_REMAP 0x73
136 #define VUSB1V8_DEV_GRP 0x74
137 #define VUSB1V8_TYPE 0x75
138 #define VUSB1V8_REMAP 0x76
139 #define VUSB3V1_DEV_GRP 0x77
140 #define VUSB3V1_TYPE 0x78
141 #define VUSB3V1_REMAP 0x79
143 /* In module TWL4030_MODULE_INTBR */
145 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
148 struct otg_transceiver otg
;
151 /* TWL4030 internal USB regulator supplies */
152 struct regulator
*usb1v5
;
153 struct regulator
*usb1v8
;
154 struct regulator
*usb3v1
;
156 /* for vbus reporting with irqs disabled */
159 /* pin configuration */
160 enum twl4030_usb_mode usb_mode
;
168 /* internal define on top of container_of */
169 #define xceiv_to_twl(x) container_of((x), struct twl4030_usb, otg);
171 /*-------------------------------------------------------------------------*/
173 static int twl4030_i2c_write_u8_verify(struct twl4030_usb
*twl
,
174 u8 module
, u8 data
, u8 address
)
178 if ((twl_i2c_write_u8(module
, data
, address
) >= 0) &&
179 (twl_i2c_read_u8(module
, &check
, address
) >= 0) &&
182 dev_dbg(twl
->dev
, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
183 1, module
, address
, check
, data
);
185 /* Failed once: Try again */
186 if ((twl_i2c_write_u8(module
, data
, address
) >= 0) &&
187 (twl_i2c_read_u8(module
, &check
, address
) >= 0) &&
190 dev_dbg(twl
->dev
, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
191 2, module
, address
, check
, data
);
193 /* Failed again: Return error */
197 #define twl4030_usb_write_verify(twl, address, data) \
198 twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
200 static inline int twl4030_usb_write(struct twl4030_usb
*twl
,
205 ret
= twl_i2c_write_u8(TWL4030_MODULE_USB
, data
, address
);
208 "TWL4030:USB:Write[0x%x] Error %d\n", address
, ret
);
212 static inline int twl4030_readb(struct twl4030_usb
*twl
, u8 module
, u8 address
)
217 ret
= twl_i2c_read_u8(module
, &data
, address
);
222 "TWL4030:readb[0x%x,0x%x] Error %d\n",
223 module
, address
, ret
);
228 static inline int twl4030_usb_read(struct twl4030_usb
*twl
, u8 address
)
230 return twl4030_readb(twl
, TWL4030_MODULE_USB
, address
);
233 /*-------------------------------------------------------------------------*/
236 twl4030_usb_set_bits(struct twl4030_usb
*twl
, u8 reg
, u8 bits
)
238 return twl4030_usb_write(twl
, ULPI_SET(reg
), bits
);
242 twl4030_usb_clear_bits(struct twl4030_usb
*twl
, u8 reg
, u8 bits
)
244 return twl4030_usb_write(twl
, ULPI_CLR(reg
), bits
);
247 /*-------------------------------------------------------------------------*/
249 static enum usb_xceiv_events
twl4030_usb_linkstat(struct twl4030_usb
*twl
)
252 int linkstat
= USB_EVENT_NONE
;
255 * For ID/VBUS sensing, see manual section 15.4.8 ...
256 * except when using only battery backup power, two
257 * comparators produce VBUS_PRES and ID_PRES signals,
258 * which don't match docs elsewhere. But ... BIT(7)
259 * and BIT(2) of STS_HW_CONDITIONS, respectively, do
260 * seem to match up. If either is true the USB_PRES
261 * signal is active, the OTG module is activated, and
262 * its interrupt may be raised (may wake the system).
264 status
= twl4030_readb(twl
, TWL4030_MODULE_PM_MASTER
,
267 dev_err(twl
->dev
, "USB link status err %d\n", status
);
268 else if (status
& (BIT(7) | BIT(2))) {
270 linkstat
= USB_EVENT_ID
;
272 linkstat
= USB_EVENT_VBUS
;
274 linkstat
= USB_EVENT_NONE
;
276 dev_dbg(twl
->dev
, "HW_CONDITIONS 0x%02x/%d; link %d\n",
277 status
, status
, linkstat
);
279 /* REVISIT this assumes host and peripheral controllers
280 * are registered, and that both are active...
283 spin_lock_irq(&twl
->lock
);
284 twl
->linkstat
= linkstat
;
285 if (linkstat
== USB_EVENT_ID
) {
286 twl
->otg
.default_a
= true;
287 twl
->otg
.state
= OTG_STATE_A_IDLE
;
289 twl
->otg
.default_a
= false;
290 twl
->otg
.state
= OTG_STATE_B_IDLE
;
292 spin_unlock_irq(&twl
->lock
);
297 static void twl4030_usb_set_mode(struct twl4030_usb
*twl
, int mode
)
299 twl
->usb_mode
= mode
;
302 case T2_USB_MODE_ULPI
:
303 twl4030_usb_clear_bits(twl
, ULPI_IFC_CTRL
,
304 ULPI_IFC_CTRL_CARKITMODE
);
305 twl4030_usb_set_bits(twl
, POWER_CTRL
, POWER_CTRL_OTG_ENAB
);
306 twl4030_usb_clear_bits(twl
, ULPI_FUNC_CTRL
,
307 ULPI_FUNC_CTRL_XCVRSEL_MASK
|
308 ULPI_FUNC_CTRL_OPMODE_MASK
);
313 dev_err(twl
->dev
, "unsupported T2 transceiver mode %d\n",
319 static void twl4030_i2c_access(struct twl4030_usb
*twl
, int on
)
321 unsigned long timeout
;
322 int val
= twl4030_usb_read(twl
, PHY_CLK_CTRL
);
326 /* enable DPLL to access PHY registers over I2C */
327 val
|= REQ_PHY_DPLL_CLK
;
328 WARN_ON(twl4030_usb_write_verify(twl
, PHY_CLK_CTRL
,
331 timeout
= jiffies
+ HZ
;
332 while (!(twl4030_usb_read(twl
, PHY_CLK_CTRL_STS
) &
334 && time_before(jiffies
, timeout
))
336 if (!(twl4030_usb_read(twl
, PHY_CLK_CTRL_STS
) &
338 dev_err(twl
->dev
, "Timeout setting T2 HSUSB "
341 /* let ULPI control the DPLL clock */
342 val
&= ~REQ_PHY_DPLL_CLK
;
343 WARN_ON(twl4030_usb_write_verify(twl
, PHY_CLK_CTRL
,
349 static void __twl4030_phy_power(struct twl4030_usb
*twl
, int on
)
351 u8 pwr
= twl4030_usb_read(twl
, PHY_PWR_CTRL
);
354 pwr
&= ~PHY_PWR_PHYPWD
;
356 pwr
|= PHY_PWR_PHYPWD
;
358 WARN_ON(twl4030_usb_write_verify(twl
, PHY_PWR_CTRL
, pwr
) < 0);
361 static void twl4030_phy_power(struct twl4030_usb
*twl
, int on
)
364 regulator_enable(twl
->usb3v1
);
365 regulator_enable(twl
->usb1v8
);
366 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0,
368 regulator_enable(twl
->usb1v5
);
369 __twl4030_phy_power(twl
, 1);
370 twl4030_usb_write(twl
, PHY_CLK_CTRL
,
371 twl4030_usb_read(twl
, PHY_CLK_CTRL
) |
372 (PHY_CLK_CTRL_CLOCKGATING_EN
|
373 PHY_CLK_CTRL_CLK32K_EN
));
375 __twl4030_phy_power(twl
, 0);
376 regulator_disable(twl
->usb1v5
);
377 regulator_disable(twl
->usb1v8
);
378 regulator_disable(twl
->usb3v1
);
382 static void twl4030_phy_suspend(struct twl4030_usb
*twl
, int controller_off
)
387 twl4030_phy_power(twl
, 0);
389 dev_dbg(twl
->dev
, "%s\n", __func__
);
392 static void __twl4030_phy_resume(struct twl4030_usb
*twl
)
394 twl4030_phy_power(twl
, 1);
395 twl4030_i2c_access(twl
, 1);
396 twl4030_usb_set_mode(twl
, twl
->usb_mode
);
397 if (twl
->usb_mode
== T2_USB_MODE_ULPI
)
398 twl4030_i2c_access(twl
, 0);
401 static void twl4030_phy_resume(struct twl4030_usb
*twl
)
405 __twl4030_phy_resume(twl
);
407 dev_dbg(twl
->dev
, "%s\n", __func__
);
410 static int twl4030_usb_ldo_init(struct twl4030_usb
*twl
)
412 /* Enable writing to power configuration registers */
413 twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER
, 0xC0, PROTECT_KEY
);
414 twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER
, 0x0C, PROTECT_KEY
);
416 /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
417 /*twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
419 /* input to VUSB3V1 LDO is from VBAT, not VBUS */
420 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0x14, VUSB_DEDICATED1
);
422 /* Initialize 3.1V regulator */
423 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB3V1_DEV_GRP
);
425 twl
->usb3v1
= regulator_get(twl
->dev
, "usb3v1");
426 if (IS_ERR(twl
->usb3v1
))
429 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB3V1_TYPE
);
431 /* Initialize 1.5V regulator */
432 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB1V5_DEV_GRP
);
434 twl
->usb1v5
= regulator_get(twl
->dev
, "usb1v5");
435 if (IS_ERR(twl
->usb1v5
))
438 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB1V5_TYPE
);
440 /* Initialize 1.8V regulator */
441 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB1V8_DEV_GRP
);
443 twl
->usb1v8
= regulator_get(twl
->dev
, "usb1v8");
444 if (IS_ERR(twl
->usb1v8
))
447 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB1V8_TYPE
);
449 /* disable access to power configuration registers */
450 twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER
, 0, PROTECT_KEY
);
455 regulator_put(twl
->usb1v5
);
458 regulator_put(twl
->usb3v1
);
463 static ssize_t
twl4030_usb_vbus_show(struct device
*dev
,
464 struct device_attribute
*attr
, char *buf
)
466 struct twl4030_usb
*twl
= dev_get_drvdata(dev
);
470 spin_lock_irqsave(&twl
->lock
, flags
);
471 ret
= sprintf(buf
, "%s\n",
472 (twl
->linkstat
== USB_EVENT_VBUS
) ? "on" : "off");
473 spin_unlock_irqrestore(&twl
->lock
, flags
);
477 static DEVICE_ATTR(vbus
, 0444, twl4030_usb_vbus_show
, NULL
);
479 static irqreturn_t
twl4030_usb_irq(int irq
, void *_twl
)
481 struct twl4030_usb
*twl
= _twl
;
484 status
= twl4030_usb_linkstat(twl
);
486 if (status
== USB_EVENT_NONE
)
487 twl4030_phy_suspend(twl
, 0);
489 twl4030_phy_resume(twl
);
491 blocking_notifier_call_chain(&twl
->otg
.notifier
, status
,
494 sysfs_notify(&twl
->dev
->kobj
, NULL
, "vbus");
499 static void twl4030_usb_phy_init(struct twl4030_usb
*twl
)
503 status
= twl4030_usb_linkstat(twl
);
505 if (status
== USB_EVENT_NONE
) {
506 __twl4030_phy_power(twl
, 0);
509 __twl4030_phy_resume(twl
);
513 blocking_notifier_call_chain(&twl
->otg
.notifier
, status
,
516 sysfs_notify(&twl
->dev
->kobj
, NULL
, "vbus");
519 static int twl4030_set_suspend(struct otg_transceiver
*x
, int suspend
)
521 struct twl4030_usb
*twl
= xceiv_to_twl(x
);
524 twl4030_phy_suspend(twl
, 1);
526 twl4030_phy_resume(twl
);
531 static int twl4030_set_peripheral(struct otg_transceiver
*x
,
532 struct usb_gadget
*gadget
)
534 struct twl4030_usb
*twl
;
539 twl
= xceiv_to_twl(x
);
540 twl
->otg
.gadget
= gadget
;
542 twl
->otg
.state
= OTG_STATE_UNDEFINED
;
547 static int twl4030_set_host(struct otg_transceiver
*x
, struct usb_bus
*host
)
549 struct twl4030_usb
*twl
;
554 twl
= xceiv_to_twl(x
);
555 twl
->otg
.host
= host
;
557 twl
->otg
.state
= OTG_STATE_UNDEFINED
;
562 static int __devinit
twl4030_usb_probe(struct platform_device
*pdev
)
564 struct twl4030_usb_data
*pdata
= pdev
->dev
.platform_data
;
565 struct twl4030_usb
*twl
;
569 dev_dbg(&pdev
->dev
, "platform_data not available\n");
573 twl
= kzalloc(sizeof *twl
, GFP_KERNEL
);
577 twl
->dev
= &pdev
->dev
;
578 twl
->irq
= platform_get_irq(pdev
, 0);
579 twl
->otg
.dev
= twl
->dev
;
580 twl
->otg
.label
= "twl4030";
581 twl
->otg
.set_host
= twl4030_set_host
;
582 twl
->otg
.set_peripheral
= twl4030_set_peripheral
;
583 twl
->otg
.set_suspend
= twl4030_set_suspend
;
584 twl
->usb_mode
= pdata
->usb_mode
;
587 /* init spinlock for workqueue */
588 spin_lock_init(&twl
->lock
);
590 err
= twl4030_usb_ldo_init(twl
);
592 dev_err(&pdev
->dev
, "ldo init failed\n");
596 otg_set_transceiver(&twl
->otg
);
598 platform_set_drvdata(pdev
, twl
);
599 if (device_create_file(&pdev
->dev
, &dev_attr_vbus
))
600 dev_warn(&pdev
->dev
, "could not create sysfs file\n");
602 BLOCKING_INIT_NOTIFIER_HEAD(&twl
->otg
.notifier
);
604 twl
->irq_enabled
= true;
605 status
= request_threaded_irq(twl
->irq
, NULL
, twl4030_usb_irq
,
606 IRQF_TRIGGER_FALLING
| IRQF_TRIGGER_RISING
,
609 dev_dbg(&pdev
->dev
, "can't get IRQ %d, err %d\n",
615 /* Power down phy or make it work according to
616 * current link state.
618 twl4030_usb_phy_init(twl
);
620 dev_info(&pdev
->dev
, "Initialized TWL4030 USB module\n");
624 static int __exit
twl4030_usb_remove(struct platform_device
*pdev
)
626 struct twl4030_usb
*twl
= platform_get_drvdata(pdev
);
629 free_irq(twl
->irq
, twl
);
630 device_remove_file(twl
->dev
, &dev_attr_vbus
);
632 /* set transceiver mode to power on defaults */
633 twl4030_usb_set_mode(twl
, -1);
635 /* autogate 60MHz ULPI clock,
636 * clear dpll clock request for i2c access,
639 val
= twl4030_usb_read(twl
, PHY_CLK_CTRL
);
641 val
|= PHY_CLK_CTRL_CLOCKGATING_EN
;
642 val
&= ~(PHY_CLK_CTRL_CLK32K_EN
| REQ_PHY_DPLL_CLK
);
643 twl4030_usb_write(twl
, PHY_CLK_CTRL
, (u8
)val
);
646 /* disable complete OTG block */
647 twl4030_usb_clear_bits(twl
, POWER_CTRL
, POWER_CTRL_OTG_ENAB
);
649 twl4030_phy_power(twl
, 0);
650 regulator_put(twl
->usb1v5
);
651 regulator_put(twl
->usb1v8
);
652 regulator_put(twl
->usb3v1
);
659 static struct platform_driver twl4030_usb_driver
= {
660 .probe
= twl4030_usb_probe
,
661 .remove
= __exit_p(twl4030_usb_remove
),
663 .name
= "twl4030_usb",
664 .owner
= THIS_MODULE
,
668 static int __init
twl4030_usb_init(void)
670 return platform_driver_register(&twl4030_usb_driver
);
672 subsys_initcall(twl4030_usb_init
);
674 static void __exit
twl4030_usb_exit(void)
676 platform_driver_unregister(&twl4030_usb_driver
);
678 module_exit(twl4030_usb_exit
);
680 MODULE_ALIAS("platform:twl4030_usb");
681 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
682 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
683 MODULE_LICENSE("GPL");