release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-mxc/include/mach/iomux-v3.h

   1 /*
   2  * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
   3  *                      <armlinux@phytec.de>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17  * MA 02110-1301, USA.
  18  */
  19
  20 #ifndef __MACH_IOMUX_V3_H__
  21 #define __MACH_IOMUX_V3_H__
  22
  23 /*
  24  *      build IOMUX_PAD structure
  25  *
  26  * This iomux scheme is based around pads, which are the physical balls
  27  * on the processor.
  28  *
  29  * - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls
  30  *   things like driving strength and pullup/pulldown.
  31  * - Each pad can have but not necessarily does have an output routing register
  32  *   (IOMUXC_SW_MUX_CTL_PAD_x).
  33  * - Each pad can have but not necessarily does have an input routing register
  34  *   (IOMUXC_x_SELECT_INPUT)
  35  *
  36  * The three register sets do not have a fixed offset to each other,
  37  * hence we order this table by pad control registers (which all pads
  38  * have) and put the optional i/o routing registers into additional
  39  * fields.
  40  *
  41  * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode>
  42  * If <padname> or <padmode> refers to a GPIO, it is named
  43  * GPIO_<unit>_<num>
  44  *
  45  */
  46
  47 struct pad_desc {
  48         unsigned mux_ctrl_ofs:12; /* IOMUXC_SW_MUX_CTL_PAD offset */
  49         unsigned mux_mode:8;
  50         unsigned pad_ctrl_ofs:12; /* IOMUXC_SW_PAD_CTRL offset */
  51 #define NO_PAD_CTRL     (1 << 16)
  52         unsigned pad_ctrl:17;
  53         unsigned select_input_ofs:12; /* IOMUXC_SELECT_INPUT offset */
  54         unsigned select_input:3;
  55 };
  56
  57 #define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _select_input_ofs, \
  58                 _select_input, _pad_ctrl)                               \
  59                 {                                                       \
  60                         .mux_ctrl_ofs     = _mux_ctrl_ofs,              \
  61                         .mux_mode         = _mux_mode,                  \
  62                         .pad_ctrl_ofs     = _pad_ctrl_ofs,              \
  63                         .pad_ctrl         = _pad_ctrl,                  \
  64                         .select_input_ofs = _select_input_ofs,          \
  65                         .select_input     = _select_input,              \
  66                 }
  67
  68 /*
  69  * Use to set PAD control
  70  */
  71
  72 #define PAD_CTL_DVS                     (1 << 13)
  73 #define PAD_CTL_HYS                     (1 << 8)
  74
  75 #define PAD_CTL_PKE                     (1 << 7)
  76 #define PAD_CTL_PUE                     (1 << 6)
  77 #define PAD_CTL_PUS_100K_DOWN           (0 << 4)
  78 #define PAD_CTL_PUS_47K_UP              (1 << 4)
  79 #define PAD_CTL_PUS_100K_UP             (2 << 4)
  80 #define PAD_CTL_PUS_22K_UP              (3 << 4)
  81
  82 #define PAD_CTL_ODE                     (1 << 3)
  83
  84 #define PAD_CTL_DSE_LOW                 (0 << 1)
  85 #define PAD_CTL_DSE_MED                 (1 << 1)
  86 #define PAD_CTL_DSE_HIGH                (2 << 1)
  87 #define PAD_CTL_DSE_MAX                 (3 << 1)
  88
  89 #define PAD_CTL_SRE_FAST                (1 << 0)
  90 #define PAD_CTL_SRE_SLOW                (0 << 0)
  91
  92
  93 #define MX51_NUM_GPIO_PORT      4
  94
  95 #define GPIO_PIN_MASK 0x1f
  96
  97 #define GPIO_PORT_SHIFT 5
  98 #define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
  99
 100 #define GPIO_PORTA      (0 << GPIO_PORT_SHIFT)
 101 #define GPIO_PORTB      (1 << GPIO_PORT_SHIFT)
 102 #define GPIO_PORTC      (2 << GPIO_PORT_SHIFT)
 103 #define GPIO_PORTD      (3 << GPIO_PORT_SHIFT)
 104 #define GPIO_PORTE      (4 << GPIO_PORT_SHIFT)
 105 #define GPIO_PORTF      (5 << GPIO_PORT_SHIFT)
 106
 107 /*
 108  * setups a single pad in the iomuxer
 109  */
 110 int mxc_iomux_v3_setup_pad(struct pad_desc *pad);
 111
 112 /*
 113  * setups mutliple pads
 114  * convenient way to call the above function with tables
 115  */
 116 int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count);
 117
 118 /*
 119  * Initialise the iomux controller
 120  */
 121 void mxc_iomux_v3_init(void __iomem *iomux_v3_base);
 122
 123 #endif /* __MACH_IOMUX_V3_H__*/