release/src-rt-6.x/linux/linux-2.6/include/video/cyblafb.h

   1
   2 #ifndef CYBLAFB_DEBUG
   3 #define CYBLAFB_DEBUG 0
   4 #endif
   5
   6 #if CYBLAFB_DEBUG
   7 #define debug(f,a...)   printk("%s:" f,  __FUNCTION__ , ## a);
   8 #else
   9 #define debug(f,a...)
  10 #endif
  11
  12 #define output(f, a...) printk("cyblafb: " f, ## a)
  13
  14 #define Kb      (1024)
  15 #define Mb      (Kb*Kb)
  16
  17 /* PCI IDS of supported cards temporarily here */
  18
  19 #define CYBERBLADEi1    0x8500
  20
  21 /* these defines are for 'lcd' variable */
  22 #define LCD_STRETCH     0
  23 #define LCD_CENTER      1
  24 #define LCD_BIOS        2
  25
  26 /* display types */
  27 #define DISPLAY_CRT     0
  28 #define DISPLAY_FP      1
  29
  30 #define ROP_S   0xCC
  31
  32 #define point(x,y) ((y)<<16|(x))
  33
  34 //
  35 // Attribute Regs, ARxx, 3c0/3c1
  36 //
  37 #define AR00    0x00
  38 #define AR01    0x01
  39 #define AR02    0x02
  40 #define AR03    0x03
  41 #define AR04    0x04
  42 #define AR05    0x05
  43 #define AR06    0x06
  44 #define AR07    0x07
  45 #define AR08    0x08
  46 #define AR09    0x09
  47 #define AR0A    0x0A
  48 #define AR0B    0x0B
  49 #define AR0C    0x0C
  50 #define AR0D    0x0D
  51 #define AR0E    0x0E
  52 #define AR0F    0x0F
  53 #define AR10    0x10
  54 #define AR12    0x12
  55 #define AR13    0x13
  56
  57 //
  58 // Sequencer Regs, SRxx, 3c4/3c5
  59 //
  60 #define SR00    0x00
  61 #define SR01    0x01
  62 #define SR02    0x02
  63 #define SR03    0x03
  64 #define SR04    0x04
  65 #define SR0D    0x0D
  66 #define SR0E    0x0E
  67 #define SR11    0x11
  68 #define SR18    0x18
  69 #define SR19    0x19
  70
  71 //
  72 //
  73 //
  74 #define CR00    0x00
  75 #define CR01    0x01
  76 #define CR02    0x02
  77 #define CR03    0x03
  78 #define CR04    0x04
  79 #define CR05    0x05
  80 #define CR06    0x06
  81 #define CR07    0x07
  82 #define CR08    0x08
  83 #define CR09    0x09
  84 #define CR0A    0x0A
  85 #define CR0B    0x0B
  86 #define CR0C    0x0C
  87 #define CR0D    0x0D
  88 #define CR0E    0x0E
  89 #define CR0F    0x0F
  90 #define CR10    0x10
  91 #define CR11    0x11
  92 #define CR12    0x12
  93 #define CR13    0x13
  94 #define CR14    0x14
  95 #define CR15    0x15
  96 #define CR16    0x16
  97 #define CR17    0x17
  98 #define CR18    0x18
  99 #define CR19    0x19
 100 #define CR1A    0x1A
 101 #define CR1B    0x1B
 102 #define CR1C    0x1C
 103 #define CR1D    0x1D
 104 #define CR1E    0x1E
 105 #define CR1F    0x1F
 106 #define CR20    0x20
 107 #define CR21    0x21
 108 #define CR27    0x27
 109 #define CR29    0x29
 110 #define CR2A    0x2A
 111 #define CR2B    0x2B
 112 #define CR2D    0x2D
 113 #define CR2F    0x2F
 114 #define CR36    0x36
 115 #define CR38    0x38
 116 #define CR39    0x39
 117 #define CR3A    0x3A
 118 #define CR55    0x55
 119 #define CR56    0x56
 120 #define CR57    0x57
 121 #define CR58    0x58
 122
 123 //
 124 //
 125 //
 126
 127 #define GR00    0x01
 128 #define GR01    0x01
 129 #define GR02    0x02
 130 #define GR03    0x03
 131 #define GR04    0x04
 132 #define GR05    0x05
 133 #define GR06    0x06
 134 #define GR07    0x07
 135 #define GR08    0x08
 136 #define GR0F    0x0F
 137 #define GR20    0x20
 138 #define GR23    0x23
 139 #define GR2F    0x2F
 140 #define GR30    0x30
 141 #define GR31    0x31
 142 #define GR33    0x33
 143 #define GR52    0x52
 144 #define GR53    0x53
 145 #define GR5D    0x5d
 146
 147
 148 //
 149 // Graphics Engine
 150 //
 151 #define GEBase  0x2100          // could be mapped elsewhere if we like it
 152 #define GE00    (GEBase+0x00)   // source 1, p 111
 153 #define GE04    (GEBase+0x04)   // source 2, p 111
 154 #define GE08    (GEBase+0x08)   // destination 1, p 111
 155 #define GE0C    (GEBase+0x0C)   // destination 2, p 112
 156 #define GE10    (GEBase+0x10)   // right view base & enable, p 112
 157 #define GE13    (GEBase+0x13)   // left view base & enable, p 112
 158 #define GE18    (GEBase+0x18)   // block write start address, p 112
 159 #define GE1C    (GEBase+0x1C)   // block write end address, p 112
 160 #define GE20    (GEBase+0x20)   // engine status, p 113
 161 #define GE24    (GEBase+0x24)   // reset all GE pointers
 162 #define GE44    (GEBase+0x44)   // command register, p 126
 163 #define GE48    (GEBase+0x48)   // raster operation, p 127
 164 #define GE60    (GEBase+0x60)   // foreground color, p 128
 165 #define GE64    (GEBase+0x64)   // background color, p 128
 166 #define GE6C    (GEBase+0x6C)   // Pattern and Style, p 129, ok
 167 #define GE9C    (GEBase+0x9C)   // pixel engine data port, p 125
 168 #define GEB8    (GEBase+0xB8)   // Destination Stride / Buffer Base 0, p 133
 169 #define GEBC    (GEBase+0xBC)   // Destination Stride / Buffer Base 1, p 133
 170 #define GEC0    (GEBase+0xC0)   // Destination Stride / Buffer Base 2, p 133
 171 #define GEC4    (GEBase+0xC4)   // Destination Stride / Buffer Base 3, p 133
 172 #define GEC8    (GEBase+0xC8)   // Source Stride / Buffer Base 0, p 133
 173 #define GECC    (GEBase+0xCC)   // Source Stride / Buffer Base 1, p 133
 174 #define GED0    (GEBase+0xD0)   // Source Stride / Buffer Base 2, p 133
 175 #define GED4    (GEBase+0xD4)   // Source Stride / Buffer Base 3, p 133