RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / include / asm-mips / rm9k-ocd.h
blobb0b80d9ecf961fa1e04c97403af636ff083d6c20
1 /*
2 * Copyright (C) 2004 by Basler Vision Technologies AG
3 * Author: Thomas Koeller <thomas.koeller@baslerweb.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #if !defined(_ASM_RM9K_OCD_H)
21 #define _ASM_RM9K_OCD_H
23 #include <linux/types.h>
24 #include <linux/spinlock.h>
25 #include <asm/io.h>
27 extern volatile void __iomem * const ocd_base;
28 extern volatile void __iomem * const titan_base;
30 #define ocd_addr(__x__) (ocd_base + (__x__))
31 #define titan_addr(__x__) (titan_base + (__x__))
32 #define scram_addr(__x__) (scram_base + (__x__))
34 /* OCD register access */
35 #define ocd_readl(__offs__) __raw_readl(ocd_addr(__offs__))
36 #define ocd_readw(__offs__) __raw_readw(ocd_addr(__offs__))
37 #define ocd_readb(__offs__) __raw_readb(ocd_addr(__offs__))
38 #define ocd_writel(__val__, __offs__) \
39 __raw_writel((__val__), ocd_addr(__offs__))
40 #define ocd_writew(__val__, __offs__) \
41 __raw_writew((__val__), ocd_addr(__offs__))
42 #define ocd_writeb(__val__, __offs__) \
43 __raw_writeb((__val__), ocd_addr(__offs__))
45 /* TITAN register access - 32 bit-wide only */
46 #define titan_readl(__offs__) __raw_readl(titan_addr(__offs__))
47 #define titan_writel(__val__, __offs__) \
48 __raw_writel((__val__), titan_addr(__offs__))
50 /* Protect access to shared TITAN registers */
51 extern spinlock_t titan_lock;
52 extern int titan_irqflags;
53 #define lock_titan_regs() spin_lock_irqsave(&titan_lock, titan_irqflags)
54 #define unlock_titan_regs() spin_unlock_irqrestore(&titan_lock, titan_irqflags)
56 #endif /* !defined(_ASM_RM9K_OCD_H) */