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RT-AC66 3.0.0.4.374.130 core
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / usb / host / sl811-hcd.c
blobb3ae48f464008dabc5d854a4089e824c2f40d487
1 /*
2 * SL811HS HCD (Host Controller Driver) for USB.
3 *
4 * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
5 * Copyright (C) 2004-2005 David Brownell
6 *
7 * Periodic scheduling is based on Roman's OHCI code
8 * Copyright (C) 1999 Roman Weissgaerber
9 *
10 * The SL811HS controller handles host side USB (like the SL11H, but with
11 * another register set and SOF generation) as well as peripheral side USB
12 * (like the SL811S). This driver version doesn't implement the Gadget API
13 * for the peripheral role; or OTG (that'd need much external circuitry).
14 *
15 * For documentation, see the SL811HS spec and the "SL811HS Embedded Host"
16 * document (providing significant pieces missing from that spec); plus
17 * the SL811S spec if you want peripheral side info.
18 */
19
20 /*
21 * Status: Passed basic stress testing, works with hubs, mice, keyboards,
22 * and usb-storage.
23 *
24 * TODO:
25 * - usb suspend/resume triggered by sl811 (with USB_SUSPEND)
26 * - various issues noted in the code
27 * - performance work; use both register banks; ...
28 * - use urb->iso_frame_desc[] with ISO transfers
29 */
30
31 #undef VERBOSE
32 #undef PACKET_TRACE
33
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/kernel.h>
37 #include <linux/delay.h>
38 #include <linux/ioport.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/errno.h>
42 #include <linux/init.h>
43 #include <linux/timer.h>
44 #include <linux/list.h>
45 #include <linux/interrupt.h>
46 #include <linux/usb.h>
47 #include <linux/usb/sl811.h>
48 #include <linux/platform_device.h>
49
50 #include <asm/io.h>
51 #include <asm/irq.h>
52 #include <asm/system.h>
53 #include <asm/byteorder.h>
54
55 #include "../core/hcd.h"
56 #include "sl811.h"
57
58
59 MODULE_DESCRIPTION("SL811HS USB Host Controller Driver");
60 MODULE_LICENSE("GPL");
61
62 #define DRIVER_VERSION "19 May 2005"
63
64
65 #ifndef DEBUG
66 # define STUB_DEBUG_FILE
67 #endif
68
69 /* for now, use only one transfer register bank */
70 #undef USE_B
71
72 /* this doesn't understand urb->iso_frame_desc[], but if you had a driver
73 * that just queued one ISO frame per URB then iso transfers "should" work
74 * using the normal urb status fields.
75 */
76 #define DISABLE_ISO
77
78 // #define QUIRK2
79 #define QUIRK3
80
81 static const char hcd_name[] = "sl811-hcd";
82
83 /*-------------------------------------------------------------------------*/
84
85 static void port_power(struct sl811 *sl811, int is_on)
86 {
87 struct usb_hcd *hcd = sl811_to_hcd(sl811);
88
89 /* hub is inactive unless the port is powered */
90 if (is_on) {
91 if (sl811->port1 & (1 << USB_PORT_FEAT_POWER))
92 return;
93
94 sl811->port1 = (1 << USB_PORT_FEAT_POWER);
95 sl811->irq_enable = SL11H_INTMASK_INSRMV;
96 } else {
97 sl811->port1 = 0;
98 sl811->irq_enable = 0;
99 hcd->state = HC_STATE_HALT;
100 }
101 sl811->ctrl1 = 0;
102 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
103 sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
104
105 if (sl811->board && sl811->board->port_power) {
106 /* switch VBUS, at 500mA unless hub power budget gets set */
107 DBG("power %s\n", is_on ? "on" : "off");
108 sl811->board->port_power(hcd->self.controller, is_on);
109 }
110
111 /* reset as thoroughly as we can */
112 if (sl811->board && sl811->board->reset)
113 sl811->board->reset(hcd->self.controller);
114 else {
115 sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
116 mdelay(20);
117 }
118
119 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
120 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
121 sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
122 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
123
124 // if !is_on, put into lowpower mode now
125 }
126
127 /*-------------------------------------------------------------------------*/
128
129 /* This is a PIO-only HCD. Queueing appends URBs to the endpoint's queue,
130 * and may start I/O. Endpoint queues are scanned during completion irq
131 * handlers (one per packet: ACK, NAK, faults, etc) and urb cancellation.
132 *
133 * Using an external DMA engine to copy a packet at a time could work,
134 * though setup/teardown costs may be too big to make it worthwhile.
135 */
136
137 /* SETUP starts a new control request. Devices are not allowed to
138 * STALL or NAK these; they must cancel any pending control requests.
139 */
140 static void setup_packet(
141 struct sl811 *sl811,
142 struct sl811h_ep *ep,
143 struct urb *urb,
144 u8 bank,
145 u8 control
146 )
147 {
148 u8 addr;
149 u8 len;
150 void __iomem *data_reg;
151
152 addr = SL811HS_PACKET_BUF(bank == 0);
153 len = sizeof(struct usb_ctrlrequest);
154 data_reg = sl811->data_reg;
155 sl811_write_buf(sl811, addr, urb->setup_packet, len);
156
157 /* autoincrementing */
158 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
159 writeb(len, data_reg);
160 writeb(SL_SETUP /* | ep->epnum */, data_reg);
161 writeb(usb_pipedevice(urb->pipe), data_reg);
162
163 /* always OUT/data0 */ ;
164 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
165 control | SL11H_HCTLMASK_OUT);
166 ep->length = 0;
167 PACKET("SETUP qh%p\n", ep);
168 }
169
170 /* STATUS finishes control requests, often after IN or OUT data packets */
171 static void status_packet(
172 struct sl811 *sl811,
173 struct sl811h_ep *ep,
174 struct urb *urb,
175 u8 bank,
176 u8 control
177 )
178 {
179 int do_out;
180 void __iomem *data_reg;
181
182 do_out = urb->transfer_buffer_length && usb_pipein(urb->pipe);
183 data_reg = sl811->data_reg;
184
185 /* autoincrementing */
186 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
187 writeb(0, data_reg);
188 writeb((do_out ? SL_OUT : SL_IN) /* | ep->epnum */, data_reg);
189 writeb(usb_pipedevice(urb->pipe), data_reg);
190
191 /* always data1; sometimes IN */
192 control |= SL11H_HCTLMASK_TOGGLE;
193 if (do_out)
194 control |= SL11H_HCTLMASK_OUT;
195 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
196 ep->length = 0;
197 PACKET("STATUS%s/%s qh%p\n", ep->nak_count ? "/retry" : "",
198 do_out ? "out" : "in", ep);
199 }
200
201 /* IN packets can be used with any type of endpoint. here we just
202 * start the transfer, data from the peripheral may arrive later.
203 * urb->iso_frame_desc is currently ignored here...
204 */
205 static void in_packet(
206 struct sl811 *sl811,
207 struct sl811h_ep *ep,
208 struct urb *urb,
209 u8 bank,
210 u8 control
211 )
212 {
213 u8 addr;
214 u8 len;
215 void __iomem *data_reg;
216
217 /* avoid losing data on overflow */
218 len = ep->maxpacket;
219 addr = SL811HS_PACKET_BUF(bank == 0);
220 if (!(control & SL11H_HCTLMASK_ISOCH)
221 && usb_gettoggle(urb->dev, ep->epnum, 0))
222 control |= SL11H_HCTLMASK_TOGGLE;
223 data_reg = sl811->data_reg;
224
225 /* autoincrementing */
226 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
227 writeb(len, data_reg);
228 writeb(SL_IN | ep->epnum, data_reg);
229 writeb(usb_pipedevice(urb->pipe), data_reg);
230
231 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
232 ep->length = min_t(u32, len,
233 urb->transfer_buffer_length - urb->actual_length);
234 PACKET("IN%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
235 !!usb_gettoggle(urb->dev, ep->epnum, 0), ep, len);
236 }
237
238 /* OUT packets can be used with any type of endpoint.
239 * urb->iso_frame_desc is currently ignored here...
240 */
241 static void out_packet(
242 struct sl811 *sl811,
243 struct sl811h_ep *ep,
244 struct urb *urb,
245 u8 bank,
246 u8 control
247 )
248 {
249 void *buf;
250 u8 addr;
251 u8 len;
252 void __iomem *data_reg;
253
254 buf = urb->transfer_buffer + urb->actual_length;
255 prefetch(buf);
256
257 len = min_t(u32, ep->maxpacket,
258 urb->transfer_buffer_length - urb->actual_length);
259
260 if (!(control & SL11H_HCTLMASK_ISOCH)
261 && usb_gettoggle(urb->dev, ep->epnum, 1))
262 control |= SL11H_HCTLMASK_TOGGLE;
263 addr = SL811HS_PACKET_BUF(bank == 0);
264 data_reg = sl811->data_reg;
265
266 sl811_write_buf(sl811, addr, buf, len);
267
268 /* autoincrementing */
269 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
270 writeb(len, data_reg);
271 writeb(SL_OUT | ep->epnum, data_reg);
272 writeb(usb_pipedevice(urb->pipe), data_reg);
273
274 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
275 control | SL11H_HCTLMASK_OUT);
276 ep->length = len;
277 PACKET("OUT%s/%d qh%p len%d\n", ep->nak_count ? "/retry" : "",
278 !!usb_gettoggle(urb->dev, ep->epnum, 1), ep, len);
279 }
280
281 /*-------------------------------------------------------------------------*/
282
283 /* caller updates on-chip enables later */
284
285 static inline void sofirq_on(struct sl811 *sl811)
286 {
287 if (sl811->irq_enable & SL11H_INTMASK_SOFINTR)
288 return;
289 VDBG("sof irq on\n");
290 sl811->irq_enable |= SL11H_INTMASK_SOFINTR;
291 }
292
293 static inline void sofirq_off(struct sl811 *sl811)
294 {
295 if (!(sl811->irq_enable & SL11H_INTMASK_SOFINTR))
296 return;
297 VDBG("sof irq off\n");
298 sl811->irq_enable &= ~SL11H_INTMASK_SOFINTR;
299 }
300
301 /*-------------------------------------------------------------------------*/
302
303 /* pick the next endpoint for a transaction, and issue it.
304 * frames start with periodic transfers (after whatever is pending
305 * from the previous frame), and the rest of the time is async
306 * transfers, scheduled round-robin.
307 */
308 static struct sl811h_ep *start(struct sl811 *sl811, u8 bank)
309 {
310 struct sl811h_ep *ep;
311 struct urb *urb;
312 int fclock;
313 u8 control;
314
315 /* use endpoint at schedule head */
316 if (sl811->next_periodic) {
317 ep = sl811->next_periodic;
318 sl811->next_periodic = ep->next;
319 } else {
320 if (sl811->next_async)
321 ep = sl811->next_async;
322 else if (!list_empty(&sl811->async))
323 ep = container_of(sl811->async.next,
324 struct sl811h_ep, schedule);
325 else {
326 /* could set up the first fullspeed periodic
327 * transfer for the next frame ...
328 */
329 return NULL;
330 }
331
332 #ifdef USE_B
333 if ((bank && sl811->active_b == ep) || sl811->active_a == ep)
334 return NULL;
335 #endif
336
337 if (ep->schedule.next == &sl811->async)
338 sl811->next_async = NULL;
339 else
340 sl811->next_async = container_of(ep->schedule.next,
341 struct sl811h_ep, schedule);
342 }
343
344 if (unlikely(list_empty(&ep->hep->urb_list))) {
345 DBG("empty %p queue?\n", ep);
346 return NULL;
347 }
348
349 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
350 control = ep->defctrl;
351
352 /* if this frame doesn't have enough time left to transfer this
353 * packet, wait till the next frame. too-simple algorithm...
354 */
355 fclock = sl811_read(sl811, SL11H_SOFTMRREG) << 6;
356 fclock -= 100; /* setup takes not much time */
357 if (urb->dev->speed == USB_SPEED_LOW) {
358 if (control & SL11H_HCTLMASK_PREAMBLE) {
359 /* also note erratum 1: some hubs won't work */
360 fclock -= 800;
361 }
362 fclock -= ep->maxpacket << 8;
363
364 /* erratum 2: AFTERSOF only works for fullspeed */
365 if (fclock < 0) {
366 if (ep->period)
367 sl811->stat_overrun++;
368 sofirq_on(sl811);
369 return NULL;
370 }
371 } else {
372 fclock -= 12000 / 19; /* 19 64byte packets/msec */
373 if (fclock < 0) {
374 if (ep->period)
375 sl811->stat_overrun++;
376 control |= SL11H_HCTLMASK_AFTERSOF;
377
378 /* throttle bulk/control irq noise */
379 } else if (ep->nak_count)
380 control |= SL11H_HCTLMASK_AFTERSOF;
381 }
382
383
384 switch (ep->nextpid) {
385 case USB_PID_IN:
386 in_packet(sl811, ep, urb, bank, control);
387 break;
388 case USB_PID_OUT:
389 out_packet(sl811, ep, urb, bank, control);
390 break;
391 case USB_PID_SETUP:
392 setup_packet(sl811, ep, urb, bank, control);
393 break;
394 case USB_PID_ACK: /* for control status */
395 status_packet(sl811, ep, urb, bank, control);
396 break;
397 default:
398 DBG("bad ep%p pid %02x\n", ep, ep->nextpid);
399 ep = NULL;
400 }
401 return ep;
402 }
403
404 #define MIN_JIFFIES ((msecs_to_jiffies(2) > 1) ? msecs_to_jiffies(2) : 2)
405
406 static inline void start_transfer(struct sl811 *sl811)
407 {
408 if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))
409 return;
410 if (sl811->active_a == NULL) {
411 sl811->active_a = start(sl811, SL811_EP_A(SL811_HOST_BUF));
412 if (sl811->active_a != NULL)
413 sl811->jiffies_a = jiffies + MIN_JIFFIES;
414 }
415 #ifdef USE_B
416 if (sl811->active_b == NULL) {
417 sl811->active_b = start(sl811, SL811_EP_B(SL811_HOST_BUF));
418 if (sl811->active_b != NULL)
419 sl811->jiffies_b = jiffies + MIN_JIFFIES;
420 }
421 #endif
422 }
423
424 static void finish_request(
425 struct sl811 *sl811,
426 struct sl811h_ep *ep,
427 struct urb *urb,
428 int status
429 ) __releases(sl811->lock) __acquires(sl811->lock)
430 {
431 unsigned i;
432
433 if (usb_pipecontrol(urb->pipe))
434 ep->nextpid = USB_PID_SETUP;
435
436 usb_hcd_unlink_urb_from_ep(sl811_to_hcd(sl811), urb);
437 spin_unlock(&sl811->lock);
438 usb_hcd_giveback_urb(sl811_to_hcd(sl811), urb, status);
439 spin_lock(&sl811->lock);
440
441 /* leave active endpoints in the schedule */
442 if (!list_empty(&ep->hep->urb_list))
443 return;
444
445 /* async deschedule? */
446 if (!list_empty(&ep->schedule)) {
447 list_del_init(&ep->schedule);
448 if (ep == sl811->next_async)
449 sl811->next_async = NULL;
450 return;
451 }
452
453 /* periodic deschedule */
454 DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
455 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
456 struct sl811h_ep *temp;
457 struct sl811h_ep **prev = &sl811->periodic[i];
458
459 while (*prev && ((temp = *prev) != ep))
460 prev = &temp->next;
461 if (*prev)
462 *prev = ep->next;
463 sl811->load[i] -= ep->load;
464 }
465 ep->branch = PERIODIC_SIZE;
466 sl811->periodic_count--;
467 sl811_to_hcd(sl811)->self.bandwidth_allocated
468 -= ep->load / ep->period;
469 if (ep == sl811->next_periodic)
470 sl811->next_periodic = ep->next;
471
472 /* we might turn SOFs back on again for the async schedule */
473 if (sl811->periodic_count == 0)
474 sofirq_off(sl811);
475 }
476
477 static void
478 done(struct sl811 *sl811, struct sl811h_ep *ep, u8 bank)
479 {
480 u8 status;
481 struct urb *urb;
482 int urbstat = -EINPROGRESS;
483
484 if (unlikely(!ep))
485 return;
486
487 status = sl811_read(sl811, bank + SL11H_PKTSTATREG);
488
489 urb = container_of(ep->hep->urb_list.next, struct urb, urb_list);
490
491 /* we can safely ignore NAKs */
492 if (status & SL11H_STATMASK_NAK) {
493 // PACKET("...NAK_%02x qh%p\n", bank, ep);
494 if (!ep->period)
495 ep->nak_count++;
496 ep->error_count = 0;
497
498 /* ACK advances transfer, toggle, and maybe queue */
499 } else if (status & SL11H_STATMASK_ACK) {
500 struct usb_device *udev = urb->dev;
501 int len;
502 unsigned char *buf;
503
504 /* urb->iso_frame_desc is currently ignored here... */
505
506 ep->nak_count = ep->error_count = 0;
507 switch (ep->nextpid) {
508 case USB_PID_OUT:
509 // PACKET("...ACK/out_%02x qh%p\n", bank, ep);
510 urb->actual_length += ep->length;
511 usb_dotoggle(udev, ep->epnum, 1);
512 if (urb->actual_length
513 == urb->transfer_buffer_length) {
514 if (usb_pipecontrol(urb->pipe))
515 ep->nextpid = USB_PID_ACK;
516
517 /* some bulk protocols terminate OUT transfers
518 * by a short packet, using ZLPs not padding.
519 */
520 else if (ep->length < ep->maxpacket
521 || !(urb->transfer_flags
522 & URB_ZERO_PACKET))
523 urbstat = 0;
524 }
525 break;
526 case USB_PID_IN:
527 // PACKET("...ACK/in_%02x qh%p\n", bank, ep);
528 buf = urb->transfer_buffer + urb->actual_length;
529 prefetchw(buf);
530 len = ep->maxpacket - sl811_read(sl811,
531 bank + SL11H_XFERCNTREG);
532 if (len > ep->length) {
533 len = ep->length;
534 urbstat = -EOVERFLOW;
535 }
536 urb->actual_length += len;
537 sl811_read_buf(sl811, SL811HS_PACKET_BUF(bank == 0),
538 buf, len);
539 usb_dotoggle(udev, ep->epnum, 0);
540 if (urbstat == -EINPROGRESS &&
541 (len < ep->maxpacket ||
542 urb->actual_length ==
543 urb->transfer_buffer_length)) {
544 if (usb_pipecontrol(urb->pipe))
545 ep->nextpid = USB_PID_ACK;
546 else
547 urbstat = 0;
548 }
549 break;
550 case USB_PID_SETUP:
551 // PACKET("...ACK/setup_%02x qh%p\n", bank, ep);
552 if (urb->transfer_buffer_length == urb->actual_length)
553 ep->nextpid = USB_PID_ACK;
554 else if (usb_pipeout(urb->pipe)) {
555 usb_settoggle(udev, 0, 1, 1);
556 ep->nextpid = USB_PID_OUT;
557 } else {
558 usb_settoggle(udev, 0, 0, 1);
559 ep->nextpid = USB_PID_IN;
560 }
561 break;
562 case USB_PID_ACK:
563 // PACKET("...ACK/status_%02x qh%p\n", bank, ep);
564 urbstat = 0;
565 break;
566 }
567
568 /* STALL stops all transfers */
569 } else if (status & SL11H_STATMASK_STALL) {
570 PACKET("...STALL_%02x qh%p\n", bank, ep);
571 ep->nak_count = ep->error_count = 0;
572 urbstat = -EPIPE;
573
574 /* error? retry, until "3 strikes" */
575 } else if (++ep->error_count >= 3) {
576 if (status & SL11H_STATMASK_TMOUT)
577 urbstat = -ETIME;
578 else if (status & SL11H_STATMASK_OVF)
579 urbstat = -EOVERFLOW;
580 else
581 urbstat = -EPROTO;
582 ep->error_count = 0;
583 PACKET("...3STRIKES_%02x %02x qh%p stat %d\n",
584 bank, status, ep, urbstat);
585 }
586
587 if (urbstat != -EINPROGRESS || urb->unlinked)
588 finish_request(sl811, ep, urb, urbstat);
589 }
590
591 static inline u8 checkdone(struct sl811 *sl811)
592 {
593 u8 ctl;
594 u8 irqstat = 0;
595
596 if (sl811->active_a && time_before_eq(sl811->jiffies_a, jiffies)) {
597 ctl = sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG));
598 if (ctl & SL11H_HCTLMASK_ARM)
599 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
600 DBG("%s DONE_A: ctrl %02x sts %02x\n",
601 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
602 ctl,
603 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
604 irqstat |= SL11H_INTMASK_DONE_A;
605 }
606 #ifdef USE_B
607 if (sl811->active_b && time_before_eq(sl811->jiffies_b, jiffies)) {
608 ctl = sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG));
609 if (ctl & SL11H_HCTLMASK_ARM)
610 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
611 DBG("%s DONE_B: ctrl %02x sts %02x\n",
612 (ctl & SL11H_HCTLMASK_ARM) ? "timeout" : "lost",
613 ctl,
614 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
615 irqstat |= SL11H_INTMASK_DONE_A;
616 }
617 #endif
618 return irqstat;
619 }
620
621 static irqreturn_t sl811h_irq(struct usb_hcd *hcd)
622 {
623 struct sl811 *sl811 = hcd_to_sl811(hcd);
624 u8 irqstat;
625 irqreturn_t ret = IRQ_NONE;
626 unsigned retries = 5;
627
628 spin_lock(&sl811->lock);
629
630 retry:
631 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS) & ~SL11H_INTMASK_DP;
632 if (irqstat) {
633 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
634 irqstat &= sl811->irq_enable;
635 }
636
637 #ifdef QUIRK2
638 /* this may no longer be necessary ... */
639 if (irqstat == 0) {
640 irqstat = checkdone(sl811);
641 if (irqstat)
642 sl811->stat_lost++;
643 }
644 #endif
645
646 /* USB packets, not necessarily handled in the order they're
647 * issued ... that's fine if they're different endpoints.
648 */
649 if (irqstat & SL11H_INTMASK_DONE_A) {
650 done(sl811, sl811->active_a, SL811_EP_A(SL811_HOST_BUF));
651 sl811->active_a = NULL;
652 sl811->stat_a++;
653 }
654 #ifdef USE_B
655 if (irqstat & SL11H_INTMASK_DONE_B) {
656 done(sl811, sl811->active_b, SL811_EP_B(SL811_HOST_BUF));
657 sl811->active_b = NULL;
658 sl811->stat_b++;
659 }
660 #endif
661 if (irqstat & SL11H_INTMASK_SOFINTR) {
662 unsigned index;
663
664 index = sl811->frame++ % (PERIODIC_SIZE - 1);
665 sl811->stat_sof++;
666
667 /* be graceful about almost-inevitable periodic schedule
668 * overruns: continue the previous frame's transfers iff
669 * this one has nothing scheduled.
670 */
671 if (sl811->next_periodic) {
672 // ERR("overrun to slot %d\n", index);
673 sl811->stat_overrun++;
674 }
675 if (sl811->periodic[index])
676 sl811->next_periodic = sl811->periodic[index];
677 }
678
679 /* khubd manages debouncing and wakeup */
680 if (irqstat & SL11H_INTMASK_INSRMV) {
681 sl811->stat_insrmv++;
682
683 /* most stats are reset for each VBUS session */
684 sl811->stat_wake = 0;
685 sl811->stat_sof = 0;
686 sl811->stat_a = 0;
687 sl811->stat_b = 0;
688 sl811->stat_lost = 0;
689
690 sl811->ctrl1 = 0;
691 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
692
693 sl811->irq_enable = SL11H_INTMASK_INSRMV;
694 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
695
696 /* usbcore nukes other pending transactions on disconnect */
697 if (sl811->active_a) {
698 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
699 finish_request(sl811, sl811->active_a,
700 container_of(sl811->active_a
701 ->hep->urb_list.next,
702 struct urb, urb_list),
703 -ESHUTDOWN);
704 sl811->active_a = NULL;
705 }
706 #ifdef USE_B
707 if (sl811->active_b) {
708 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
709 finish_request(sl811, sl811->active_b,
710 container_of(sl811->active_b
711 ->hep->urb_list.next,
712 struct urb, urb_list),
713 NULL, -ESHUTDOWN);
714 sl811->active_b = NULL;
715 }
716 #endif
717
718 /* port status seems weird until after reset, so
719 * force the reset and make khubd clean up later.
720 */
721 sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION)
722 | (1 << USB_PORT_FEAT_CONNECTION);
723
724 } else if (irqstat & SL11H_INTMASK_RD) {
725 if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)) {
726 DBG("wakeup\n");
727 sl811->port1 |= 1 << USB_PORT_FEAT_C_SUSPEND;
728 sl811->stat_wake++;
729 } else
730 irqstat &= ~SL11H_INTMASK_RD;
731 }
732
733 if (irqstat) {
734 if (sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))
735 start_transfer(sl811);
736 ret = IRQ_HANDLED;
737 if (retries--)
738 goto retry;
739 }
740
741 if (sl811->periodic_count == 0 && list_empty(&sl811->async))
742 sofirq_off(sl811);
743 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
744
745 spin_unlock(&sl811->lock);
746
747 return ret;
748 }
749
750 /*-------------------------------------------------------------------------*/
751
752 /* usb 1.1 says max 90% of a frame is available for periodic transfers.
753 * this driver doesn't promise that much since it's got to handle an
754 * IRQ per packet; irq handling latencies also use up that time.
755 *
756 * NOTE: the periodic schedule is a sparse tree, with the load for
757 * each branch minimized. see fig 3.5 in the OHCI spec for example.
758 */
759 #define MAX_PERIODIC_LOAD 500 /* out of 1000 usec */
760
761 static int balance(struct sl811 *sl811, u16 period, u16 load)
762 {
763 int i, branch = -ENOSPC;
764
765 /* search for the least loaded schedule branch of that period
766 * which has enough bandwidth left unreserved.
767 */
768 for (i = 0; i < period ; i++) {
769 if (branch < 0 || sl811->load[branch] > sl811->load[i]) {
770 int j;
771
772 for (j = i; j < PERIODIC_SIZE; j += period) {
773 if ((sl811->load[j] + load)
774 > MAX_PERIODIC_LOAD)
775 break;
776 }
777 if (j < PERIODIC_SIZE)
778 continue;
779 branch = i;
780 }
781 }
782 return branch;
783 }
784
785 /*-------------------------------------------------------------------------*/
786
787 static int sl811h_urb_enqueue(
788 struct usb_hcd *hcd,
789 struct urb *urb,
790 gfp_t mem_flags
791 ) {
792 struct sl811 *sl811 = hcd_to_sl811(hcd);
793 struct usb_device *udev = urb->dev;
794 unsigned int pipe = urb->pipe;
795 int is_out = !usb_pipein(pipe);
796 int type = usb_pipetype(pipe);
797 int epnum = usb_pipeendpoint(pipe);
798 struct sl811h_ep *ep = NULL;
799 unsigned long flags;
800 int i;
801 int retval;
802 struct usb_host_endpoint *hep = urb->ep;
803
804 #ifdef DISABLE_ISO
805 if (type == PIPE_ISOCHRONOUS)
806 return -ENOSPC;
807 #endif
808
809 /* avoid all allocations within spinlocks */
810 if (!hep->hcpriv)
811 ep = kzalloc(sizeof *ep, mem_flags);
812
813 spin_lock_irqsave(&sl811->lock, flags);
814
815 /* don't submit to a dead or disabled port */
816 if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE))
817 || !HC_IS_RUNNING(hcd->state)) {
818 retval = -ENODEV;
819 kfree(ep);
820 goto fail_not_linked;
821 }
822 retval = usb_hcd_link_urb_to_ep(hcd, urb);
823 if (retval) {
824 kfree(ep);
825 goto fail_not_linked;
826 }
827
828 if (hep->hcpriv) {
829 kfree(ep);
830 ep = hep->hcpriv;
831 } else if (!ep) {
832 retval = -ENOMEM;
833 goto fail;
834
835 } else {
836 INIT_LIST_HEAD(&ep->schedule);
837 ep->udev = udev;
838 ep->epnum = epnum;
839 ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
840 ep->defctrl = SL11H_HCTLMASK_ARM | SL11H_HCTLMASK_ENABLE;
841 usb_settoggle(udev, epnum, is_out, 0);
842
843 if (type == PIPE_CONTROL)
844 ep->nextpid = USB_PID_SETUP;
845 else if (is_out)
846 ep->nextpid = USB_PID_OUT;
847 else
848 ep->nextpid = USB_PID_IN;
849
850 if (ep->maxpacket > H_MAXPACKET) {
851 /* iso packets up to 240 bytes could work... */
852 DBG("dev %d ep%d maxpacket %d\n",
853 udev->devnum, epnum, ep->maxpacket);
854 retval = -EINVAL;
855 goto fail;
856 }
857
858 if (udev->speed == USB_SPEED_LOW) {
859 /* send preamble for external hub? */
860 if (!(sl811->ctrl1 & SL11H_CTL1MASK_LSPD))
861 ep->defctrl |= SL11H_HCTLMASK_PREAMBLE;
862 }
863 switch (type) {
864 case PIPE_ISOCHRONOUS:
865 case PIPE_INTERRUPT:
866 if (urb->interval > PERIODIC_SIZE)
867 urb->interval = PERIODIC_SIZE;
868 ep->period = urb->interval;
869 ep->branch = PERIODIC_SIZE;
870 if (type == PIPE_ISOCHRONOUS)
871 ep->defctrl |= SL11H_HCTLMASK_ISOCH;
872 ep->load = usb_calc_bus_time(udev->speed, !is_out,
873 (type == PIPE_ISOCHRONOUS),
874 usb_maxpacket(udev, pipe, is_out))
875 / 1000;
876 break;
877 }
878
879 ep->hep = hep;
880 hep->hcpriv = ep;
881 }
882
883 /* maybe put endpoint into schedule */
884 switch (type) {
885 case PIPE_CONTROL:
886 case PIPE_BULK:
887 if (list_empty(&ep->schedule))
888 list_add_tail(&ep->schedule, &sl811->async);
889 break;
890 case PIPE_ISOCHRONOUS:
891 case PIPE_INTERRUPT:
892 urb->interval = ep->period;
893 if (ep->branch < PERIODIC_SIZE) {
894 /* NOTE: the phase is correct here, but the value
895 * needs offsetting by the transfer queue depth.
896 * All current drivers ignore start_frame, so this
897 * is unlikely to ever matter...
898 */
899 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
900 + ep->branch;
901 break;
902 }
903
904 retval = balance(sl811, ep->period, ep->load);
905 if (retval < 0)
906 goto fail;
907 ep->branch = retval;
908 retval = 0;
909 urb->start_frame = (sl811->frame & (PERIODIC_SIZE - 1))
910 + ep->branch;
911
912 /* sort each schedule branch by period (slow before fast)
913 * to share the faster parts of the tree without needing
914 * dummy/placeholder nodes
915 */
916 DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
917 for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
918 struct sl811h_ep **prev = &sl811->periodic[i];
919 struct sl811h_ep *here = *prev;
920
921 while (here && ep != here) {
922 if (ep->period > here->period)
923 break;
924 prev = &here->next;
925 here = *prev;
926 }
927 if (ep != here) {
928 ep->next = here;
929 *prev = ep;
930 }
931 sl811->load[i] += ep->load;
932 }
933 sl811->periodic_count++;
934 hcd->self.bandwidth_allocated += ep->load / ep->period;
935 sofirq_on(sl811);
936 }
937
938 urb->hcpriv = hep;
939 start_transfer(sl811);
940 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
941 fail:
942 if (retval)
943 usb_hcd_unlink_urb_from_ep(hcd, urb);
944 fail_not_linked:
945 spin_unlock_irqrestore(&sl811->lock, flags);
946 return retval;
947 }
948
949 static int sl811h_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
950 {
951 struct sl811 *sl811 = hcd_to_sl811(hcd);
952 struct usb_host_endpoint *hep;
953 unsigned long flags;
954 struct sl811h_ep *ep;
955 int retval;
956
957 spin_lock_irqsave(&sl811->lock, flags);
958 retval = usb_hcd_check_unlink_urb(hcd, urb, status);
959 if (retval)
960 goto fail;
961
962 hep = urb->hcpriv;
963 ep = hep->hcpriv;
964 if (ep) {
965 /* finish right away if this urb can't be active ...
966 * note that some drivers wrongly expect delays
967 */
968 if (ep->hep->urb_list.next != &urb->urb_list) {
969 /* not front of queue? never active */
970
971 /* for active transfers, we expect an IRQ */
972 } else if (sl811->active_a == ep) {
973 if (time_before_eq(sl811->jiffies_a, jiffies)) {
974 /* happens a lot with lowspeed?? */
975 DBG("giveup on DONE_A: ctrl %02x sts %02x\n",
976 sl811_read(sl811,
977 SL811_EP_A(SL11H_HOSTCTLREG)),
978 sl811_read(sl811,
979 SL811_EP_A(SL11H_PKTSTATREG)));
980 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
981 0);
982 sl811->active_a = NULL;
983 } else
984 urb = NULL;
985 #ifdef USE_B
986 } else if (sl811->active_b == ep) {
987 if (time_before_eq(sl811->jiffies_a, jiffies)) {
988 /* happens a lot with lowspeed?? */
989 DBG("giveup on DONE_B: ctrl %02x sts %02x\n",
990 sl811_read(sl811,
991 SL811_EP_B(SL11H_HOSTCTLREG)),
992 sl811_read(sl811,
993 SL811_EP_B(SL11H_PKTSTATREG)));
994 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
995 0);
996 sl811->active_b = NULL;
997 } else
998 urb = NULL;
999 #endif
1000 } else {
1001 /* front of queue for inactive endpoint */
1002 }
1003
1004 if (urb)
1005 finish_request(sl811, ep, urb, 0);
1006 else
1007 VDBG("dequeue, urb %p active %s; wait4irq\n", urb,
1008 (sl811->active_a == ep) ? "A" : "B");
1009 } else
1010 retval = -EINVAL;
1011 fail:
1012 spin_unlock_irqrestore(&sl811->lock, flags);
1013 return retval;
1014 }
1015
1016 static void
1017 sl811h_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *hep)
1018 {
1019 struct sl811h_ep *ep = hep->hcpriv;
1020
1021 if (!ep)
1022 return;
1023
1024 /* assume we'd just wait for the irq */
1025 if (!list_empty(&hep->urb_list))
1026 msleep(3);
1027 if (!list_empty(&hep->urb_list))
1028 WARN("ep %p not empty?\n", ep);
1029
1030 kfree(ep);
1031 hep->hcpriv = NULL;
1032 }
1033
1034 static int
1035 sl811h_get_frame(struct usb_hcd *hcd)
1036 {
1037 struct sl811 *sl811 = hcd_to_sl811(hcd);
1038
1039 /* wrong except while periodic transfers are scheduled;
1040 * never matches the on-the-wire frame;
1041 * subject to overruns.
1042 */
1043 return sl811->frame;
1044 }
1045
1046
1047 /*-------------------------------------------------------------------------*/
1048
1049 /* the virtual root hub timer IRQ checks for hub status */
1050 static int
1051 sl811h_hub_status_data(struct usb_hcd *hcd, char *buf)
1052 {
1053 struct sl811 *sl811 = hcd_to_sl811(hcd);
1054 #ifdef QUIRK3
1055 unsigned long flags;
1056
1057 /* non-SMP HACK: use root hub timer as i/o watchdog
1058 * this seems essential when SOF IRQs aren't in use...
1059 */
1060 local_irq_save(flags);
1061 if (!timer_pending(&sl811->timer)) {
1062 if (sl811h_irq( /* ~0, */ hcd) != IRQ_NONE)
1063 sl811->stat_lost++;
1064 }
1065 local_irq_restore(flags);
1066 #endif
1067
1068 if (!(sl811->port1 & (0xffff << 16)))
1069 return 0;
1070
1071 /* tell khubd port 1 changed */
1072 *buf = (1 << 1);
1073 return 1;
1074 }
1075
1076 static void
1077 sl811h_hub_descriptor (
1078 struct sl811 *sl811,
1079 struct usb_hub_descriptor *desc
1080 ) {
1081 u16 temp = 0;
1082
1083 desc->bDescriptorType = 0x29;
1084 desc->bHubContrCurrent = 0;
1085
1086 desc->bNbrPorts = 1;
1087 desc->bDescLength = 9;
1088
1089 /* per-port power switching (gang of one!), or none */
1090 desc->bPwrOn2PwrGood = 0;
1091 if (sl811->board && sl811->board->port_power) {
1092 desc->bPwrOn2PwrGood = sl811->board->potpg;
1093 if (!desc->bPwrOn2PwrGood)
1094 desc->bPwrOn2PwrGood = 10;
1095 temp = 0x0001;
1096 } else
1097 temp = 0x0002;
1098
1099 /* no overcurrent errors detection/handling */
1100 temp |= 0x0010;
1101
1102 desc->wHubCharacteristics = cpu_to_le16(temp);
1103
1104 /* two bitmaps: ports removable, and legacy PortPwrCtrlMask */
1105 desc->bitmap[0] = 0 << 1;
1106 desc->bitmap[1] = ~0;
1107 }
1108
1109 static void
1110 sl811h_timer(unsigned long _sl811)
1111 {
1112 struct sl811 *sl811 = (void *) _sl811;
1113 unsigned long flags;
1114 u8 irqstat;
1115 u8 signaling = sl811->ctrl1 & SL11H_CTL1MASK_FORCE;
1116 const u32 mask = (1 << USB_PORT_FEAT_CONNECTION)
1117 | (1 << USB_PORT_FEAT_ENABLE)
1118 | (1 << USB_PORT_FEAT_LOWSPEED);
1119
1120 spin_lock_irqsave(&sl811->lock, flags);
1121
1122 /* stop special signaling */
1123 sl811->ctrl1 &= ~SL11H_CTL1MASK_FORCE;
1124 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1125 udelay(3);
1126
1127 irqstat = sl811_read(sl811, SL11H_IRQ_STATUS);
1128
1129 switch (signaling) {
1130 case SL11H_CTL1MASK_SE0:
1131 DBG("end reset\n");
1132 sl811->port1 = (1 << USB_PORT_FEAT_C_RESET)
1133 | (1 << USB_PORT_FEAT_POWER);
1134 sl811->ctrl1 = 0;
1135 /* don't wrongly ack RD */
1136 if (irqstat & SL11H_INTMASK_INSRMV)
1137 irqstat &= ~SL11H_INTMASK_RD;
1138 break;
1139 case SL11H_CTL1MASK_K:
1140 DBG("end resume\n");
1141 sl811->port1 &= ~(1 << USB_PORT_FEAT_SUSPEND);
1142 break;
1143 default:
1144 DBG("odd timer signaling: %02x\n", signaling);
1145 break;
1146 }
1147 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
1148
1149 if (irqstat & SL11H_INTMASK_RD) {
1150 /* usbcore nukes all pending transactions on disconnect */
1151 if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION))
1152 sl811->port1 |= (1 << USB_PORT_FEAT_C_CONNECTION)
1153 | (1 << USB_PORT_FEAT_C_ENABLE);
1154 sl811->port1 &= ~mask;
1155 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1156 } else {
1157 sl811->port1 |= mask;
1158 if (irqstat & SL11H_INTMASK_DP)
1159 sl811->port1 &= ~(1 << USB_PORT_FEAT_LOWSPEED);
1160 sl811->irq_enable = SL11H_INTMASK_INSRMV | SL11H_INTMASK_RD;
1161 }
1162
1163 if (sl811->port1 & (1 << USB_PORT_FEAT_CONNECTION)) {
1164 u8 ctrl2 = SL811HS_CTL2_INIT;
1165
1166 sl811->irq_enable |= SL11H_INTMASK_DONE_A;
1167 #ifdef USE_B
1168 sl811->irq_enable |= SL11H_INTMASK_DONE_B;
1169 #endif
1170 if (sl811->port1 & (1 << USB_PORT_FEAT_LOWSPEED)) {
1171 sl811->ctrl1 |= SL11H_CTL1MASK_LSPD;
1172 ctrl2 |= SL811HS_CTL2MASK_DSWAP;
1173 }
1174
1175 /* start SOFs flowing, kickstarting with A registers */
1176 sl811->ctrl1 |= SL11H_CTL1MASK_SOF_ENA;
1177 sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
1178 sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
1179
1180 /* autoincrementing */
1181 sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
1182 writeb(SL_SOF, sl811->data_reg);
1183 writeb(0, sl811->data_reg);
1184 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1185 SL11H_HCTLMASK_ARM);
1186
1187 /* khubd provides debounce delay */
1188 } else {
1189 sl811->ctrl1 = 0;
1190 }
1191 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1192
1193 /* reenable irqs */
1194 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
1195 spin_unlock_irqrestore(&sl811->lock, flags);
1196 }
1197
1198 static int
1199 sl811h_hub_control(
1200 struct usb_hcd *hcd,
1201 u16 typeReq,
1202 u16 wValue,
1203 u16 wIndex,
1204 char *buf,
1205 u16 wLength
1206 ) {
1207 struct sl811 *sl811 = hcd_to_sl811(hcd);
1208 int retval = 0;
1209 unsigned long flags;
1210
1211 spin_lock_irqsave(&sl811->lock, flags);
1212
1213 switch (typeReq) {
1214 case ClearHubFeature:
1215 case SetHubFeature:
1216 switch (wValue) {
1217 case C_HUB_OVER_CURRENT:
1218 case C_HUB_LOCAL_POWER:
1219 break;
1220 default:
1221 goto error;
1222 }
1223 break;
1224 case ClearPortFeature:
1225 if (wIndex != 1 || wLength != 0)
1226 goto error;
1227
1228 switch (wValue) {
1229 case USB_PORT_FEAT_ENABLE:
1230 sl811->port1 &= (1 << USB_PORT_FEAT_POWER);
1231 sl811->ctrl1 = 0;
1232 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1233 sl811->irq_enable = SL11H_INTMASK_INSRMV;
1234 sl811_write(sl811, SL11H_IRQ_ENABLE,
1235 sl811->irq_enable);
1236 break;
1237 case USB_PORT_FEAT_SUSPEND:
1238 if (!(sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND)))
1239 break;
1240
1241 /* 20 msec of resume/K signaling, other irqs blocked */
1242 DBG("start resume...\n");
1243 sl811->irq_enable = 0;
1244 sl811_write(sl811, SL11H_IRQ_ENABLE,
1245 sl811->irq_enable);
1246 sl811->ctrl1 |= SL11H_CTL1MASK_K;
1247 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1248
1249 mod_timer(&sl811->timer, jiffies
1250 + msecs_to_jiffies(20));
1251 break;
1252 case USB_PORT_FEAT_POWER:
1253 port_power(sl811, 0);
1254 break;
1255 case USB_PORT_FEAT_C_ENABLE:
1256 case USB_PORT_FEAT_C_SUSPEND:
1257 case USB_PORT_FEAT_C_CONNECTION:
1258 case USB_PORT_FEAT_C_OVER_CURRENT:
1259 case USB_PORT_FEAT_C_RESET:
1260 break;
1261 default:
1262 goto error;
1263 }
1264 sl811->port1 &= ~(1 << wValue);
1265 break;
1266 case GetHubDescriptor:
1267 sl811h_hub_descriptor(sl811, (struct usb_hub_descriptor *) buf);
1268 break;
1269 case GetHubStatus:
1270 *(__le32 *) buf = cpu_to_le32(0);
1271 break;
1272 case GetPortStatus:
1273 if (wIndex != 1)
1274 goto error;
1275 *(__le32 *) buf = cpu_to_le32(sl811->port1);
1276
1277 #ifndef VERBOSE
1278 if (*(u16*)(buf+2)) /* only if wPortChange is interesting */
1279 #endif
1280 DBG("GetPortStatus %08x\n", sl811->port1);
1281 break;
1282 case SetPortFeature:
1283 if (wIndex != 1 || wLength != 0)
1284 goto error;
1285 switch (wValue) {
1286 case USB_PORT_FEAT_SUSPEND:
1287 if (sl811->port1 & (1 << USB_PORT_FEAT_RESET))
1288 goto error;
1289 if (!(sl811->port1 & (1 << USB_PORT_FEAT_ENABLE)))
1290 goto error;
1291
1292 DBG("suspend...\n");
1293 sl811->ctrl1 &= ~SL11H_CTL1MASK_SOF_ENA;
1294 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1295 break;
1296 case USB_PORT_FEAT_POWER:
1297 port_power(sl811, 1);
1298 break;
1299 case USB_PORT_FEAT_RESET:
1300 if (sl811->port1 & (1 << USB_PORT_FEAT_SUSPEND))
1301 goto error;
1302 if (!(sl811->port1 & (1 << USB_PORT_FEAT_POWER)))
1303 break;
1304
1305 /* 50 msec of reset/SE0 signaling, irqs blocked */
1306 sl811->irq_enable = 0;
1307 sl811_write(sl811, SL11H_IRQ_ENABLE,
1308 sl811->irq_enable);
1309 sl811->ctrl1 = SL11H_CTL1MASK_SE0;
1310 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1311 sl811->port1 |= (1 << USB_PORT_FEAT_RESET);
1312 mod_timer(&sl811->timer, jiffies
1313 + msecs_to_jiffies(50));
1314 break;
1315 default:
1316 goto error;
1317 }
1318 sl811->port1 |= 1 << wValue;
1319 break;
1320
1321 default:
1322 error:
1323 /* "protocol stall" on error */
1324 retval = -EPIPE;
1325 }
1326
1327 spin_unlock_irqrestore(&sl811->lock, flags);
1328 return retval;
1329 }
1330
1331 #ifdef CONFIG_PM
1332
1333 static int
1334 sl811h_bus_suspend(struct usb_hcd *hcd)
1335 {
1336 // SOFs off
1337 DBG("%s\n", __FUNCTION__);
1338 return 0;
1339 }
1340
1341 static int
1342 sl811h_bus_resume(struct usb_hcd *hcd)
1343 {
1344 // SOFs on
1345 DBG("%s\n", __FUNCTION__);
1346 return 0;
1347 }
1348
1349 #else
1350
1351 #define sl811h_bus_suspend NULL
1352 #define sl811h_bus_resume NULL
1353
1354 #endif
1355
1356
1357 /*-------------------------------------------------------------------------*/
1358
1359 #ifdef STUB_DEBUG_FILE
1360
1361 static inline void create_debug_file(struct sl811 *sl811) { }
1362 static inline void remove_debug_file(struct sl811 *sl811) { }
1363
1364 #else
1365
1366 #include <linux/proc_fs.h>
1367 #include <linux/seq_file.h>
1368
1369 static void dump_irq(struct seq_file *s, char *label, u8 mask)
1370 {
1371 seq_printf(s, "%s %02x%s%s%s%s%s%s\n", label, mask,
1372 (mask & SL11H_INTMASK_DONE_A) ? " done_a" : "",
1373 (mask & SL11H_INTMASK_DONE_B) ? " done_b" : "",
1374 (mask & SL11H_INTMASK_SOFINTR) ? " sof" : "",
1375 (mask & SL11H_INTMASK_INSRMV) ? " ins/rmv" : "",
1376 (mask & SL11H_INTMASK_RD) ? " rd" : "",
1377 (mask & SL11H_INTMASK_DP) ? " dp" : "");
1378 }
1379
1380 static int proc_sl811h_show(struct seq_file *s, void *unused)
1381 {
1382 struct sl811 *sl811 = s->private;
1383 struct sl811h_ep *ep;
1384 unsigned i;
1385
1386 seq_printf(s, "%s\n%s version %s\nportstatus[1] = %08x\n",
1387 sl811_to_hcd(sl811)->product_desc,
1388 hcd_name, DRIVER_VERSION,
1389 sl811->port1);
1390
1391 seq_printf(s, "insert/remove: %ld\n", sl811->stat_insrmv);
1392 seq_printf(s, "current session: done_a %ld done_b %ld "
1393 "wake %ld sof %ld overrun %ld lost %ld\n\n",
1394 sl811->stat_a, sl811->stat_b,
1395 sl811->stat_wake, sl811->stat_sof,
1396 sl811->stat_overrun, sl811->stat_lost);
1397
1398 spin_lock_irq(&sl811->lock);
1399
1400 if (sl811->ctrl1 & SL11H_CTL1MASK_SUSPEND)
1401 seq_printf(s, "(suspended)\n\n");
1402 else {
1403 u8 t = sl811_read(sl811, SL11H_CTLREG1);
1404
1405 seq_printf(s, "ctrl1 %02x%s%s%s%s\n", t,
1406 (t & SL11H_CTL1MASK_SOF_ENA) ? " sofgen" : "",
1407 ({char *s; switch (t & SL11H_CTL1MASK_FORCE) {
1408 case SL11H_CTL1MASK_NORMAL: s = ""; break;
1409 case SL11H_CTL1MASK_SE0: s = " se0/reset"; break;
1410 case SL11H_CTL1MASK_K: s = " k/resume"; break;
1411 default: s = "j"; break;
1412 }; s; }),
1413 (t & SL11H_CTL1MASK_LSPD) ? " lowspeed" : "",
1414 (t & SL11H_CTL1MASK_SUSPEND) ? " suspend" : "");
1415
1416 dump_irq(s, "irq_enable",
1417 sl811_read(sl811, SL11H_IRQ_ENABLE));
1418 dump_irq(s, "irq_status",
1419 sl811_read(sl811, SL11H_IRQ_STATUS));
1420 seq_printf(s, "frame clocks remaining: %d\n",
1421 sl811_read(sl811, SL11H_SOFTMRREG) << 6);
1422 }
1423
1424 seq_printf(s, "A: qh%p ctl %02x sts %02x\n", sl811->active_a,
1425 sl811_read(sl811, SL811_EP_A(SL11H_HOSTCTLREG)),
1426 sl811_read(sl811, SL811_EP_A(SL11H_PKTSTATREG)));
1427 seq_printf(s, "B: qh%p ctl %02x sts %02x\n", sl811->active_b,
1428 sl811_read(sl811, SL811_EP_B(SL11H_HOSTCTLREG)),
1429 sl811_read(sl811, SL811_EP_B(SL11H_PKTSTATREG)));
1430 seq_printf(s, "\n");
1431 list_for_each_entry (ep, &sl811->async, schedule) {
1432 struct urb *urb;
1433
1434 seq_printf(s, "%s%sqh%p, ep%d%s, maxpacket %d"
1435 " nak %d err %d\n",
1436 (ep == sl811->active_a) ? "(A) " : "",
1437 (ep == sl811->active_b) ? "(B) " : "",
1438 ep, ep->epnum,
1439 ({ char *s; switch (ep->nextpid) {
1440 case USB_PID_IN: s = "in"; break;
1441 case USB_PID_OUT: s = "out"; break;
1442 case USB_PID_SETUP: s = "setup"; break;
1443 case USB_PID_ACK: s = "status"; break;
1444 default: s = "?"; break;
1445 }; s;}),
1446 ep->maxpacket,
1447 ep->nak_count, ep->error_count);
1448 list_for_each_entry (urb, &ep->hep->urb_list, urb_list) {
1449 seq_printf(s, " urb%p, %d/%d\n", urb,
1450 urb->actual_length,
1451 urb->transfer_buffer_length);
1452 }
1453 }
1454 if (!list_empty(&sl811->async))
1455 seq_printf(s, "\n");
1456
1457 seq_printf(s, "periodic size= %d\n", PERIODIC_SIZE);
1458
1459 for (i = 0; i < PERIODIC_SIZE; i++) {
1460 ep = sl811->periodic[i];
1461 if (!ep)
1462 continue;
1463 seq_printf(s, "%2d [%3d]:\n", i, sl811->load[i]);
1464
1465 /* DUMB: prints shared entries multiple times */
1466 do {
1467 seq_printf(s,
1468 " %s%sqh%d/%p (%sdev%d ep%d%s max %d) "
1469 "err %d\n",
1470 (ep == sl811->active_a) ? "(A) " : "",
1471 (ep == sl811->active_b) ? "(B) " : "",
1472 ep->period, ep,
1473 (ep->udev->speed == USB_SPEED_FULL)
1474 ? "" : "ls ",
1475 ep->udev->devnum, ep->epnum,
1476 (ep->epnum == 0) ? ""
1477 : ((ep->nextpid == USB_PID_IN)
1478 ? "in"
1479 : "out"),
1480 ep->maxpacket, ep->error_count);
1481 ep = ep->next;
1482 } while (ep);
1483 }
1484
1485 spin_unlock_irq(&sl811->lock);
1486 seq_printf(s, "\n");
1487
1488 return 0;
1489 }
1490
1491 static int proc_sl811h_open(struct inode *inode, struct file *file)
1492 {
1493 return single_open(file, proc_sl811h_show, PDE(inode)->data);
1494 }
1495
1496 static const struct file_operations proc_ops = {
1497 .open = proc_sl811h_open,
1498 .read = seq_read,
1499 .llseek = seq_lseek,
1500 .release = single_release,
1501 };
1502
1503 /* expect just one sl811 per system */
1504 static const char proc_filename[] = "driver/sl811h";
1505
1506 static void create_debug_file(struct sl811 *sl811)
1507 {
1508 struct proc_dir_entry *pde;
1509
1510 pde = create_proc_entry(proc_filename, 0, NULL);
1511 if (pde == NULL)
1512 return;
1513
1514 pde->proc_fops = &proc_ops;
1515 pde->data = sl811;
1516 sl811->pde = pde;
1517 }
1518
1519 static void remove_debug_file(struct sl811 *sl811)
1520 {
1521 if (sl811->pde)
1522 remove_proc_entry(proc_filename, NULL);
1523 }
1524
1525 #endif
1526
1527 /*-------------------------------------------------------------------------*/
1528
1529 static void
1530 sl811h_stop(struct usb_hcd *hcd)
1531 {
1532 struct sl811 *sl811 = hcd_to_sl811(hcd);
1533 unsigned long flags;
1534
1535 del_timer_sync(&hcd->rh_timer);
1536
1537 spin_lock_irqsave(&sl811->lock, flags);
1538 port_power(sl811, 0);
1539 spin_unlock_irqrestore(&sl811->lock, flags);
1540 }
1541
1542 static int
1543 sl811h_start(struct usb_hcd *hcd)
1544 {
1545 struct sl811 *sl811 = hcd_to_sl811(hcd);
1546
1547 /* chip has been reset, VBUS power is off */
1548 hcd->state = HC_STATE_RUNNING;
1549
1550 if (sl811->board) {
1551 if (!device_can_wakeup(hcd->self.controller))
1552 device_init_wakeup(hcd->self.controller,
1553 sl811->board->can_wakeup);
1554 hcd->power_budget = sl811->board->power * 2;
1555 }
1556
1557 /* enable power and interupts */
1558 port_power(sl811, 1);
1559
1560 return 0;
1561 }
1562
1563 /*-------------------------------------------------------------------------*/
1564
1565 static struct hc_driver sl811h_hc_driver = {
1566 .description = hcd_name,
1567 .hcd_priv_size = sizeof(struct sl811),
1568
1569 /*
1570 * generic hardware linkage
1571 */
1572 .irq = sl811h_irq,
1573 .flags = HCD_USB11 | HCD_MEMORY,
1574
1575 /* Basic lifecycle operations */
1576 .start = sl811h_start,
1577 .stop = sl811h_stop,
1578
1579 /*
1580 * managing i/o requests and associated device resources
1581 */
1582 .urb_enqueue = sl811h_urb_enqueue,
1583 .urb_dequeue = sl811h_urb_dequeue,
1584 .endpoint_disable = sl811h_endpoint_disable,
1585
1586 /*
1587 * periodic schedule support
1588 */
1589 .get_frame_number = sl811h_get_frame,
1590
1591 /*
1592 * root hub support
1593 */
1594 .hub_status_data = sl811h_hub_status_data,
1595 .hub_control = sl811h_hub_control,
1596 .bus_suspend = sl811h_bus_suspend,
1597 .bus_resume = sl811h_bus_resume,
1598 };
1599
1600 /*-------------------------------------------------------------------------*/
1601
1602 static int __devexit
1603 sl811h_remove(struct platform_device *dev)
1604 {
1605 struct usb_hcd *hcd = platform_get_drvdata(dev);
1606 struct sl811 *sl811 = hcd_to_sl811(hcd);
1607 struct resource *res;
1608
1609 remove_debug_file(sl811);
1610 usb_remove_hcd(hcd);
1611
1612 /* some platforms may use IORESOURCE_IO */
1613 res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1614 if (res)
1615 iounmap(sl811->data_reg);
1616
1617 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1618 if (res)
1619 iounmap(sl811->addr_reg);
1620
1621 usb_put_hcd(hcd);
1622 return 0;
1623 }
1624
1625 static int __devinit
1626 sl811h_probe(struct platform_device *dev)
1627 {
1628 struct usb_hcd *hcd;
1629 struct sl811 *sl811;
1630 struct resource *addr, *data;
1631 int irq;
1632 void __iomem *addr_reg;
1633 void __iomem *data_reg;
1634 int retval;
1635 u8 tmp, ioaddr = 0;
1636
1637 /* basic sanity checks first. board-specific init logic should
1638 * have initialized these three resources and probably board
1639 * specific platform_data. we don't probe for IRQs, and do only
1640 * minimal sanity checking.
1641 */
1642 irq = platform_get_irq(dev, 0);
1643 if (dev->num_resources < 3 || irq < 0)
1644 return -ENODEV;
1645
1646 /* refuse to confuse usbcore */
1647 if (dev->dev.dma_mask) {
1648 DBG("no we won't dma\n");
1649 return -EINVAL;
1650 }
1651
1652 /* the chip may be wired for either kind of addressing */
1653 addr = platform_get_resource(dev, IORESOURCE_MEM, 0);
1654 data = platform_get_resource(dev, IORESOURCE_MEM, 1);
1655 retval = -EBUSY;
1656 if (!addr || !data) {
1657 addr = platform_get_resource(dev, IORESOURCE_IO, 0);
1658 data = platform_get_resource(dev, IORESOURCE_IO, 1);
1659 if (!addr || !data)
1660 return -ENODEV;
1661 ioaddr = 1;
1662 /*
1663 * NOTE: 64-bit resource->start is getting truncated
1664 * to avoid compiler warning, assuming that ->start
1665 * is always 32-bit for this case
1666 */
1667 addr_reg = (void __iomem *) (unsigned long) addr->start;
1668 data_reg = (void __iomem *) (unsigned long) data->start;
1669 } else {
1670 addr_reg = ioremap(addr->start, 1);
1671 if (addr_reg == NULL) {
1672 retval = -ENOMEM;
1673 goto err2;
1674 }
1675
1676 data_reg = ioremap(data->start, 1);
1677 if (data_reg == NULL) {
1678 retval = -ENOMEM;
1679 goto err4;
1680 }
1681 }
1682
1683 /* allocate and initialize hcd */
1684 hcd = usb_create_hcd(&sl811h_hc_driver, &dev->dev, dev->dev.bus_id);
1685 if (!hcd) {
1686 retval = -ENOMEM;
1687 goto err5;
1688 }
1689 hcd->rsrc_start = addr->start;
1690 sl811 = hcd_to_sl811(hcd);
1691
1692 spin_lock_init(&sl811->lock);
1693 INIT_LIST_HEAD(&sl811->async);
1694 sl811->board = dev->dev.platform_data;
1695 init_timer(&sl811->timer);
1696 sl811->timer.function = sl811h_timer;
1697 sl811->timer.data = (unsigned long) sl811;
1698 sl811->addr_reg = addr_reg;
1699 sl811->data_reg = data_reg;
1700
1701 spin_lock_irq(&sl811->lock);
1702 port_power(sl811, 0);
1703 spin_unlock_irq(&sl811->lock);
1704 msleep(200);
1705
1706 tmp = sl811_read(sl811, SL11H_HWREVREG);
1707 switch (tmp >> 4) {
1708 case 1:
1709 hcd->product_desc = "SL811HS v1.2";
1710 break;
1711 case 2:
1712 hcd->product_desc = "SL811HS v1.5";
1713 break;
1714 default:
1715 /* reject case 0, SL11S is less functional */
1716 DBG("chiprev %02x\n", tmp);
1717 retval = -ENXIO;
1718 goto err6;
1719 }
1720
1721 /* The chip's IRQ is level triggered, active high. A requirement
1722 * for platform device setup is to cope with things like signal
1723 * inverters (e.g. CF is active low) or working only with edge
1724 * triggers (e.g. most ARM CPUs). Initial driver stress testing
1725 * was on a system with single edge triggering, so most sorts of
1726 * triggering arrangement should work.
1727 */
1728 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
1729 if (retval != 0)
1730 goto err6;
1731
1732 create_debug_file(sl811);
1733 return retval;
1734
1735 err6:
1736 usb_put_hcd(hcd);
1737 err5:
1738 if (!ioaddr)
1739 iounmap(data_reg);
1740 err4:
1741 if (!ioaddr)
1742 iounmap(addr_reg);
1743 err2:
1744 DBG("init error, %d\n", retval);
1745 return retval;
1746 }
1747
1748 #ifdef CONFIG_PM
1749
1750 /* for this device there's no useful distinction between the controller
1751 * and its root hub, except that the root hub only gets direct PM calls
1752 * when CONFIG_USB_SUSPEND is enabled.
1753 */
1754
1755 static int
1756 sl811h_suspend(struct platform_device *dev, pm_message_t state)
1757 {
1758 struct usb_hcd *hcd = platform_get_drvdata(dev);
1759 struct sl811 *sl811 = hcd_to_sl811(hcd);
1760 int retval = 0;
1761
1762 switch (state.event) {
1763 case PM_EVENT_FREEZE:
1764 retval = sl811h_bus_suspend(hcd);
1765 break;
1766 case PM_EVENT_SUSPEND:
1767 case PM_EVENT_PRETHAW: /* explicitly discard hw state */
1768 port_power(sl811, 0);
1769 break;
1770 }
1771 return retval;
1772 }
1773
1774 static int
1775 sl811h_resume(struct platform_device *dev)
1776 {
1777 struct usb_hcd *hcd = platform_get_drvdata(dev);
1778 struct sl811 *sl811 = hcd_to_sl811(hcd);
1779
1780 /* with no "check to see if VBUS is still powered" board hook,
1781 * let's assume it'd only be powered to enable remote wakeup.
1782 */
1783 if (!sl811->port1 || !device_can_wakeup(&hcd->self.root_hub->dev)) {
1784 sl811->port1 = 0;
1785 port_power(sl811, 1);
1786 usb_root_hub_lost_power(hcd->self.root_hub);
1787 return 0;
1788 }
1789
1790 return sl811h_bus_resume(hcd);
1791 }
1792
1793 #else
1794
1795 #define sl811h_suspend NULL
1796 #define sl811h_resume NULL
1797
1798 #endif
1799
1800
1801 /* this driver is exported so sl811_cs can depend on it */
1802 struct platform_driver sl811h_driver = {
1803 .probe = sl811h_probe,
1804 .remove = __devexit_p(sl811h_remove),
1805
1806 .suspend = sl811h_suspend,
1807 .resume = sl811h_resume,
1808 .driver = {
1809 .name = (char *) hcd_name,
1810 .owner = THIS_MODULE,
1811 },
1812 };
1813 EXPORT_SYMBOL(sl811h_driver);
1814
1815 /*-------------------------------------------------------------------------*/
1816
1817 static int __init sl811h_init(void)
1818 {
1819 if (usb_disabled())
1820 return -ENODEV;
1821
1822 INFO("driver %s, %s\n", hcd_name, DRIVER_VERSION);
1823 return platform_driver_register(&sl811h_driver);
1824 }
1825 module_init(sl811h_init);
1826
1827 static void __exit sl811h_cleanup(void)
1828 {
1829 platform_driver_unregister(&sl811h_driver);
1830 }
1831 module_exit(sl811h_cleanup);
Tomato firmware and modifications.